From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shawn Lin Date: Fri, 15 Jan 2021 18:01:20 +0800 Subject: [PATCH v2 0/2] Add Rockchip dwc-based PCIe controller and PHY support Message-ID: <20210115100122.7385-1-shawn.lin@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This patchset add Rockchip dwc-based PCIe controller and PHY found on RK356X platforms. It could support Gen3 as a root complex. Changes in v2: - reoder header file - add comment - reorder the header file - add more comment - use clrsetbits_le32 and setbits_le32 - fix other various suggestions from Simon Shawn Lin (2): phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY pci: Add Rockchip dwc based PCIe controller driver drivers/pci/Kconfig | 9 + drivers/pci/Makefile | 1 + drivers/pci/pcie_dw_rockchip.c | 877 ++++++++++++++++++ drivers/phy/rockchip/Kconfig | 9 + drivers/phy/rockchip/Makefile | 1 + .../phy/rockchip/phy-rockchip-snps-pcie3.c | 157 ++++ 6 files changed, 1054 insertions(+) create mode 100644 drivers/pci/pcie_dw_rockchip.c create mode 100644 drivers/phy/rockchip/phy-rockchip-snps-pcie3.c -- 2.17.1