From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05D07C433DB for ; Fri, 15 Jan 2021 15:14:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D113623403 for ; Fri, 15 Jan 2021 15:14:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732423AbhAOPOU (ORCPT ); Fri, 15 Jan 2021 10:14:20 -0500 Received: from foss.arm.com ([217.140.110.172]:42532 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731014AbhAOPOT (ORCPT ); Fri, 15 Jan 2021 10:14:19 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C2EF3D6E; Fri, 15 Jan 2021 07:13:33 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.41.13]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E732D3F70D; Fri, 15 Jan 2021 07:13:29 -0800 (PST) Date: Fri, 15 Jan 2021 15:13:27 +0000 From: Mark Rutland To: Vincenzo Frascino Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Catalin Marinas , Will Deacon , Dmitry Vyukov , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Branislav Rankov , Andrey Konovalov Subject: Re: [PATCH v3 2/4] arm64: mte: Add asynchronous mode support Message-ID: <20210115151327.GB44111@C02TD0UTHF1T.local> References: <20210115120043.50023-1-vincenzo.frascino@arm.com> <20210115120043.50023-3-vincenzo.frascino@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210115120043.50023-3-vincenzo.frascino@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 15, 2021 at 12:00:41PM +0000, Vincenzo Frascino wrote: > MTE provides an asynchronous mode for detecting tag exceptions. In > particular instead of triggering a fault the arm64 core updates a > register which is checked by the kernel after the asynchronous tag > check fault has occurred. > > Add support for MTE asynchronous mode. > > The exception handling mechanism will be added with a future patch. > > Note: KASAN HW activates async mode via kasan.mode kernel parameter. > The default mode is set to synchronous. > The code that verifies the status of TFSR_EL1 will be added with a > future patch. > > Cc: Catalin Marinas > Cc: Will Deacon > Signed-off-by: Vincenzo Frascino > --- > arch/arm64/kernel/mte.c | 26 ++++++++++++++++++++++++-- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > index 53a6d734e29b..df7a1ae26d7c 100644 > --- a/arch/arm64/kernel/mte.c > +++ b/arch/arm64/kernel/mte.c > @@ -153,8 +153,30 @@ void mte_init_tags(u64 max_tag) > > void mte_enable_kernel(enum kasan_hw_tags_mode mode) > { > - /* Enable MTE Sync Mode for EL1. */ > - sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_SYNC); > + const char *m; > + > + /* Preset parameter values based on the mode. */ > + switch (mode) { > + case KASAN_HW_TAGS_ASYNC: > + /* Enable MTE Async Mode for EL1. */ > + sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_ASYNC); > + m = "asynchronous"; > + break; > + case KASAN_HW_TAGS_SYNC: > + sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_SYNC); > + m = "synchronous"; > + break; > + default: > + /* > + * kasan mode should be always set hence we should > + * not reach this condition. > + */ > + WARN_ON_ONCE(1); > + return; > + } > + > + pr_info_once("MTE: enabled in %s mode at EL1\n", m); > + > isb(); > } For clarity, we should have that ISB before the pr_info_once(). As with my comment on patch 1, I think with separate functions this would be much clearer and simpler: static inline void __mte_enable_kernel(const char *mode, unsigned long tcf) { sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, tcf); isb(); pr_info_once("MTE: enabled in %s mode at EL1\n", mode); } void mte_enable_kernel_sync(void) { __mte_enable_kernel("synchronous", SCTLR_ELx_TCF_SYNC); } void mte_enable_kernel_async(void) { __mte_enable_kernel("asynchronous", SCTLR_ELx_TCF_ASYNC); } Thanks, Mark. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7DBEC433E6 for ; Fri, 15 Jan 2021 15:14:56 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6A6FA23403 for ; Fri, 15 Jan 2021 15:14:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6A6FA23403 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=PceQ4FCEoSAKkghb8lSiwddCZ8y0DI3EOPjPw0YPnWQ=; b=PBCkSdYTAaxcNomXOMtypSO7L scgGow5F/lCHMtyKxnOEKGlfdK7cg6NKa37tFytj9WUK7Z3AMHHDx1UpiYEwONzPbJu84Hgyt8KeT cMTxmroRL0UBxxldjkbeNj/CzBT91rknzsyr9iHUamjI7GH95ohOEg1D5J8AQGTqFfTVgnFjoT5yC lNFqgUVkMzcoHT7ajuKFyXjQu84nh6GIK2H+7C/FGvbOrjxGKR/loexomG6zSLELHYNs/2kunygDl M98dIkN37pGWvQMhQD5o5Pk+0vYeO/pOXbnqekNIye9U4NxErxeDCUCwpg5H8aTANCNozhFVSy/z1 qIUpSrP5Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l0QnC-0002Id-8W; Fri, 15 Jan 2021 15:13:38 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l0Qn8-0002IB-R5 for linux-arm-kernel@lists.infradead.org; Fri, 15 Jan 2021 15:13:35 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C2EF3D6E; Fri, 15 Jan 2021 07:13:33 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.41.13]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E732D3F70D; Fri, 15 Jan 2021 07:13:29 -0800 (PST) Date: Fri, 15 Jan 2021 15:13:27 +0000 From: Mark Rutland To: Vincenzo Frascino Subject: Re: [PATCH v3 2/4] arm64: mte: Add asynchronous mode support Message-ID: <20210115151327.GB44111@C02TD0UTHF1T.local> References: <20210115120043.50023-1-vincenzo.frascino@arm.com> <20210115120043.50023-3-vincenzo.frascino@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210115120043.50023-3-vincenzo.frascino@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210115_101334_950895_2D5D0C53 X-CRM114-Status: GOOD ( 23.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Branislav Rankov , Marco Elver , Catalin Marinas , Evgenii Stepanov , linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Alexander Potapenko , linux-arm-kernel@lists.infradead.org, Andrey Konovalov , Andrey Ryabinin , Will Deacon , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jan 15, 2021 at 12:00:41PM +0000, Vincenzo Frascino wrote: > MTE provides an asynchronous mode for detecting tag exceptions. In > particular instead of triggering a fault the arm64 core updates a > register which is checked by the kernel after the asynchronous tag > check fault has occurred. > > Add support for MTE asynchronous mode. > > The exception handling mechanism will be added with a future patch. > > Note: KASAN HW activates async mode via kasan.mode kernel parameter. > The default mode is set to synchronous. > The code that verifies the status of TFSR_EL1 will be added with a > future patch. > > Cc: Catalin Marinas > Cc: Will Deacon > Signed-off-by: Vincenzo Frascino > --- > arch/arm64/kernel/mte.c | 26 ++++++++++++++++++++++++-- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > index 53a6d734e29b..df7a1ae26d7c 100644 > --- a/arch/arm64/kernel/mte.c > +++ b/arch/arm64/kernel/mte.c > @@ -153,8 +153,30 @@ void mte_init_tags(u64 max_tag) > > void mte_enable_kernel(enum kasan_hw_tags_mode mode) > { > - /* Enable MTE Sync Mode for EL1. */ > - sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_SYNC); > + const char *m; > + > + /* Preset parameter values based on the mode. */ > + switch (mode) { > + case KASAN_HW_TAGS_ASYNC: > + /* Enable MTE Async Mode for EL1. */ > + sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_ASYNC); > + m = "asynchronous"; > + break; > + case KASAN_HW_TAGS_SYNC: > + sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_SYNC); > + m = "synchronous"; > + break; > + default: > + /* > + * kasan mode should be always set hence we should > + * not reach this condition. > + */ > + WARN_ON_ONCE(1); > + return; > + } > + > + pr_info_once("MTE: enabled in %s mode at EL1\n", m); > + > isb(); > } For clarity, we should have that ISB before the pr_info_once(). As with my comment on patch 1, I think with separate functions this would be much clearer and simpler: static inline void __mte_enable_kernel(const char *mode, unsigned long tcf) { sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, tcf); isb(); pr_info_once("MTE: enabled in %s mode at EL1\n", mode); } void mte_enable_kernel_sync(void) { __mte_enable_kernel("synchronous", SCTLR_ELx_TCF_SYNC); } void mte_enable_kernel_async(void) { __mte_enable_kernel("asynchronous", SCTLR_ELx_TCF_ASYNC); } Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel