From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3595BC433E0 for ; Mon, 18 Jan 2021 06:08:05 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EC1CD22512 for ; Mon, 18 Jan 2021 06:08:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EC1CD22512 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 735B96E064; Mon, 18 Jan 2021 06:08:04 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id BF6C689F71 for ; Mon, 18 Jan 2021 06:07:33 +0000 (UTC) IronPort-SDR: hF38SBaNxad+XKpsUlEviaQ6cKmQ25iEp6YHpHHIpFFJcO3FUjr6RlQvv9Qw6WEPQliQt/MsJ7 6Wy/6S602C1w== X-IronPort-AV: E=McAfee;i="6000,8403,9867"; a="197455399" X-IronPort-AV: E=Sophos;i="5.79,355,1602572400"; d="scan'208";a="197455399" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jan 2021 22:07:32 -0800 IronPort-SDR: gGuS87g4KOpDPSw63ctdfgYpc5/VdwUheW6Qx/Mo+L2lnDAGFc1q85cwA1lLcJ6JR8Y0eVFnjK 86LTXCWjk2eA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,355,1602572400"; d="scan'208";a="399016985" Received: from sean-virtualbox.fm.intel.com ([10.105.158.96]) by fmsmga004.fm.intel.com with ESMTP; 17 Jan 2021 22:07:32 -0800 From: "Huang, Sean Z" To: Intel-gfx@lists.freedesktop.org Date: Sun, 17 Jan 2021 22:07:25 -0800 Message-Id: <20210118060730.15425-9-sean.z.huang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210118060730.15425-1-sean.z.huang@intel.com> References: <20210118060730.15425-1-sean.z.huang@intel.com> Subject: [Intel-gfx] [RFC-v21 08/13] drm/i915/pxp: Enable PXP power management X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kumar.gaurav@intel.com MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" During the power event S3+ sleep/resume, hardware will lose all the encryption keys for every hardware session, even though the software session state was marked as alive after resume. So to handle such case, PXP should terminate all the hardware sessions and cleanup all the software states after the power cycle. Signed-off-by: Huang, Sean Z --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++ drivers/gpu/drm/i915/i915_drv.c | 4 ++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 65 ++++++++++++++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 31 +++++++++++ drivers/gpu/drm/i915/pxp/intel_pxp_types.h | 1 + 6 files changed, 106 insertions(+) create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_pm.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index c931ef5e8a85..eba360ed84d8 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -271,6 +271,7 @@ i915-$(CONFIG_DRM_I915_PXP) += \ pxp/intel_pxp_arb.o \ pxp/intel_pxp_cmd.o \ pxp/intel_pxp_context.o \ + pxp/intel_pxp_pm.o \ pxp/intel_pxp_tee.o # Post-mortem debug and GPU hang state capture diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c index c94e8ac884eb..ae0387e419a2 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c @@ -20,6 +20,7 @@ #include "intel_rc6.h" #include "intel_rps.h" #include "intel_wakeref.h" +#include "pxp/intel_pxp_pm.h" static void user_forcewake(struct intel_gt *gt, bool suspend) { @@ -266,6 +267,8 @@ int intel_gt_resume(struct intel_gt *gt) intel_uc_resume(>->uc); + intel_pxp_pm_resume(>->pxp); + user_forcewake(gt, false); out_fw: @@ -300,6 +303,7 @@ void intel_gt_suspend_prepare(struct intel_gt *gt) user_forcewake(gt, true); wait_for_suspend(gt); + intel_pxp_pm_prepare_suspend(>->pxp); intel_uc_suspend(>->uc); } diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index e9cb8e9ca172..19db49206e0c 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -68,6 +68,8 @@ #include "gt/intel_gt_pm.h" #include "gt/intel_rc6.h" +#include "pxp/intel_pxp_pm.h" + #include "i915_debugfs.h" #include "i915_drv.h" #include "i915_ioc32.h" @@ -1342,6 +1344,8 @@ static int i915_drm_resume_early(struct drm_device *dev) intel_power_domains_resume(dev_priv); + intel_pxp_pm_resume_early(&dev_priv->gt.pxp); + enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); return ret; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c new file mode 100644 index 000000000000..5a1b5ad4f997 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2020 Intel Corporation. + */ + +#include "intel_pxp_context.h" +#include "intel_pxp_arb.h" +#include "intel_pxp_pm.h" + +void intel_pxp_pm_prepare_suspend(struct intel_pxp *pxp) +{ + if (!pxp->ctx.inited) + return; + + mutex_lock(&pxp->ctx.mutex); + + /* Disable PXP-IOCTLs */ + pxp->ctx.global_state_in_suspend = true; + + mutex_unlock(&pxp->ctx.mutex); +} + +void intel_pxp_pm_resume_early(struct intel_pxp *pxp) +{ + if (!pxp->ctx.inited) + return; + + mutex_lock(&pxp->ctx.mutex); + + if (pxp->ctx.global_state_in_suspend) { + /* reset the attacked flag even there was a pending */ + pxp->ctx.global_state_attacked = false; + + pxp->ctx.flag_display_hm_surface_keys = false; + } + + mutex_unlock(&pxp->ctx.mutex); +} + +int intel_pxp_pm_resume(struct intel_pxp *pxp) +{ + int ret = 0; + struct intel_gt *gt = container_of(pxp, typeof(*gt), pxp); + + if (!pxp->ctx.inited) + return 0; + + mutex_lock(&pxp->ctx.mutex); + + /* Re-enable PXP-IOCTLs */ + if (pxp->ctx.global_state_in_suspend) { + ret = intel_pxp_arb_terminate_session_with_global_terminate(pxp); + if (ret) { + drm_err(>->i915->drm, "Failed to terminate the arb session\n"); + goto end; + } + + pxp->ctx.global_state_in_suspend = false; + } + +end: + mutex_unlock(&pxp->ctx.mutex); + + return ret; +} diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h new file mode 100644 index 000000000000..135bfb59aaf7 --- /dev/null +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2020, Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_PXP_PM_H__ +#define __INTEL_PXP_PM_H__ + +#include "i915_drv.h" + +#ifdef CONFIG_DRM_I915_PXP +void intel_pxp_pm_prepare_suspend(struct intel_pxp *pxp); + +void intel_pxp_pm_resume_early(struct intel_pxp *pxp); +int intel_pxp_pm_resume(struct intel_pxp *pxp); +#else +static inline void intel_pxp_pm_prepare_suspend(struct intel_pxp *pxp) +{ +} + +static inline void intel_pxp_pm_resume_early(struct intel_pxp *pxp) +{ +} + +static inline int intel_pxp_pm_resume(struct intel_pxp *pxp) +{ + return 0; +} +#endif + +#endif /* __INTEL_PXP_PM_H__ */ diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_types.h b/drivers/gpu/drm/i915/pxp/intel_pxp_types.h index dd7445ff2cb8..e825553db46e 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_types.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_types.h @@ -22,6 +22,7 @@ struct pxp_context { bool flag_display_hm_surface_keys; bool global_state_attacked; + bool global_state_in_suspend; }; struct intel_pxp { -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx