From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/1] drm/i915: Check for all subplatform bits
Date: Tue, 19 Jan 2021 17:21:11 -0800 [thread overview]
Message-ID: <20210120012111.44184-2-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20210120012111.44184-1-umesh.nerlige.ramappa@intel.com>
Current code is checking only 2 bits in the subplatform, but actually 3
bits are allocated for the field. Check all 3 bits.
Fixes: 805446c8347c9 (drm/i915: Introduce concept of a sub-platform)
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8376cff5ba86..38eca00c6f09 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1343,7 +1343,7 @@ intel_subplatform(const struct intel_runtime_info *info, enum intel_platform p)
{
const unsigned int pi = __platform_mask_index(info, p);
- return info->platform_mask[pi] & INTEL_SUBPLATFORM_BITS;
+ return info->platform_mask[pi] & ((1 << INTEL_SUBPLATFORM_BITS) - 1);
}
static __always_inline bool
--
2.20.1
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next prev parent reply other threads:[~2021-01-20 1:21 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-20 1:21 [Intel-gfx] [PATCH 0/1] Fix subplatform check!! Umesh Nerlige Ramappa
2021-01-20 1:21 ` Umesh Nerlige Ramappa [this message]
2021-01-20 8:13 ` [Intel-gfx] [PATCH 1/1] drm/i915: Check for all subplatform bits Tvrtko Ursulin
2021-01-20 2:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Fix subplatform check!! Patchwork
2021-01-20 5:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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