From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 759A6C433E0 for ; Wed, 20 Jan 2021 20:49:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2A95D23600 for ; Wed, 20 Jan 2021 20:49:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732283AbhATUt2 (ORCPT ); Wed, 20 Jan 2021 15:49:28 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:49232 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388237AbhATU0h (ORCPT ); Wed, 20 Jan 2021 15:26:37 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10KKPWPW039649; Wed, 20 Jan 2021 14:25:32 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611174332; bh=Twc/GQf12aJeqk1mHxxtbn5jnBdXtyChT6TgBPfGu/M=; h=From:To:CC:Subject:Date; b=Pz8w0D/ttlbqoMB0QkvJwoYlSkDdce3HnJsJqUDYiPVjLyvH8L/7TJvoaS2X6sD0J tuvY47hgfJ2kyzzICguhLZd/Yr8VZH8XK3mUAUXdWIgyhRx/IfYlYtWX8glg+0Z8Jh r8qxG9ZJnnX52WxNhaN/lbNQE8PBFxultiY9EXSo= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10KKPWmt050851 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 Jan 2021 14:25:32 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 20 Jan 2021 14:25:32 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 20 Jan 2021 14:25:31 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10KKPWol090495; Wed, 20 Jan 2021 14:25:32 -0600 From: Dave Gerlach To: Nishanth Menon CC: Dave Gerlach , , , Rob Herring , Tony Lindgren , Vignesh Raghavendra , Suman Anna , Sekhar Nori , Kishon Vijay Abraham , Lokesh Vutla , Aswath Govindraju Subject: [PATCH v3 0/5] arm64: Initial support for Texas Instruments AM642 Platform Date: Wed, 20 Jan 2021 14:25:27 -0600 Message-ID: <20210120202532.9011-1-d-gerlach@ti.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This is v3 of the series to add initial support for the latest new SoC, AM642, from Texas Instruments. Additional detail can be found in the patch descriptions, also see AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 This version contains a few minor fixes from v2: * Use the appropriate 'arm,cortex-a53-pmu' instead of 'arm,armv8-pmuv3' for ARM pmu node based on Sudeep's comment from v2. * Fix a typo in the 'dmas' property on main_spi0 * Drop main_spi0 from board dts as a more appropriate compatible to use for the eeprom will be available after [1] is merged. * Add 'gpio-line-names' under main_i2c1. v2: https://lore.kernel.org/linux-arm-kernel/20210119163927.774-1-d-gerlach@ti.com/ v1: https://lore.kernel.org/linux-arm-kernel/20201125052004.17823-1-d-gerlach@ti.com/ Regards, Dave [1] https://lore.kernel.org/patchwork/project/lkml/list/?series=478815 Dave Gerlach (4): dt-bindings: arm: ti: Add bindings for AM642 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64 arm64: dts: ti: Add support for AM642 SoC arm64: dts: ti: Add support for AM642 EVM Peter Ujfalusi (1): arm64: dts: ti: k3-am64-main: Enable DMA support .../devicetree/bindings/arm/ti/k3.yaml | 6 + arch/arm64/boot/dts/ti/Makefile | 2 + arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 406 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi | 76 ++++ arch/arm64/boot/dts/ti/k3-am64.dtsi | 103 +++++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 246 +++++++++++ arch/arm64/boot/dts/ti/k3-am642.dtsi | 65 +++ include/dt-bindings/pinctrl/k3.h | 5 +- 8 files changed, 908 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am64-main.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am64.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm.dts create mode 100644 arch/arm64/boot/dts/ti/k3-am642.dtsi -- 2.28.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D89AEC433E0 for ; Wed, 20 Jan 2021 20:27:50 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82E15233FC for ; Wed, 20 Jan 2021 20:27:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 82E15233FC Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=jQSFGgu+dBe8PfbQskfUUxMPXXrTTLLUI6eEMQuzSik=; b=wY8w1TC1RIwcLy4ZcCDGMjKklp 6nA+jqD1PsBzgqBwCJYrwvSrgIkMZ2gl1u02YWeB0av0ympbC7MJoKgq+jqBk0v9IF+YUa8YuX+b2 WwpLdLjTjNXurjIbttKvu6i3Pf2SqYgAnZuJsXzelYgX5wRbnCujtvxnSsfe7BT4+jbe+YBP+/PWH YjfwjISelCBui8ymWa+zhw1hf0zuay2oUQzbQI/25JrIU9KXEBI0wDw8LUMmf67NpuiJy4SSB8QFA KoyiPgCBhri62bU8K0FWuB5h235yczYGoY78eh66qh/GNnVdpSnkvUIQb2BSEuF1KpLwS2YLFVqyH B5xQZ4zw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l2K2u-0007AM-N1; Wed, 20 Jan 2021 20:25:40 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l2K2q-00078h-Tt for linux-arm-kernel@lists.infradead.org; Wed, 20 Jan 2021 20:25:38 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 10KKPWPW039649; Wed, 20 Jan 2021 14:25:32 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1611174332; bh=Twc/GQf12aJeqk1mHxxtbn5jnBdXtyChT6TgBPfGu/M=; h=From:To:CC:Subject:Date; b=Pz8w0D/ttlbqoMB0QkvJwoYlSkDdce3HnJsJqUDYiPVjLyvH8L/7TJvoaS2X6sD0J tuvY47hgfJ2kyzzICguhLZd/Yr8VZH8XK3mUAUXdWIgyhRx/IfYlYtWX8glg+0Z8Jh r8qxG9ZJnnX52WxNhaN/lbNQE8PBFxultiY9EXSo= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 10KKPWmt050851 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 Jan 2021 14:25:32 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 20 Jan 2021 14:25:32 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 20 Jan 2021 14:25:31 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10KKPWol090495; Wed, 20 Jan 2021 14:25:32 -0600 From: Dave Gerlach To: Nishanth Menon Subject: [PATCH v3 0/5] arm64: Initial support for Texas Instruments AM642 Platform Date: Wed, 20 Jan 2021 14:25:27 -0600 Message-ID: <20210120202532.9011-1-d-gerlach@ti.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210120_152537_120624_702BC3F4 X-CRM114-Status: GOOD ( 15.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Vignesh Raghavendra , Dave Gerlach , Tony Lindgren , Sekhar Nori , Kishon Vijay Abraham , Lokesh Vutla , Rob Herring , Aswath Govindraju , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is v3 of the series to add initial support for the latest new SoC, AM642, from Texas Instruments. Additional detail can be found in the patch descriptions, also see AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 This version contains a few minor fixes from v2: * Use the appropriate 'arm,cortex-a53-pmu' instead of 'arm,armv8-pmuv3' for ARM pmu node based on Sudeep's comment from v2. * Fix a typo in the 'dmas' property on main_spi0 * Drop main_spi0 from board dts as a more appropriate compatible to use for the eeprom will be available after [1] is merged. * Add 'gpio-line-names' under main_i2c1. v2: https://lore.kernel.org/linux-arm-kernel/20210119163927.774-1-d-gerlach@ti.com/ v1: https://lore.kernel.org/linux-arm-kernel/20201125052004.17823-1-d-gerlach@ti.com/ Regards, Dave [1] https://lore.kernel.org/patchwork/project/lkml/list/?series=478815 Dave Gerlach (4): dt-bindings: arm: ti: Add bindings for AM642 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64 arm64: dts: ti: Add support for AM642 SoC arm64: dts: ti: Add support for AM642 EVM Peter Ujfalusi (1): arm64: dts: ti: k3-am64-main: Enable DMA support .../devicetree/bindings/arm/ti/k3.yaml | 6 + arch/arm64/boot/dts/ti/Makefile | 2 + arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 406 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi | 76 ++++ arch/arm64/boot/dts/ti/k3-am64.dtsi | 103 +++++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 246 +++++++++++ arch/arm64/boot/dts/ti/k3-am642.dtsi | 65 +++ include/dt-bindings/pinctrl/k3.h | 5 +- 8 files changed, 908 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am64-main.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am64.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am642-evm.dts create mode 100644 arch/arm64/boot/dts/ti/k3-am642.dtsi -- 2.28.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel