[PATCH 00/11] More minor clean-ups and improvements

[PATCH 00/11] More minor clean-ups and improvements

[Simon Glass]

This series includes a collection of small things noticed while bringing
up verified boot on Coral.


Simon Glass (11):
  spl: Tidy up SPL/TPL malloc sizes
  x86: coral: Support TPM and RTC in SPL
  i2c: desigware: Add an alias for Intel Apollo Lake
  sandbox: Disable I2C emulators in SPL
  dm: core: Don't inline dev_read...() calls with of-platdata
  clk: Add debugging for return values
  clk: x86: Correct the driver name
  dm: core: Add a comment about pinctrl_select_state()
  dm: core: Update ofnode_read_fmap_entry() to read hashes
  Add a symlink for ctype.h
  binman: Print a debug message when binman selects a node

 Kconfig                                      | 13 ++++---
 arch/sandbox/dts/sandbox.dtsi                | 10 ++++--
 arch/sandbox/dts/test.dts                    | 10 ++++++
 arch/x86/dts/chromebook_coral.dts            | 20 ++++++++++-
 arch/x86/include/asm/arch-apollolake/iomap.h |  3 ++
 configs/sandbox_spl_defconfig                |  1 -
 drivers/clk/clk-uclass.c                     | 16 ++++++---
 drivers/clk/intel/clk_intel.c                |  4 +--
 drivers/core/device.c                        |  9 +++++
 drivers/core/of_extra.c                      | 21 ++++++-----
 drivers/i2c/Makefile                         |  2 ++
 drivers/i2c/designware_i2c_pci.c             |  2 ++
 include/ctype.h                              |  1 +
 include/dm/read.h                            |  3 +-
 lib/binman.c                                 |  2 ++
 test/dm/Makefile                             |  1 +
 test/dm/of_extra.c                           | 38 ++++++++++++++++++++
 test/dm/of_platdata.c                        |  8 ++---
 18 files changed, 132 insertions(+), 32 deletions(-)
 create mode 120000 include/ctype.h
 create mode 100644 test/dm/of_extra.c

-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 01/11] spl: Tidy up SPL/TPL malloc sizes

[Simon Glass]

The current help talks about relocation which doesn't apply to SPL and
TPL. Update it to avoid confusion.

Also make the TPL size default to the same as the SPL size, since this is
more likely to be a useful value than the one used by U-Boot proper, which
may be quite a bit larger.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 Kconfig | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/Kconfig b/Kconfig
index 6dc20ed25b2..86f0a39bb08 100644
--- a/Kconfig
+++ b/Kconfig
@@ -217,22 +217,25 @@ config SYS_MALLOC_LEN
 	  TODO: Use for other architectures
 
 config SPL_SYS_MALLOC_F_LEN
-	hex "Size of malloc() pool in SPL before relocation"
+	hex "Size of malloc() pool in SPL"
 	depends on SYS_MALLOC_F && SPL
 	default 0x2800 if RCAR_GEN3
 	default SYS_MALLOC_F_LEN
 	help
-	  Before relocation, memory is very limited on many platforms. Still,
+	  In SPL memory is very limited on many platforms. Still,
 	  we can provide a small malloc() pool if needed. Driver model in
 	  particular needs this to operate, so that it can allocate the
 	  initial serial device and any others that are needed.
 
+	  It is possible to enable CONFIG_SYS_SPL_MALLOC_START to start a new
+	  malloc() region in SDRAM once it is inited.
+
 config TPL_SYS_MALLOC_F_LEN
-	hex "Size of malloc() pool in TPL before relocation"
+	hex "Size of malloc() pool in TPL"
 	depends on SYS_MALLOC_F && TPL
-	default SYS_MALLOC_F_LEN
+	default SPL_SYS_MALLOC_F_LEN
 	help
-	  Before relocation, memory is very limited on many platforms. Still,
+	  In TPL memory is very limited on many platforms. Still,
 	  we can provide a small malloc() pool if needed. Driver model in
 	  particular needs this to operate, so that it can allocate the
 	  initial serial device and any others that are needed.
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 02/11] x86: coral: Support TPM and RTC in SPL

[Simon Glass]

Update the devicetree so that the TPM and RTC can be used in SPL. Also
enable the pins used for getting the memory configuration settings while
we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/x86/dts/chromebook_coral.dts            | 20 +++++++++++++++++++-
 arch/x86/include/asm/arch-apollolake/iomap.h |  3 +++
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index bfbdd517d1f..2ffe3b423c3 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /dts-v1/;
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/x86-gpio.h>
 
 /include/ "skeleton.dtsi"
@@ -99,6 +100,7 @@
 	clk: clock {
 		compatible = "intel,apl-clk";
 		#clock-cells = <1>;
+		u-boot,dm-pre-reloc;
 	};
 
 	cpus {
@@ -139,6 +141,7 @@
 	};
 
 	acpi_gpe: general-purpose-events {
+		u-boot,dm-pre-reloc;
 		reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>;
 		compatible = "intel,acpi-gpe";
 		interrupt-controller;
@@ -417,8 +420,10 @@
 		};
 
 		i2c_2: i2c2 at 16,2 {
-			compatible = "intel,apl-i2c";
+			compatible = "intel,apl-i2c", "snps,designware-i2c-pci";
 			reg = <0x0200b210 0 0 0 0>;
+			early-regs = <IOMAP_I2C2_BASE 0x1000>;
+			u-boot,dm-pre-reloc;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			clock-frequency = <400000>;
@@ -429,6 +434,7 @@
 			tpm: tpm at 50 {
 				reg = <0x50>;
 				compatible = "google,cr50";
+				u-boot,dm-pre-reloc;
 				u-boot,i2c-offset-len = <0>;
 				ready-gpios = <&gpio_n 28 GPIO_ACTIVE_LOW>;
 				interrupts-extended = <&acpi_gpe GPIO_28_IRQ
@@ -589,6 +595,7 @@
 				u-boot,dm-pre-reloc;
 				cros_ec: cros-ec {
 					u-boot,dm-pre-proper;
+					u-boot,dm-vpl;
 					compatible = "google,cros-ec-lpc";
 					reg = <0x204 1 0x200 1 0x880 0x80>;
 
@@ -664,6 +671,11 @@
 		PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1)	 /* LPC_AD3 */
 		PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1) /* LPC_CLKRUN_N */
 		PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1) /* LPC_FRAME_N */
+
+		PAD_CFG_GPI(GPIO_101, NONE, DEEP) /* FST_IO2 -- MEM_CONFIG0 */
+		PAD_CFG_GPI(GPIO_102, NONE, DEEP) /* FST_IO3 -- MEM_CONFIG1 */
+		PAD_CFG_GPI(GPIO_38, NONE, DEEP) /* LPSS_UART0_RXD - MEM_CONFIG2*/
+		PAD_CFG_GPI(GPIO_45, NONE, DEEP) /* LPSS_UART1_CTS - MEM_CONFIG3 */
 		>;
 };
 
@@ -1217,3 +1229,9 @@
 		PAD_CFG_GPI(GPIO_73, UP_20K, DEEP)	 /* GP_CAMERASB11 */
 	>;
 };
+
+&rtc {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/x86/include/asm/arch-apollolake/iomap.h b/arch/x86/include/asm/arch-apollolake/iomap.h
index 21c5f33021a..a4ea1507073 100644
--- a/arch/x86/include/asm/arch-apollolake/iomap.h
+++ b/arch/x86/include/asm/arch-apollolake/iomap.h
@@ -33,6 +33,9 @@
 #define SRAM_SIZE_2		(4 * KiB)
 #endif
 
+/* Early address for I2C port 2 */
+#define IOMAP_I2C2_BASE		(0xfe020000 + 2 * 0x1000)
+
 /*
  * Use UART2. To use UART1 you need to set '2' to '1', change device tree serial
  * node name and 'reg' property, and update CONFIG_DEBUG_UART_BASE.
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 03/11] i2c: desigware: Add an alias for Intel Apollo Lake

[Simon Glass]

Add an alias so that this driver can be used in TPL on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/i2c/designware_i2c_pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
index ec0cdf62207..9e387737b6e 100644
--- a/drivers/i2c/designware_i2c_pci.c
+++ b/drivers/i2c/designware_i2c_pci.c
@@ -192,6 +192,8 @@ static const struct udevice_id designware_i2c_pci_ids[] = {
 	{ }
 };
 
+DM_DRIVER_ALIAS(i2c_designware_pci, intel_apl_i2c)
+
 U_BOOT_DRIVER(i2c_designware_pci) = {
 	.name	= "i2c_designware_pci",
 	.id	= UCLASS_I2C,
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 04/11] sandbox: Disable I2C emulators in SPL

[Simon Glass]

These cannot work with of-platdata since they currently need the
devicetree at runtime. Disable the emulators and the sandbox I2C driver
that needs them. We can enable these later, if needed for testing.

Switch the of_plat_parent test over to use a simple bus instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/sandbox/dts/sandbox.dtsi | 10 +++++++---
 configs/sandbox_spl_defconfig |  1 -
 drivers/i2c/Makefile          |  2 ++
 test/dm/of_platdata.c         |  8 ++++----
 4 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index d842f021760..dc933f3bfc7 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -260,10 +260,14 @@
 		stringarray = "pre-proper";
 	};
 
-	spl-test7 {
+	test-bus {
+		compatible = "simple-bus";
 		u-boot,dm-spl;
-		compatible = "sandbox,spl-test";
-		stringarray = "spl";
+		spl-test7 {
+			u-boot,dm-spl;
+			compatible = "sandbox,spl-test";
+			stringarray = "spl";
+		};
 	};
 
 	square {
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index d193b18f47e..61dae34a6a2 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -101,7 +101,6 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_DEVRES=y
 CONFIG_DEBUG_DEVRES=y
-# CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_ADC=y
 CONFIG_ADC_SANDBOX=y
 CONFIG_AXI=y
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 1aac5c481e2..29aab0f9e30 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -39,7 +39,9 @@ obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o
 obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o
 obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o
 obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SYS_I2C_SANDBOX) += sandbox_i2c.o i2c-emul-uclass.o
+endif
 obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o
 obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
 obj-$(CONFIG_SYS_I2C_STM32F7) += stm32f7_i2c.o
diff --git a/test/dm/of_platdata.c b/test/dm/of_platdata.c
index cfc43a5b038..26c50922c56 100644
--- a/test/dm/of_platdata.c
+++ b/test/dm/of_platdata.c
@@ -210,11 +210,11 @@ DM_TEST(dm_test_of_plat_phandle, UT_TESTF_SCAN_PDATA);
 /* Test that device parents are correctly set up */
 static int dm_test_of_plat_parent(struct unit_test_state *uts)
 {
-	struct udevice *rtc, *i2c;
+	struct udevice *dev, *bus;
 
-	ut_assertok(uclass_first_device_err(UCLASS_RTC, &rtc));
-	ut_assertok(uclass_first_device_err(UCLASS_I2C, &i2c));
-	ut_asserteq_ptr(i2c, dev_get_parent(rtc));
+	ut_assertok(uclass_first_device_err(UCLASS_SIMPLE_BUS, &bus));
+	ut_assertok(device_first_child_err(bus, &dev));
+	ut_asserteq_ptr(bus, dev_get_parent(dev));
 
 	return 0;
 }
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 05/11] dm: core: Don't inline dev_read...() calls with of-platdata

[Simon Glass]

At present if these calls are used with of-platdata, a confusing error is
produced, referring to a function not actually called by the code causing
the problem.

Fix this by not inlining, so that the error mentions the dev_read_...()
function and it is more obvious what is going on.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 include/dm/read.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/dm/read.h b/include/dm/read.h
index c875e11a132..f6f8b875d1c 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -30,8 +30,7 @@ static inline const struct device_node *dev_np(const struct udevice *dev)
 }
 #endif
 
-#ifndef CONFIG_DM_DEV_READ_INLINE
-
+#if !defined(CONFIG_DM_DEV_READ_INLINE) || CONFIG_IS_ENABLED(OF_PLATDATA)
 /**
  * dev_read_u32() - read a 32-bit integer from a device's DT property
  *
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 06/11] clk: Add debugging for return values

[Simon Glass]

Use the log_msg_ret() mechanism to get error-return information when
clocks fail to probe, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/clk/clk-uclass.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index b75056718bf..d5c4e3cbe51 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -83,7 +83,7 @@ static int clk_get_by_index_tail(int ret, ofnode node,
 	if (ret) {
 		debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
 		      __func__, ret);
-		return ret;
+		return log_msg_ret("get", ret);
 	}
 
 	clk->dev = dev_clk;
@@ -96,14 +96,15 @@ static int clk_get_by_index_tail(int ret, ofnode node,
 		ret = clk_of_xlate_default(clk, args);
 	if (ret) {
 		debug("of_xlate() failed: %d\n", ret);
-		return ret;
+		return log_msg_ret("xlate", ret);
 	}
 
 	return clk_request(dev_clk, clk);
 err:
 	debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
 	      __func__, ofnode_get_name(node), list_name, index, ret);
-	return ret;
+
+	return log_msg_ret("prop", ret);
 }
 
 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
@@ -122,7 +123,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
 	if (ret) {
 		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 		      __func__, ret);
-		return ret;
+		return log_ret(ret);
 	}
 
 
@@ -470,6 +471,7 @@ int clk_free(struct clk *clk)
 ulong clk_get_rate(struct clk *clk)
 {
 	const struct clk_ops *ops;
+	int ret;
 
 	debug("%s(clk=%p)\n", __func__, clk);
 	if (!clk_valid(clk))
@@ -479,7 +481,11 @@ ulong clk_get_rate(struct clk *clk)
 	if (!ops->get_rate)
 		return -ENOSYS;
 
-	return ops->get_rate(clk);
+	ret = ops->get_rate(clk);
+	if (ret)
+		return log_ret(ret);
+
+	return 0;
 }
 
 struct clk *clk_get_parent(struct clk *clk)
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 07/11] clk: x86: Correct the driver name

[Simon Glass]

The current driver name does not match its compatible string, so
of-platdata does not work correctly. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/clk/intel/clk_intel.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/intel/clk_intel.c b/drivers/clk/intel/clk_intel.c
index b633934d90a..46ccbb1d834 100644
--- a/drivers/clk/intel/clk_intel.c
+++ b/drivers/clk/intel/clk_intel.c
@@ -29,8 +29,8 @@ static const struct udevice_id intel_clk_ids[] = {
 	{ }
 };
 
-U_BOOT_DRIVER(clk_intel) = {
-	.name		= "clk_intel",
+U_BOOT_DRIVER(intel_apl_clk) = {
+	.name		= "intel_apl_clk",
 	.id		= UCLASS_CLK,
 	.of_match	= intel_clk_ids,
 	.ops		= &intel_clk_ops,
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 08/11] dm: core: Add a comment about pinctrl_select_state()

[Simon Glass]

The use of pinctrl in the core of driver model is useful but can provoke
some strange behaviour. Add a comment to aid debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/core/device.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index aeab3836ed7..8629df8defb 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -462,6 +462,15 @@ int device_probe(struct udevice *dev)
 	 * continue regardless of the result of pinctrl. Don't process pinctrl
 	 * settings for pinctrl devices since the device may not yet be
 	 * probed.
+	 *
+	 * This call can produce some non-intuitive results. For example, on an
+	 * x86 device where dev is the main PCI bus, the pinctrl device may be
+	 * child or grandchild of that bus, meaning that the child will be
+	 * probed here. If the child happens to be the P2SB and the pinctrl
+	 * device is a child of that, then both the pinctrl and P2SB will be
+	 * probed by this call. This works because the DM_FLAG_ACTIVATED flag
+	 * is set just above. However, the PCI bus' probe() method and
+	 * associated uclass methods have not yet been called.
 	 */
 	if (dev->parent && device_get_uclass_id(dev) != UCLASS_PINCTRL)
 		pinctrl_select_state(dev, "default");
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 09/11] dm: core: Update ofnode_read_fmap_entry() to read hashes

[Simon Glass]

At present this function uses the old format for reading hashes. Add
support for the current format.

Add a test while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/sandbox/dts/test.dts | 10 ++++++++++
 drivers/core/of_extra.c   | 21 ++++++++++++---------
 test/dm/Makefile          |  1 +
 test/dm/of_extra.c        | 38 ++++++++++++++++++++++++++++++++++++++
 4 files changed, 61 insertions(+), 9 deletions(-)
 create mode 100644 test/dm/of_extra.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index f86cd0d3b27..e95f4631bf2 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -90,6 +90,16 @@
 			wp-ro {
 				image-pos = <0xf000>;
 				size = <0x1000>;
+				used = <0x884>;
+				compress = "lz4";
+				uncomp-size = <0xcf8>;
+				hash {
+					algo = "sha256";
+					value = [00 01 02 03 04 05 06 07
+						08 09 0a 0b 0c 0d 0e 0f
+						10 11 12 13 14 15 16 17
+						18 19 1a 1b 1c 1d 1e 1f];
+				};
 			};
 			rw {
 				image-pos = <0x10000>;
diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c
index 6420e6ec448..653344529e6 100644
--- a/drivers/core/of_extra.c
+++ b/drivers/core/of_extra.c
@@ -14,16 +14,17 @@
 int ofnode_read_fmap_entry(ofnode node, struct fmap_entry *entry)
 {
 	const char *prop;
+	ofnode subnode;
 
 	if (ofnode_read_u32(node, "image-pos", &entry->offset)) {
 		debug("Node '%s' has bad/missing 'image-pos' property\n",
 		      ofnode_get_name(node));
-		return log_ret(-ENOENT);
+		return log_msg_ret("image-pos", -ENOENT);
 	}
 	if (ofnode_read_u32(node, "size", &entry->length)) {
 		debug("Node '%s' has bad/missing 'size' property\n",
 		      ofnode_get_name(node));
-		return log_ret(-ENOENT);
+		return log_msg_ret("size", -ENOENT);
 	}
 	entry->used = ofnode_read_s32_default(node, "used", entry->length);
 	prop = ofnode_read_string(node, "compress");
@@ -31,18 +32,20 @@ int ofnode_read_fmap_entry(ofnode node, struct fmap_entry *entry)
 		if (!strcmp(prop, "lz4"))
 			entry->compress_algo = FMAP_COMPRESS_LZ4;
 		else
-			return log_msg_ret("Unknown compression algo",
-					   -EINVAL);
+			return log_msg_ret("compression algo", -EINVAL);
 	} else {
 		entry->compress_algo = FMAP_COMPRESS_NONE;
 	}
 	entry->unc_length = ofnode_read_s32_default(node, "uncomp-size",
 						    entry->length);
-	prop = ofnode_read_string(node, "hash");
-	if (prop)
-		entry->hash_size = strlen(prop);
-	entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
-	entry->hash = (uint8_t *)prop;
+	subnode = ofnode_find_subnode(node, "hash");
+	if (ofnode_valid(subnode)) {
+		prop = ofnode_read_prop(subnode, "value", &entry->hash_size);
+
+		/* Assume it is sha256 */
+		entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
+		entry->hash = (uint8_t *)prop;
+	}
 
 	return 0;
 }
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 46e076ed099..32104f7a5b3 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -41,6 +41,7 @@ obj-y += fdtdec.o
 obj-$(CONFIG_UT_DM) += nop.o
 obj-y += ofnode.o
 obj-y += ofread.o
+obj-y += of_extra.o
 obj-$(CONFIG_OSD) += osd.o
 obj-$(CONFIG_DM_VIDEO) += panel.o
 obj-$(CONFIG_DM_PCI) += pci.o
diff --git a/test/dm/of_extra.c b/test/dm/of_extra.c
new file mode 100644
index 00000000000..b19cd3787d8
--- /dev/null
+++ b/test/dm/of_extra.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/of_extra.h>
+#include <dm/test.h>
+#include <test/ut.h>
+#include <u-boot/sha256.h>
+
+static int dm_test_ofnode_read_fmap_entry(struct unit_test_state *uts)
+{
+	const char hash_expect[] = {
+		0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+		0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+		0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+		0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+	};
+	struct fmap_entry entry;
+	ofnode node;
+
+	node = ofnode_path("/cros-ec/flash/wp-ro");
+	ut_assertok(ofnode_read_fmap_entry(node, &entry));
+	ut_asserteq(0xf000, entry.offset);
+	ut_asserteq(0x1000, entry.length);
+	ut_asserteq(0x884, entry.used);
+	ut_asserteq(FMAP_COMPRESS_LZ4, entry.compress_algo);
+	ut_asserteq(0xcf8, entry.unc_length);
+	ut_asserteq(FMAP_HASH_SHA256, entry.hash_algo);
+	ut_asserteq(SHA256_SUM_LEN, entry.hash_size);
+	ut_asserteq_mem(hash_expect, entry.hash, SHA256_SUM_LEN);
+
+	return 0;
+}
+DM_TEST(dm_test_ofnode_read_fmap_entry, 0);
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 10/11] Add a symlink for ctype.h

[Simon Glass]

Libraries that link with U-Boot typically may expect to be able to include
ctype.h but this file is in a different place in U-Boot. Add a symlink to
make this work.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 include/ctype.h | 1 +
 1 file changed, 1 insertion(+)
 create mode 120000 include/ctype.h

diff --git a/include/ctype.h b/include/ctype.h
new file mode 120000
index 00000000000..9e43f9c6c6c
--- /dev/null
+++ b/include/ctype.h
@@ -0,0 +1 @@
+linux/ctype.h
\ No newline at end of file
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 11/11] binman: Print a debug message when binman selects a node

[Simon Glass]

Add some debugging to indicate which node the binman library is looking
at.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 lib/binman.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/binman.c b/lib/binman.c
index f415df30545..6040ec89241 100644
--- a/lib/binman.c
+++ b/lib/binman.c
@@ -145,6 +145,8 @@ int binman_init(void)
 	if (ret)
 		return log_msg_ret("node", -ENOENT);
 	binman_set_rom_offset(ROM_OFFSET_NONE);
+	log_debug("binman: Selected image node '%s'\n",
+		  ofnode_get_name(binman->image));
 
 	return 0;
 }
-- 
2.30.0.280.ga3ce27912f-goog

[PATCH 03/11] i2c: desigware: Add an alias for Intel Apollo Lake

[Heiko Schocher]

Hello Simon,

Am 21.01.21 um 21:57 schrieb Simon Glass:
> Add an alias so that this driver can be used in TPL on coral.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
>  drivers/i2c/designware_i2c_pci.c | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Heiko Schocher <hs@denx.de>

bye,
Heiko
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: hs at denx.de

[PATCH 04/11] sandbox: Disable I2C emulators in SPL

[Heiko Schocher]

Hello Simon,

Am 21.01.21 um 21:57 schrieb Simon Glass:
> These cannot work with of-platdata since they currently need the
> devicetree at runtime. Disable the emulators and the sandbox I2C driver
> that needs them. We can enable these later, if needed for testing.
> 
> Switch the of_plat_parent test over to use a simple bus instead.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
>  arch/sandbox/dts/sandbox.dtsi | 10 +++++++---
>  configs/sandbox_spl_defconfig |  1 -
>  drivers/i2c/Makefile          |  2 ++
>  test/dm/of_platdata.c         |  8 ++++----
>  4 files changed, 13 insertions(+), 8 deletions(-)

Reviewed-by: Heiko Schocher <hs@denx.de>

bye,
Heiko
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: hs at denx.de

[PATCH 11/11] binman: Print a debug message when binman selects a node

[Simon Glass]

Add some debugging to indicate which node the binman library is looking
at.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 lib/binman.c | 2 ++
 1 file changed, 2 insertions(+)

Applied to u-boot-dm, thanks!

[PATCH 10/11] Add a symlink for ctype.h

[Simon Glass]

Libraries that link with U-Boot typically may expect to be able to include
ctype.h but this file is in a different place in U-Boot. Add a symlink to
make this work.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 include/ctype.h | 1 +
 1 file changed, 1 insertion(+)
 create mode 120000 include/ctype.h

Applied to u-boot-dm, thanks!

[PATCH 08/11] dm: core: Add a comment about pinctrl_select_state()

[Simon Glass]

The use of pinctrl in the core of driver model is useful but can provoke
some strange behaviour. Add a comment to aid debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/core/device.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Applied to u-boot-dm, thanks!

[PATCH 07/11] clk: x86: Correct the driver name

[Simon Glass]

The current driver name does not match its compatible string, so
of-platdata does not work correctly. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/clk/intel/clk_intel.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Applied to u-boot-dm, thanks!

[PATCH 06/11] clk: Add debugging for return values

[Simon Glass]

Use the log_msg_ret() mechanism to get error-return information when
clocks fail to probe, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/clk/clk-uclass.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

Applied to u-boot-dm, thanks!

[PATCH 05/11] dm: core: Don't inline dev_read...() calls with of-platdata

[Simon Glass]

At present if these calls are used with of-platdata, a confusing error is
produced, referring to a function not actually called by the code causing
the problem.

Fix this by not inlining, so that the error mentions the dev_read_...()
function and it is more obvious what is going on.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 include/dm/read.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Applied to u-boot-dm, thanks!

[PATCH 04/11] sandbox: Disable I2C emulators in SPL

[Simon Glass]

Hello Simon,

Am 21.01.21 um 21:57 schrieb Simon Glass:
> These cannot work with of-platdata since they currently need the
> devicetree at runtime. Disable the emulators and the sandbox I2C driver
> that needs them. We can enable these later, if needed for testing.
>
> Switch the of_plat_parent test over to use a simple bus instead.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  arch/sandbox/dts/sandbox.dtsi | 10 +++++++---
>  configs/sandbox_spl_defconfig |  1 -
>  drivers/i2c/Makefile          |  2 ++
>  test/dm/of_platdata.c         |  8 ++++----
>  4 files changed, 13 insertions(+), 8 deletions(-)

Reviewed-by: Heiko Schocher <hs@denx.de>

bye,
Heiko
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: hs at denx.de

Applied to u-boot-dm, thanks!

[PATCH 03/11] i2c: desigware: Add an alias for Intel Apollo Lake

[Simon Glass]

Hello Simon,

Am 21.01.21 um 21:57 schrieb Simon Glass:
> Add an alias so that this driver can be used in TPL on coral.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
>  drivers/i2c/designware_i2c_pci.c | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Heiko Schocher <hs@denx.de>

bye,
Heiko
-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: hs at denx.de

Applied to u-boot-dm, thanks!

[PATCH 02/11] x86: coral: Support TPM and RTC in SPL

[Simon Glass]

Update the devicetree so that the TPM and RTC can be used in SPL. Also
enable the pins used for getting the memory configuration settings while
we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/x86/dts/chromebook_coral.dts            | 20 +++++++++++++++++++-
 arch/x86/include/asm/arch-apollolake/iomap.h |  3 +++
 2 files changed, 22 insertions(+), 1 deletion(-)

Applied to u-boot-dm, thanks!

[PATCH 01/11] spl: Tidy up SPL/TPL malloc sizes

[Simon Glass]

The current help talks about relocation which doesn't apply to SPL and
TPL. Update it to avoid confusion.

Also make the TPL size default to the same as the SPL size, since this is
more likely to be a useful value than the one used by U-Boot proper, which
may be quite a bit larger.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 Kconfig | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

Applied to u-boot-dm, thanks!