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From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [PATCH v13 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs
Date: Wed, 27 Jan 2021 19:23:38 +0200	[thread overview]
Message-ID: <20210127172338.1519034-2-gwan-gyeong.mun@intel.com> (raw)
In-Reply-To: <20210127172338.1519034-1-gwan-gyeong.mun@intel.com>

In order to support the PSR state of each transcoder, it adds
i915_psr_status to sub-directory of each transcoder.

v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal
    permissions '0444'
v5: Addressed JJani Nikula's review comments
 - Remove checking of Gen12 for i915_psr_status.
 - Add check of HAS_PSR()
 - Remove meaningless check routine.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../gpu/drm/i915/display/intel_display_debugfs.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 9868253df61f..c3ffa50d92b1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -2223,6 +2223,16 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
 }
 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
 
+static int i915_psr_status_show(struct seq_file *m, void *data)
+{
+	struct drm_connector *connector = m->private;
+	struct intel_dp *intel_dp =
+		intel_attached_dp(to_intel_connector(connector));
+
+	return intel_psr_status(m, intel_dp);
+}
+DEFINE_SHOW_ATTRIBUTE(i915_psr_status);
+
 #define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
 				seq_puts(m, "LPSP: incapable\n"))
 
@@ -2398,6 +2408,12 @@ int intel_connector_debugfs_add(struct drm_connector *connector)
 				    connector, &i915_psr_sink_status_fops);
 	}
 
+	if (HAS_PSR(dev_priv) &&
+	    connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+		debugfs_create_file("i915_psr_status", 0444, root,
+				    connector, &i915_psr_status_fops);
+	}
+
 	if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
 	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
 	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
-- 
2.30.0

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  reply	other threads:[~2021-01-27 17:23 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-27 17:23 [Intel-gfx] [PATCH v13 1/2] drm/i915/display: Support PSR Multiple Instances Gwan-gyeong Mun
2021-01-27 17:23 ` Gwan-gyeong Mun [this message]
2021-01-27 19:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v13,1/2] " Patchwork
2021-01-27 19:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-27 19:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-27 20:43 ` [Intel-gfx] [PATCH v13 1/2] " Souza, Jose
2021-01-29  7:44   ` Mun, Gwan-gyeong
2021-01-27 23:39 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v13,1/2] " Patchwork

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