All of lore.kernel.org
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v3 06/24] tcg/arm: Split out target constraints to tcg-target-con-str.h
Date: Fri, 29 Jan 2021 10:10:10 -1000	[thread overview]
Message-ID: <20210129201028.787853-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210129201028.787853-1-richard.henderson@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/arm/tcg-target-con-str.h | 22 +++++++++++
 tcg/arm/tcg-target.h         |  1 +
 tcg/arm/tcg-target.c.inc     | 74 +++++++++---------------------------
 3 files changed, 41 insertions(+), 56 deletions(-)
 create mode 100644 tcg/arm/tcg-target-con-str.h

diff --git a/tcg/arm/tcg-target-con-str.h b/tcg/arm/tcg-target-con-str.h
new file mode 100644
index 0000000000..a0ab7747db
--- /dev/null
+++ b/tcg/arm/tcg-target-con-str.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Define Arm target-specific operand constraints.
+ * Copyright (c) 2021 Linaro
+ */
+
+/*
+ * Define constraint letters for register sets:
+ * REGS(letter, register_mask)
+ */
+REGS('r', ALL_GENERAL_REGS)
+REGS('l', ALL_QLOAD_REGS)
+REGS('s', ALL_QSTORE_REGS)
+
+/*
+ * Define constraint letters for constants:
+ * CONST(letter, TCG_CT_CONST_* bit set)
+ */
+CONST('I', TCG_CT_CONST_ARM)
+CONST('K', TCG_CT_CONST_INV)
+CONST('N', TCG_CT_CONST_NEG)
+CONST('Z', TCG_CT_CONST_ZERO)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 8d1fee6327..16336cd545 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -142,5 +142,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t);
 #define TCG_TARGET_NEED_LDST_LABELS
 #endif
 #define TCG_TARGET_NEED_POOL_LABELS
+#define TCG_TARGET_CON_STR_H
 
 #endif
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index c2b26b3c45..bbd41d2491 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -237,65 +237,27 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
 #define TCG_CT_CONST_NEG  0x400
 #define TCG_CT_CONST_ZERO 0x800
 
-/* parse target specific constraints */
-static const char *target_parse_constraint(TCGArgConstraint *ct,
-                                           const char *ct_str, TCGType type)
-{
-    switch (*ct_str++) {
-    case 'I':
-        ct->ct |= TCG_CT_CONST_ARM;
-        break;
-    case 'K':
-        ct->ct |= TCG_CT_CONST_INV;
-        break;
-    case 'N': /* The gcc constraint letter is L, already used here.  */
-        ct->ct |= TCG_CT_CONST_NEG;
-        break;
-    case 'Z':
-        ct->ct |= TCG_CT_CONST_ZERO;
-        break;
+#define ALL_GENERAL_REGS  0xffffu
 
-    case 'r':
-        ct->regs = 0xffff;
-        break;
-
-    /* qemu_ld address */
-    case 'l':
-        ct->regs = 0xffff;
+/*
+ * r0-r2 will be overwritten when reading the tlb entry (softmmu only)
+ * and r0-r1 doing the byte swapping, so don't use these.
+ * r3 is removed for softmmu to avoid clashes with helper arguments.
+ */
 #ifdef CONFIG_SOFTMMU
-        /* r0-r2,lr will be overwritten when reading the tlb entry,
-           so don't use these. */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
+#define ALL_QLOAD_REGS \
+    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
+                          (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \
+                          (1 << TCG_REG_R14)))
+#define ALL_QSTORE_REGS \
+    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
+                          (1 << TCG_REG_R2) | (1 << TCG_REG_R14) | \
+                          ((TARGET_LONG_BITS == 64) << TCG_REG_R3)))
+#else
+#define ALL_QLOAD_REGS   ALL_GENERAL_REGS
+#define ALL_QSTORE_REGS \
+    (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1)))
 #endif
-        break;
-
-    /* qemu_st address & data */
-    case 's':
-        ct->regs = 0xffff;
-        /* r0-r2 will be overwritten when reading the tlb entry (softmmu only)
-           and r0-r1 doing the byte swapping, so don't use these. */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
-#if defined(CONFIG_SOFTMMU)
-        /* Avoid clashes with registers being used for helper args */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
-#if TARGET_LONG_BITS == 64
-        /* Avoid clashes with registers being used for helper args */
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
-#endif
-        tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
-#endif
-        break;
-
-    default:
-        return NULL;
-    }
-    return ct_str;
-}
 
 static inline uint32_t rotl(uint32_t val, int n)
 {
-- 
2.25.1



  parent reply	other threads:[~2021-01-29 20:15 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-29 20:10 [PATCH v3 00/24] tcg: backend constraints cleanup Richard Henderson
2021-01-29 20:10 ` [PATCH v3 01/24] tcg/tci: Drop L and S constraints Richard Henderson
2021-01-29 20:10 ` [PATCH v3 02/24] tcg/tci: Remove TCG_TARGET_HAS_* ifdefs Richard Henderson
2021-01-29 23:16   ` Peter Maydell
2021-01-30  6:47     ` Richard Henderson
2021-01-30  7:15       ` Stefan Weil
2021-01-30  8:55         ` Richard Henderson
2021-01-29 20:10 ` [PATCH v3 03/24] tcg/i386: Move constraint type check to tcg_target_const_match Richard Henderson
2021-01-29 23:16   ` Peter Maydell
2021-01-29 20:10 ` [PATCH v3 04/24] tcg/i386: Tidy register constraint definitions Richard Henderson
2021-01-29 23:20   ` Peter Maydell
2021-01-30  6:50     ` Richard Henderson
2021-01-29 20:10 ` [PATCH v3 05/24] tcg/i386: Split out target constraints to tcg-target-con-str.h Richard Henderson
2021-01-29 23:23   ` Peter Maydell
2021-01-29 20:10 ` Richard Henderson [this message]
2021-01-29 20:10 ` [PATCH v3 07/24] tcg/aarch64: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 08/24] tcg/ppc: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 09/24] tcg/tci: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 10/24] tcg/mips: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 11/24] tcg/riscv: " Richard Henderson
2021-01-29 23:24   ` Peter Maydell
2021-01-29 20:10 ` [PATCH v3 12/24] tcg/s390: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 13/24] tcg/sparc: " Richard Henderson
2021-01-29 23:27   ` Peter Maydell
2021-01-31 20:03   ` Philippe Mathieu-Daudé
2021-01-29 20:10 ` [PATCH v3 14/24] tcg: Remove TCG_TARGET_CON_STR_H Richard Henderson
2021-01-29 20:10 ` [PATCH v3 15/24] tcg/i386: Split out constraint sets to tcg-target-con-set.h Richard Henderson
2021-01-29 20:10 ` [PATCH v3 16/24] tcg/aarch64: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 17/24] tcg/arm: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 18/24] tcg/mips: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 19/24] tcg/ppc: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 20/24] tcg/riscv: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 21/24] tcg/s390: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 22/24] tcg/sparc: " Richard Henderson
2021-01-29 20:10 ` [PATCH v3 23/24] tcg/tci: " Richard Henderson
2021-01-29 23:30   ` Peter Maydell
2021-01-29 20:10 ` [PATCH v3 24/24] tcg: Remove TCG_TARGET_CON_SET_H Richard Henderson
2021-01-29 20:37 ` [PATCH v3 00/24] tcg: backend constraints cleanup no-reply

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210129201028.787853-7-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.