From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PULL] topic/adl-s-enabling into drm-intel-next
Date: Mon, 1 Feb 2021 18:56:20 -0800 [thread overview]
Message-ID: <20210202025620.2212559-1-lucas.demarchi@intel.com> (raw)
Hi Rodrigo/Jani,
Here are the changes to add basic Alder Lake S support in the driver, with
patches touching both generic parts, gt and display. Remaining changes don't
need a topic branch anymore and can be applied individually to each branch.
thanks
Lucas De Marchi
***
topic/adl-s-enabling-2021-02-01-1:
Driver Changes:
- Add basic support for Alder Lake S, to be shared between
drm-intel-next and drm-intel-gt-next
The following changes since commit fb5cfcaa2efbb4c71abb1dfbc8f4da727e0bfd89:
Merge tag 'drm-intel-gt-next-2021-01-14' of git://anongit.freedesktop.org/drm/drm-intel into drm-next (2021-01-15 15:03:36 +1000)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/topic/adl-s-enabling-2021-02-01-1
for you to fetch changes up to 4043277ad18fc7cb9a79d0d043063fb5f42a6f06:
drm/i915/adl_s: Add GT and CTX WAs for ADL-S (2021-02-01 07:59:11 -0800)
----------------------------------------------------------------
Driver Changes:
- Add basic support for Alder Lake S, to be shared between
drm-intel-next and drm-intel-gt-next
----------------------------------------------------------------
Aditya Swarup (8):
drm/i915/tgl: Use TGL stepping info for applying WAs
drm/i915/adl_s: Configure DPLL for ADL-S
drm/i915/adl_s: Configure Port clock registers for ADL-S
drm/i915/adl_s: Initialize display for ADL-S
drm/i915/adl_s: Add adl-s ddc pin mapping
drm/i915/adl_s: Add vbt port and aux channel settings for adls
drm/i915/adl_s: Add display WAs for ADL-S
drm/i915/adl_s: Add GT and CTX WAs for ADL-S
Anusha Srivatsa (4):
drm/i915/adl_s: Add PCH support
drm/i915/adl_s: Add Interrupt Support
drm/i915/adl_s: Add PHYs for Alderlake S
drm/i915/adl_s: Load DMC
Caz Yokoyama (2):
drm/i915/adl_s: Add ADL-S platform info and PCI ids
x86/gpu: Add Alderlake-S stolen memory support
José Roberto de Souza (1):
drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION
Lucas De Marchi (1):
drm/i915/adl_s: Add power wells
Matt Roper (3):
drm/i915/adl_s: Update combo PHY master/slave relationships
drm/i915/adl_s: Update PHY_MISC programming
drm/i915/adl_s: Re-use TGL GuC/HuC firmware
Tejas Upadhyay (1):
drm/i915/adl_s: Update memory bandwidth parameters
arch/x86/kernel/early-quirks.c | 1 +
drivers/gpu/drm/i915/display/intel_bios.c | 70 +++++++++++++++----
drivers/gpu/drm/i915/display/intel_bw.c | 10 ++-
drivers/gpu/drm/i915/display/intel_combo_phy.c | 23 +++++--
drivers/gpu/drm/i915/display/intel_csr.c | 10 ++-
drivers/gpu/drm/i915/display/intel_ddi.c | 62 +++++++++++------
drivers/gpu/drm/i915/display/intel_display.c | 31 ++++++---
drivers/gpu/drm/i915/display/intel_display_power.c | 11 +--
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 ++++++++--
drivers/gpu/drm/i915/display/intel_hdmi.c | 20 +++++-
drivers/gpu/drm/i915/display/intel_psr.c | 4 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 8 +--
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 ++
drivers/gpu/drm/i915/gt/intel_workarounds.c | 68 +++++++++++-------
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 80 ++++++++++++++--------
drivers/gpu/drm/i915/i915_irq.c | 5 +-
drivers/gpu/drm/i915/i915_pci.c | 13 ++++
drivers/gpu/drm/i915/i915_reg.h | 50 ++++++++++++--
drivers/gpu/drm/i915/intel_device_info.c | 9 ++-
drivers/gpu/drm/i915/intel_device_info.h | 1 +
drivers/gpu/drm/i915/intel_pch.c | 8 ++-
drivers/gpu/drm/i915/intel_pch.h | 3 +
drivers/gpu/drm/i915/intel_pm.c | 2 +-
include/drm/i915_pciids.h | 11 +++
25 files changed, 417 insertions(+), 129 deletions(-)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2021-02-02 2:56 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-02 2:56 Lucas De Marchi [this message]
2021-02-02 11:19 ` [Intel-gfx] [PULL] topic/adl-s-enabling into drm-intel-next Jani Nikula
2021-02-02 13:38 ` Joonas Lahtinen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210202025620.2212559-1-lucas.demarchi@intel.com \
--to=lucas.demarchi@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.