From mboxrd@z Thu Jan 1 00:00:00 1970 From: Biwen Li Date: Tue, 2 Feb 2021 16:25:47 +0800 Subject: [v4 02/33] arm: dts: ls1021a: add gpio node In-Reply-To: <20210202082618.19258-1-biwen.li@oss.nxp.com> References: <20210202082618.19258-1-biwen.li@oss.nxp.com> Message-ID: <20210202082618.19258-3-biwen.li@oss.nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Biwen Li Add gpio node for SoC LS1021A Signed-off-by: Biwen Li --- arch/arm/dts/ls1021a.dtsi | 40 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index 0eeec43ccc..7b99ce02b3 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -98,6 +98,46 @@ bus-width = <4>; }; + gpio0: gpio at 2300000 { + compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2300000 0x0 0x10000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio at 2310000 { + compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2310000 0x0 0x10000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio at 2320000 { + compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2320000 0x0 0x10000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio at 2330000 { + compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; + reg = <0x0 0x2330000 0x0 0x10000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + scfg: scfg at 1570000 { compatible = "fsl,ls1021a-scfg", "syscon"; reg = <0x1570000 0x10000>; -- 2.17.1