From mboxrd@z Thu Jan 1 00:00:00 1970 From: Biwen Li Date: Tue, 2 Feb 2021 16:25:49 +0800 Subject: [v4 04/33] arm64: dts: ls1028a: add gpio node In-Reply-To: <20210202082618.19258-1-biwen.li@oss.nxp.com> References: <20210202082618.19258-1-biwen.li@oss.nxp.com> Message-ID: <20210202082618.19258-5-biwen.li@oss.nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Biwen Li Add gpio node for SoC LS1028A Signed-off-by: Biwen Li --- arch/arm/dts/fsl-ls1028a.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index d0850237c7..5171bf28c7 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -380,6 +380,39 @@ status = "disabled"; }; + gpio0: gpio at 2300000 { + compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio"; + reg = <0x0 0x2300000 0x0 0x10000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + little-endian; + }; + + gpio1: gpio at 2310000 { + compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio"; + reg = <0x0 0x2310000 0x0 0x10000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + little-endian; + }; + + gpio2: gpio at 2320000 { + compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio"; + reg = <0x0 0x2320000 0x0 0x10000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + little-endian; + }; + sata: sata at 3200000 { compatible = "fsl,ls1028a-ahci"; reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */ -- 2.17.1