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From: Mark Rutland <mark.rutland@arm.com>
To: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Qi Liu <liuqi115@huawei.com>, John Garry <john.garry@huawei.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH v2 6/8] drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver
Date: Wed, 3 Feb 2021 13:28:58 +0000	[thread overview]
Message-ID: <20210203132858.GL55896@C02TD0UTHF1T.local> (raw)
In-Reply-To: <1612338668-40493-7-git-send-email-zhangshaokun@hisilicon.com>

On Wed, Feb 03, 2021 at 03:51:06PM +0800, Shaokun Zhang wrote:
> HiSilicon's Hip09 is comprised by multi-dies that can be connected by SLLC
> module (Skyros Link Layer Controller), its has separate PMU registers which
> the driver can program it freely and interrupt is supported to handle
> counter overflow. Let's support its driver under the framework of HiSilicon
> uncore PMU driver.

[...]

> +HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_lo, config1, 10, 0);
> +HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_hi, config1, 21, 11);
> +HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_cmd, config1, 32, 22);
> +HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_msk, config1, 43, 33);
> +HISI_PMU_EVENT_ATTR_EXTRACTOR(tracetag_en, config1, 44, 44);

If you could describe these fields in the commit message that would be
helpful.

What is a 'tgtid'? Is that a 'target ID' or something to that effect?

[...]

> +	HISI_PMU_FORMAT_ATTR(tgtid_low, "config1:0-10"),
> +	HISI_PMU_FORMAT_ATTR(tgtid_high, "config1:11-21"),

Does this need to be exposed to userspace in two halves, rather than
being a single 'tgtid' field that the driver can decompose as necessary?

Thanks,
Mark.

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  reply	other threads:[~2021-02-03 13:30 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-03  7:51 [PATCH v2 0/8] Add support for HiSilicon Hip09 uncore PMU driver Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 1/8] drivers/perf: hisi: Refactor code for more uncore PMUs Shaokun Zhang
2021-02-03 12:53   ` Mark Rutland
2021-02-04  3:38     ` Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 2/8] drivers/perf: hisi: Add PMU version for uncore PMU drivers Shaokun Zhang
2021-02-03 12:58   ` Mark Rutland
2021-02-04  3:48     ` Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 3/8] drivers/perf: hisi: Add new functions for L3C PMU Shaokun Zhang
2021-02-03 13:10   ` Mark Rutland
2021-02-04  6:30     ` Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 4/8] drivers/perf: hisi: Add new functions for HHA PMU Shaokun Zhang
2021-02-03 13:18   ` Mark Rutland
2021-02-04  6:44     ` Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 5/8] drivers/perf: hisi: Update DDRC PMU for programable counter Shaokun Zhang
2021-02-03 13:23   ` Mark Rutland
2021-02-04  7:00     ` Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 6/8] drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver Shaokun Zhang
2021-02-03 13:28   ` Mark Rutland [this message]
2021-02-04  7:10     ` Shaokun Zhang
2021-02-05 14:30       ` Jonathan Cameron
2021-02-07  1:43         ` Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 7/8] drivers/perf: hisi: Add support for HiSilicon PA " Shaokun Zhang
2021-02-03 13:43   ` Mark Rutland
2021-02-04  7:20     ` Shaokun Zhang
2021-02-03  7:51 ` [PATCH v2 8/8] docs: perf: Add new description on HiSilicon uncore PMU v2 Shaokun Zhang

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