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From: Claudio Fontana <cfontana@suse.de>
To: "Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>
Cc: Laurent Vivier <lvivier@redhat.com>,
	Thomas Huth <thuth@redhat.com>,
	qemu-devel@nongnu.org, Roman Bolshakov <r.bolshakov@yadro.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Claudio Fontana <cfontana@suse.de>
Subject: [PATCH v16 22/23] target/i386: fix host_cpu_adjust_phys_bits error handling
Date: Thu,  4 Feb 2021 17:39:30 +0100	[thread overview]
Message-ID: <20210204163931.7358-23-cfontana@suse.de> (raw)
In-Reply-To: <20210204163931.7358-1-cfontana@suse.de>

move the check for phys_bits outside of host_cpu_adjust_phys_bits,
because otherwise it is impossible to return an error condition
explicitly.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
 target/i386/host-cpu.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c
index 9cfe56ce41..d07d41c34c 100644
--- a/target/i386/host-cpu.c
+++ b/target/i386/host-cpu.c
@@ -50,7 +50,7 @@ static void host_cpu_enable_cpu_pm(X86CPU *cpu)
     env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR;
 }
 
-static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp)
+static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu)
 {
     uint32_t host_phys_bits = host_cpu_phys_bits();
     uint32_t phys_bits = cpu->phys_bits;
@@ -77,14 +77,6 @@ static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp)
         }
     }
 
-    if (phys_bits &&
-        (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
-         phys_bits < 32)) {
-        error_setg(errp, "phys-bits should be between 32 and %u "
-                   " (but is %u)",
-                   TARGET_PHYS_ADDR_SPACE_BITS, phys_bits);
-    }
-
     return phys_bits;
 }
 
@@ -97,7 +89,17 @@ void host_cpu_realizefn(CPUState *cs, Error **errp)
         host_cpu_enable_cpu_pm(cpu);
     }
     if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
-        cpu->phys_bits = host_cpu_adjust_phys_bits(cpu, errp);
+        uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu);
+
+        if (phys_bits &&
+            (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
+             phys_bits < 32)) {
+            error_setg(errp, "phys-bits should be between 32 and %u "
+                       " (but is %u)",
+                       TARGET_PHYS_ADDR_SPACE_BITS, phys_bits);
+            return;
+        }
+        cpu->phys_bits = phys_bits;
     }
 }
 
-- 
2.26.2



  parent reply	other threads:[~2021-02-04 17:12 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-04 16:39 [PATCH v16 00/23] i386 cleanup PART 2 Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 01/23] cpu: Introduce TCGCpuOperations struct Claudio Fontana
2021-02-10 12:21   ` Roman Bolshakov
2021-02-10 12:29     ` Claudio Fontana
2021-02-10 12:32     ` Eduardo Habkost
2021-02-10 13:58       ` Roman Bolshakov
2021-02-04 16:39 ` [PATCH v16 02/23] target/riscv: remove CONFIG_TCG, as it is always TCG Claudio Fontana
2021-02-10 12:22   ` Roman Bolshakov
2021-02-10 12:37     ` Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 03/23] accel/tcg: split TCG-only code from cpu_exec_realizefn Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 04/23] cpu: Move synchronize_from_tb() to tcg_ops Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 05/23] cpu: Move cpu_exec_* " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 06/23] cpu: Move tlb_fill " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 07/23] cpu: Move debug_excp_handler " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 08/23] target/arm: do not use cc->do_interrupt for KVM directly Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 09/23] cpu: move cc->do_interrupt to tcg_ops Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 10/23] cpu: move cc->transaction_failed " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 11/23] cpu: move do_unaligned_access " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 12/23] physmem: make watchpoint checking code TCG-only Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 13/23] cpu: move adjust_watchpoint_address to tcg_ops Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 14/23] cpu: move debug_check_watchpoint " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 15/23] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 16/23] accel: extend AccelState and AccelClass to user-mode Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 17/23] accel: replace struct CpusAccel with AccelOpsClass Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 18/23] accel: introduce AccelCPUClass extending CPUClass Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 19/23] i386: split cpu accelerators from cpu.c, using AccelCPUClass Claudio Fontana
2021-02-05 20:04   ` Richard Henderson
2021-02-10 11:30     ` Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 20/23] cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 21/23] accel: introduce new accessor functions Claudio Fontana
2021-02-05 20:14   ` Richard Henderson
2021-02-08 12:50     ` Claudio Fontana
2021-02-08 12:54       ` Philippe Mathieu-Daudé
2021-02-10 13:49         ` Claudio Fontana
2021-02-14 19:01         ` Claudio Fontana
2021-02-04 16:39 ` Claudio Fontana [this message]
2021-02-05 20:15   ` [PATCH v16 22/23] target/i386: fix host_cpu_adjust_phys_bits error handling Richard Henderson
2021-02-04 16:39 ` [PATCH v16 23/23] accel-cpu: make cpu_realizefn return a bool Claudio Fontana
2021-02-05 20:17   ` Richard Henderson
2021-02-05 20:18 ` [PATCH v16 00/23] i386 cleanup PART 2 Richard Henderson
2021-03-14  0:00 ` Philippe Mathieu-Daudé
2021-03-15  9:44   ` Claudio Fontana
2021-03-15  9:57     ` Philippe Mathieu-Daudé

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