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From: Heiko Stuebner <heiko@sntech.de>
To: u-boot@lists.denx.de
Subject: [PATCH 7/8] rockchip: rk3368: sync down rk3368-lion board devicetree from Linux
Date: Tue,  9 Feb 2021 14:47:09 +0100	[thread overview]
Message-ID: <20210209134710.2313240-8-heiko@sntech.de> (raw)
In-Reply-To: <20210209134710.2313240-1-heiko@sntech.de>

From: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>

This brings the actual rk3368-lion devicetree files from Linux 5.10
instead of using something separate.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
---
 arch/arm/dts/Makefile                         |   2 +-
 ...ot.dtsi => rk3368-lion-haikou-u-boot.dtsi} |   4 +
 arch/arm/dts/rk3368-lion-haikou.dts           | 140 +++++++++
 .../dts/{rk3368-lion.dts => rk3368-lion.dtsi} | 271 +++++++++++++-----
 configs/lion-rk3368_defconfig                 |   2 +
 5 files changed, 351 insertions(+), 68 deletions(-)
 rename arch/arm/dts/{rk3368-lion-u-boot.dtsi => rk3368-lion-haikou-u-boot.dtsi} (98%)
 create mode 100644 arch/arm/dts/rk3368-lion-haikou.dts
 rename arch/arm/dts/{rk3368-lion.dts => rk3368-lion.dtsi} (54%)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fd47e408f8..fa2e8b5ef7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -115,7 +115,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
 	rk3328-rock-pi-e.dtb
 
 dtb-$(CONFIG_ROCKCHIP_RK3368) += \
-	rk3368-lion.dtb \
+	rk3368-lion-haikou.dtb \
 	rk3368-sheep.dtb \
 	rk3368-geekbox.dtb \
 	rk3368-px5-evb.dtb \
diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi
similarity index 98%
rename from arch/arm/dts/rk3368-lion-u-boot.dtsi
rename to arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi
index 9bd6352755..7826d1e70b 100644
--- a/arch/arm/dts/rk3368-lion-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi
@@ -38,6 +38,10 @@
 	};
 };
 
+&gpio2 {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3368-lion-haikou.dts b/arch/arm/dts/rk3368-lion-haikou.dts
new file mode 100644
index 0000000000..7fcb1eacea
--- /dev/null
+++ b/arch/arm/dts/rk3368-lion-haikou.dts
@@ -0,0 +1,140 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH
+ */
+
+/dts-v1/;
+#include "rk3368-lion.dtsi"
+
+/ {
+	model = "Theobroma Systems RK3368-uQ7 Baseboard";
+	compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	i2cmux2 {
+		i2c at 0 {
+			eeprom: eeprom at 50 {
+				compatible = "atmel,24c01";
+				pagesize = <8>;
+				reg = <0x50>;
+			};
+		};
+	};
+
+	leds {
+		pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>;
+
+		sd_card_led: led-3 {
+			label = "sd_card_led";
+			gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "mmc0";
+		};
+	};
+
+	dc_12v: dc-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "dc_12v";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	vcc3v3_baseboard: vcc3v3-baseboard {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_baseboard";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&dc_12v>;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc5v0_otg";
+		regulator-always-on;
+	};
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
+	disable-wp;
+	max-frequency = <25000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+	rockchip,default-sample-phase = <90>;
+	vmmc-supply = <&vcc3v3_baseboard>;
+	status = "okay";
+};
+
+&spi2 {
+	cs-gpios = <0>, <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	status = "okay";
+};
+
+&uart1 {
+	/* alternate function of GPIO5/6 */
+	status = "disabled";
+};
+
+&pinctrl {
+	pinctrl-names = "default";
+	pinctrl-0 = <&haikou_pin_hog>;
+
+	hog {
+		haikou_pin_hog: haikou-pin-hog {
+			rockchip,pins =
+				/* LID_BTN */
+				<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+				/* BATLOW# */
+				<0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>,
+				/* SLP_BTN# */
+				<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
+				/* BIOS_DISABLE# */
+				<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	leds {
+		sd_card_led_pin: sd-card-led-pin {
+			rockchip,pins =
+				<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_cd_pin: sdmmc-cd-pin {
+			rockchip,pins =
+				<2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_otg {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins =
+				<0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rk3368-lion.dts b/arch/arm/dts/rk3368-lion.dtsi
similarity index 54%
rename from arch/arm/dts/rk3368-lion.dts
rename to arch/arm/dts/rk3368-lion.dtsi
index 2814542083..532e6a6828 100644
--- a/arch/arm/dts/rk3368-lion.dts
+++ b/arch/arm/dts/rk3368-lion.dtsi
@@ -1,25 +1,14 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH
  */
 
 /dts-v1/;
 #include "rk3368.dtsi"
-#include "rk3368-lion-u-boot.dtsi"
-#include <dt-bindings/input/input.h>
 
 / {
-	model = "Theobroma Systems RK3368-uQ7 SoM";
-	compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368";
-
-	aliases {
-		mmc0 = &emmc;
-		mmc1 = &sdmmc;
-	};
-
-	memory at 0 {
-		device_type = "memory";
-		reg = <0x0 0x0 0x0 0x80000000>;
+	chosen {
+		stdout-path = "serial0:115200n8";
 	};
 
 	ext_gmac: gmac-clk {
@@ -29,6 +18,80 @@
 		#clock-cells = <0>;
 	};
 
+	i2cmux1 {
+		compatible = "i2c-mux-gpio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		i2c-parent = <&i2c1>;
+		mux-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
+
+		/* Q7_GPO_I2C */
+		i2c at 0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		/* Q7_SMB */
+		i2c at 1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
+	i2cmux2 {
+		compatible = "i2c-mux-gpio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		i2c-parent = <&i2c2>;
+		mux-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
+
+		/* Q7_LVDS_BLC_I2C */
+		i2c at 0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			fan: fan at 18 {
+				compatible = "ti,amc6821";
+				reg = <0x18>;
+				#cooling-cells = <2>;
+			};
+
+			rtc_twi: rtc at 6f {
+				compatible = "isil,isl1208";
+				reg = <0x6f>;
+			};
+		};
+
+		/* Q7_GP2_I2C */
+		i2c at 1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&module_led_pins>;
+
+		module_led1: led-1 {
+			label = "module_led1";
+			gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+			panic-indicator;
+		};
+
+		module_led2: led-2 {
+			label = "module_led2";
+			gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+
 	vcc_sys: vcc-sys-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc_sys";
@@ -39,43 +102,81 @@
 	};
 };
 
-&uart0 {
-	status = "okay";
+&cpu_l0 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_l1 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_b1 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_b2 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu_b3 {
+	cpu-supply = <&vdd_cpu>;
 };
 
 &emmc {
-	status = "okay";
 	bus-width = <8>;
-	cap-mmc-highspeed;
 	clock-frequency = <150000000>;
-	disable-wp;
-	keep-power-in-suspend;
+	mmc-hs200-1_8v;
 	non-removable;
-	num-slots = <1>;
 	vmmc-supply = <&vcc33_io>;
 	vqmmc-supply = <&vcc18_io>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
-};
-
-&sdmmc {
 	status = "okay";
 };
 
 &gmac {
-	status = "okay";
-	phy-supply = <&vcc33_io>;
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <2 10000 50000>;
 	assigned-clocks = <&cru SCLK_MAC>;
 	assigned-clock-parents = <&ext_gmac>;
+	clock_in_out = "input";
+	phy-handle = <&phy0>;
+	phy-supply = <&vcc33_io>;
+	phy-mode = "rgmii";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
 	tx_delay = <0x10>;
 	rx_delay = <0x10>;
+	status = "okay";
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/* Microsemi VSC8531-02 */
+		phy0: phy at 0 {
+		compatible = "ethernet-phy-id0007.0570";
+			reg = <0>;
+			vsc8531,clk-out-frequency = <125000000>;
+			vsc8531,edge-slowdown = <7>;
+			vsc8531,led-0-mode = <1>;
+			vsc8531,led-1-mode = <2>;
+		};
+	};
 };
 
 &i2c0 {
@@ -85,7 +186,11 @@
 		compatible = "rockchip,rk808";
 		reg = <0x1b>;
 		interrupt-parent = <&gpio0>;
-		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+		interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+		#clock-cells = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>, <&pmic_sleep>;
 		rockchip,system-power-controller;
 		vcc1-supply = <&vcc_sys>;
 		vcc2-supply = <&vcc_sys>;
@@ -98,97 +203,129 @@
 		vcc10-supply = <&vcc_sys>;
 		vcc11-supply = <&vcc_sys>;
 		vcc12-supply = <&vcc_sys>;
-		clock-output-names = "xin32k", "rk808-clkout2";
-		#clock-cells = <1>;
 
 		regulators {
 			vdd_cpu: DCDC_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vdd_cpu";
 				regulator-min-microvolt = <700000>;
 				regulator-max-microvolt = <1500000>;
-				regulator-name = "vdd_cpu";
+				regulator-always-on;
+				regulator-boot-on;
 			};
 
 			vdd_log: DCDC_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vdd_log";
 				regulator-min-microvolt = <700000>;
 				regulator-max-microvolt = <1500000>;
-				regulator-name = "vdd_log";
+				regulator-always-on;
+				regulator-boot-on;
 			};
 
 			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-name = "vcc_ddr";
 			};
 
 			vcc33_io: DCDC_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc33_io";
 				regulator-min-microvolt = <3300000>;
 				regulator-max-microvolt = <3300000>;
-				regulator-name = "vcc33_io";
+				regulator-always-on;
+				regulator-boot-on;
 			};
 
 			vcc33_video: LDO_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc33_video";
 				regulator-min-microvolt = <3300000>;
 				regulator-max-microvolt = <3300000>;
-				regulator-name = "vcc33_video";
+				regulator-always-on;
+				regulator-boot-on;
 			};
 
 			vdd10_pll: LDO_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vdd10_pll";
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
-				regulator-name = "vdd10_pll";
+				regulator-always-on;
+				regulator-boot-on;
 			};
 
 			vcc18_io: LDO_REG4 {
-				regulator-boot-on;
+				regulator-name = "vcc18_io";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc18_io";
+				regulator-boot-on;
 			};
 
 			vdd10_video: LDO_REG6 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vdd10_video";
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
-				regulator-name = "vdd10_video";
+				regulator-always-on;
+				regulator-boot-on;
 			};
 
 			vcc18_video: LDO_REG8 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc18_video";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc18_video";
+				regulator-always-on;
+				regulator-boot-on;
 			};
 		};
 	};
 };
 
-&uart0 {
+&i2c1 {
 	status = "okay";
 };
 
-&spi1 {
+&i2c2 {
 	status = "okay";
+};
 
-	#address-cells = <1>;
-	#size-cells = <0>;
+&pinctrl {
+	leds {
+		module_led_pins: module-led-pins {
+			rockchip,pins =
+				<2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
+				<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
 
-	spiflash: w25q32dw at 0 {
+		pmic_sleep: pmic-sleep {
+			rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
+		};
+	};
+};
+
+&spi1 {
+	status = "okay";
+
+	norflash: flash at 0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <49500000>;
-		spi-cpol;
-		spi-cpha;
+		spi-max-frequency = <50000000>;
 	};
 };
+
+&uart1 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index b409715060..f547875dee 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPL_BOOTROM_SUPPORT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF=y
 CONFIG_TPL=y
@@ -44,6 +45,7 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou"
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
-- 
2.29.2

  parent reply	other threads:[~2021-02-09 13:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-09 13:47 [PATCH 0/8] rockchip: resurrect rk3368 functionality and make lion bootable again Heiko Stuebner
2021-02-09 13:47 ` [PATCH 1/8] rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR Heiko Stuebner
2021-02-09 13:47 ` [PATCH 2/8] rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Heiko Stuebner
2021-02-09 13:47 ` [PATCH 3/8] rockchip: rk3368: increase SYS_MALLOC_F_LEN to 0x4000 Heiko Stuebner
2021-02-09 13:47 ` [PATCH 4/8] rockchip: rk3368: move STACK_R_ADDR address and into Kconfig Heiko Stuebner
2021-02-09 13:47 ` [PATCH 5/8] rockchip: rk3368: sync clock dt-binding header from Linux Heiko Stuebner
2021-02-09 13:47 ` [PATCH 6/8] rockchip: rk3368: sync main rk3368 dtsi " Heiko Stuebner
2021-02-09 13:47 ` Heiko Stuebner [this message]
2021-02-09 13:47 ` [PATCH 8/8] rockchip: lion: update board defconfig Heiko Stuebner

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