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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 08/45] arm: Update infocenter.arm.com URLs
Date: Thu, 11 Feb 2021 12:58:23 +0000	[thread overview]
Message-ID: <20210211125900.22777-9-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210211125900.22777-1-peter.maydell@linaro.org>

Update infocenter.arm.com URLs for various pieces of Arm
documentation to the new developer.arm.com equivalents.  (There is a
redirection in place from the old URLs, but we might as well update
our comments in case the redirect ever disappears in future.)

This patch covers all the URLs which are not MPS2/SSE-200/IoTKit
related (those are dealt with in a different patch).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210205171456.19939-1-peter.maydell@linaro.org
---
 include/hw/dma/pl080.h                 | 7 ++++---
 include/hw/misc/arm_integrator_debug.h | 2 +-
 include/hw/ssi/pl022.h                 | 5 +++--
 hw/arm/aspeed_ast2600.c                | 2 +-
 hw/arm/musca.c                         | 4 ++--
 hw/misc/arm_integrator_debug.c         | 2 +-
 hw/timer/arm_timer.c                   | 7 ++++---
 7 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/include/hw/dma/pl080.h b/include/hw/dma/pl080.h
index 1883f042701..3c9659e4381 100644
--- a/include/hw/dma/pl080.h
+++ b/include/hw/dma/pl080.h
@@ -10,11 +10,12 @@
  * (at your option) any later version.
  */
 
-/* This is a model of the Arm PrimeCell PL080/PL081 DMA controller:
+/*
+ * This is a model of the Arm PrimeCell PL080/PL081 DMA controller:
  * The PL080 TRM is:
- * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0196g/DDI0196.pdf
+ * https://developer.arm.com/documentation/ddi0196/latest
  * and the PL081 TRM is:
- * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0218e/DDI0218.pdf
+ * https://developer.arm.com/documentation/ddi0218/latest
  *
  * QEMU interface:
  * + sysbus IRQ 0: DMACINTR combined interrupt line
diff --git a/include/hw/misc/arm_integrator_debug.h b/include/hw/misc/arm_integrator_debug.h
index 0077dacb44d..798b0821646 100644
--- a/include/hw/misc/arm_integrator_debug.h
+++ b/include/hw/misc/arm_integrator_debug.h
@@ -3,7 +3,7 @@
  *
  * Browse the data sheet:
  *
- *    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html
+ *  https://developer.arm.com/documentation/dui0159/b/peripherals-and-interfaces/debug-leds-and-dip-switch-interface
  *
  * Copyright (c) 2013 Alex Bennée <alex@bennee.com>
  *
diff --git a/include/hw/ssi/pl022.h b/include/hw/ssi/pl022.h
index 545b52689c1..25d58db5f32 100644
--- a/include/hw/ssi/pl022.h
+++ b/include/hw/ssi/pl022.h
@@ -9,9 +9,10 @@
  * (at your option) any later version.
  */
 
-/* This is a model of the Arm PrimeCell PL022 synchronous serial port.
+/*
+ * This is a model of the Arm PrimeCell PL022 synchronous serial port.
  * The PL022 TRM is:
- * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194h/DDI0194H_ssp_pl022_trm.pdf
+ * https://developer.arm.com/documentation/ddi0194/latest
  *
  * QEMU interface:
  * + sysbus IRQ: SSPINTR combined interrupt line
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 12e4a16d376..bf31ca351fe 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -216,7 +216,7 @@ static void aspeed_soc_ast2600_init(Object *obj)
 /*
  * ASPEED ast2600 has 0xf as cluster ID
  *
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html
+ * https://developer.arm.com/documentation/ddi0388/e/the-system-control-coprocessors/summary-of-system-control-coprocessor-registers/multiprocessor-affinity-register
  */
 static uint64_t aspeed_calc_affinity(int cpu)
 {
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 945643c3cd7..7a83f7dda7d 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -15,8 +15,8 @@
  * https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musca-a-test-chip-board
  * https://developer.arm.com/products/system-design/development-boards/iot-test-chips-and-boards/musca-b-test-chip-board
  * We model the A and B1 variants of this board, as described in the TRMs:
- * http://infocenter.arm.com/help/topic/com.arm.doc.101107_0000_00_en/index.html
- * http://infocenter.arm.com/help/topic/com.arm.doc.101312_0000_00_en/index.html
+ * https://developer.arm.com/documentation/101107/latest/
+ * https://developer.arm.com/documentation/101312/latest/
  */
 
 #include "qemu/osdep.h"
diff --git a/hw/misc/arm_integrator_debug.c b/hw/misc/arm_integrator_debug.c
index ec0d4b90d3d..9a197278290 100644
--- a/hw/misc/arm_integrator_debug.c
+++ b/hw/misc/arm_integrator_debug.c
@@ -6,7 +6,7 @@
  * to this area.
  *
  * The real h/w is described at:
- *  http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0159b/Babbfijf.html
+ *  https://developer.arm.com/documentation/dui0159/b/peripherals-and-interfaces/debug-leds-and-dip-switch-interface
  *
  * Copyright (c) 2013 Alex Bennée <alex@bennee.com>
  *
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index 98e70b2d262..15caff0e41c 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -185,10 +185,11 @@ static arm_timer_state *arm_timer_init(uint32_t freq)
     return s;
 }
 
-/* ARM PrimeCell SP804 dual timer module.
+/*
+ * ARM PrimeCell SP804 dual timer module.
  * Docs at
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0271d/index.html
-*/
+ * https://developer.arm.com/documentation/ddi0271/latest/
+ */
 
 #define TYPE_SP804 "sp804"
 OBJECT_DECLARE_SIMPLE_TYPE(SP804State, SP804)
-- 
2.20.1



  parent reply	other threads:[~2021-02-11 13:02 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-11 12:58 [PULL 00/45] target-arm queue Peter Maydell
2021-02-11 12:58 ` [PULL 01/45] target/arm: Don't migrate CPUARMState.features Peter Maydell
2021-02-11 12:58 ` [PULL 02/45] target/arm: Fix SCR RES1 handling Peter Maydell
2021-02-11 12:58 ` [PULL 03/45] hw/arm: Remove GPIO from unimplemented NPCM7XX Peter Maydell
2021-02-11 12:58 ` [PULL 04/45] target/arm: Add support for FEAT_DIT, Data Independent Timing Peter Maydell
2021-02-11 12:58 ` [PULL 05/45] target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate Peter Maydell
2021-02-11 12:58 ` [PULL 06/45] target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU Peter Maydell
2021-02-11 12:58 ` [PULL 07/45] target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU Peter Maydell
2021-02-11 12:58 ` Peter Maydell [this message]
2021-02-11 12:58 ` [PULL 09/45] accel/tcg: Add URL of clang bug to comment about our workaround Peter Maydell
2021-02-11 12:58 ` [PULL 10/45] tcg: Introduce target-specific page data for user-only Peter Maydell
2021-02-11 12:58 ` [PULL 11/45] linux-user: Introduce PAGE_ANON Peter Maydell
2021-02-11 12:58 ` [PULL 12/45] exec: Use uintptr_t for guest_base Peter Maydell
2021-02-11 12:58 ` [PULL 13/45] exec: Use uintptr_t in cpu_ldst.h Peter Maydell
2021-02-11 13:51   ` Philippe Mathieu-Daudé
2021-02-11 12:58 ` [PULL 14/45] exec: Improve types for guest_addr_valid Peter Maydell
2021-02-11 12:58 ` [PULL 15/45] linux-user: Check for overflow in access_ok Peter Maydell
2021-02-11 12:58 ` [PULL 16/45] linux-user: Tidy VERIFY_READ/VERIFY_WRITE Peter Maydell
2021-02-11 12:58 ` [PULL 17/45] bsd-user: " Peter Maydell
2021-02-11 12:58 ` [PULL 18/45] linux-user: Do not use guest_addr_valid for h2g_valid Peter Maydell
2021-02-11 12:58 ` [PULL 19/45] linux-user: Fix guest_addr_valid vs reserved_va Peter Maydell
2021-02-11 12:58 ` [PULL 20/45] exec: Introduce cpu_untagged_addr Peter Maydell
2021-02-11 12:58 ` [PULL 21/45] exec: Use cpu_untagged_addr in g2h; split out g2h_untagged Peter Maydell
2021-02-11 12:58 ` [PULL 22/45] linux-user: Explicitly untag memory management syscalls Peter Maydell
2021-02-11 12:58 ` [PULL 23/45] linux-user: Use guest_range_valid in access_ok Peter Maydell
2021-02-11 12:58 ` [PULL 24/45] exec: Rename guest_{addr,range}_valid to *_untagged Peter Maydell
2021-02-11 12:58 ` [PULL 25/45] linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged Peter Maydell
2021-02-11 12:58 ` [PULL 26/45] linux-user: Move lock_user et al out of line Peter Maydell
2021-02-11 12:58 ` [PULL 27/45] linux-user: Fix types in uaccess.c Peter Maydell
2021-02-11 12:58 ` [PULL 28/45] linux-user: Handle tags in lock_user/unlock_user Peter Maydell
2021-02-11 12:58 ` [PULL 29/45] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE Peter Maydell
2021-02-11 12:58 ` [PULL 30/45] target/arm: Improve gen_top_byte_ignore Peter Maydell
2021-02-11 12:58 ` [PULL 31/45] target/arm: Use the proper TBI settings for linux-user Peter Maydell
2021-02-11 12:58 ` [PULL 32/45] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG Peter Maydell
2021-02-11 12:58 ` [PULL 33/45] linux-user/aarch64: Implement PROT_MTE Peter Maydell
2021-02-11 12:58 ` [PULL 34/45] target/arm: Split out syndrome.h from internals.h Peter Maydell
2021-02-11 12:58 ` [PULL 35/45] linux-user/aarch64: Pass syndrome to EXC_*_ABORT Peter Maydell
2021-02-11 12:58 ` [PULL 36/45] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault Peter Maydell
2021-02-11 12:58 ` [PULL 37/45] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error Peter Maydell
2021-02-11 12:58 ` [PULL 38/45] target/arm: Add allocation tag storage for user mode Peter Maydell
2021-02-11 12:58 ` [PULL 39/45] target/arm: Enable MTE for user-only Peter Maydell
2021-02-11 12:58 ` [PULL 40/45] tests/tcg/aarch64: Add mte smoke tests Peter Maydell
2021-02-11 12:58 ` [PULL 41/45] hw/net: Add npcm7xx emc model Peter Maydell
2021-02-11 12:58 ` [PULL 42/45] hw/arm: " Peter Maydell
2021-02-11 12:58 ` [PULL 43/45] tests/qtests: Add npcm7xx emc model test Peter Maydell
2021-02-11 12:58 ` [PULL 44/45] hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2 Peter Maydell
2021-02-11 12:59 ` [PULL 45/45] target/arm: Correctly initialize MDCR_EL2.HPMN Peter Maydell
2021-02-11 13:58 ` [PULL 00/45] target-arm queue no-reply

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