From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FDD4C433E0 for ; Mon, 15 Feb 2021 04:36:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4B00A64E71 for ; Mon, 15 Feb 2021 04:36:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229994AbhBOEgc (ORCPT ); Sun, 14 Feb 2021 23:36:32 -0500 Received: from perceval.ideasonboard.com ([213.167.242.64]:45928 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229988AbhBOEg1 (ORCPT ); Sun, 14 Feb 2021 23:36:27 -0500 Received: from pendragon.lan (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id F30BE1ABD; Mon, 15 Feb 2021 05:28:44 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1613363325; bh=JfTvVABhlt3Csu3jsi2JcHP9eSz1nhnVgworFD9KI24=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nHp6jw5y/0uDz2TSzlvFVnfYbuz9R9Pajw3+36h59sSSccVidNT3Owu32u1dRRNqg XeEIz949GGV0dzWd84hP1X6dNh10J+cStpMR5/e3pHhGWEvkUe8xthk9EfUSeuBIHE oW0qdZXyeYpMDFxMLp3wQdwWX60mro15tuOXKYFQ= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Rui Miguel Silva , Steve Longerbeam , Philipp Zabel , Ezequiel Garcia , Fabio Estevam Subject: [PATCH v2 44/77] media: imx: imx7-media-csi: Merge hw_reset() with init_interface() Date: Mon, 15 Feb 2021 06:27:08 +0200 Message-Id: <20210215042741.28850-45-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210215042741.28850-1-laurent.pinchart@ideasonboard.com> References: <20210215042741.28850-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The imx7_csi_hw_reset() and imx7_csi_init_interface() functions are always called together. Merge them. This allows simplifying the code by avoiding duplicated register writes. As the imx7_csi_hw_reset() function didn't perform a hardware reset by initialized the registers to reset defaults (in addition to resetting the frame counter), name the resulting function imx7_csi_init_default() as it sets default values. Signed-off-by: Laurent Pinchart Reviewed-by: Rui Miguel Silva --- drivers/staging/media/imx/imx7-media-csi.c | 37 +++++++--------------- 1 file changed, 11 insertions(+), 26 deletions(-) diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c index 53bab0a0a878..0ad18885542b 100644 --- a/drivers/staging/media/imx/imx7-media-csi.c +++ b/drivers/staging/media/imx/imx7-media-csi.c @@ -212,17 +212,6 @@ static void imx7_csi_reg_write(struct imx7_csi *csi, unsigned int value, writel(value, csi->regbase + offset); } -static void imx7_csi_hw_reset(struct imx7_csi *csi) -{ - imx7_csi_reg_write(csi, - imx7_csi_reg_read(csi, CSI_CSICR3) | BIT_FRMCNT_RST, - CSI_CSICR3); - - imx7_csi_reg_write(csi, BIT_EXT_VSYNC | BIT_HSYNC_POL, CSI_CSICR1); - imx7_csi_reg_write(csi, 0, CSI_CSICR2); - imx7_csi_reg_write(csi, 0, CSI_CSICR3); -} - static u32 imx7_csi_irq_clear(struct imx7_csi *csi) { u32 isr; @@ -233,20 +222,18 @@ static u32 imx7_csi_irq_clear(struct imx7_csi *csi) return isr; } -static void imx7_csi_init_interface(struct imx7_csi *csi) +static void imx7_csi_init_default(struct imx7_csi *csi) { - unsigned int val = 0; - unsigned int imag_para; + imx7_csi_reg_write(csi, BIT_SOF_POL | BIT_REDGE | BIT_GCLK_MODE | + BIT_HSYNC_POL | BIT_FCC | BIT_MCLKDIV(1) | + BIT_MCLKEN, CSI_CSICR1); + imx7_csi_reg_write(csi, 0, CSI_CSICR2); + imx7_csi_reg_write(csi, BIT_FRMCNT_RST, CSI_CSICR3); - val = BIT_SOF_POL | BIT_REDGE | BIT_GCLK_MODE | BIT_HSYNC_POL | - BIT_FCC | BIT_MCLKDIV(1) | BIT_MCLKEN; - imx7_csi_reg_write(csi, val, CSI_CSICR1); + imx7_csi_reg_write(csi, BIT_IMAGE_WIDTH(800) | BIT_IMAGE_HEIGHT(600), + CSI_CSIIMAG_PARA); - imag_para = BIT_IMAGE_WIDTH(800) | BIT_IMAGE_HEIGHT(600); - imx7_csi_reg_write(csi, imag_para, CSI_CSIIMAG_PARA); - - val = BIT_DMA_REFLASH_RFF; - imx7_csi_reg_write(csi, val, CSI_CSICR3); + imx7_csi_reg_write(csi, BIT_DMA_REFLASH_RFF, CSI_CSICR3); } static void imx7_csi_hw_enable_irq(struct imx7_csi *csi) @@ -578,8 +565,7 @@ static int imx7_csi_init(struct imx7_csi *csi) if (ret < 0) return ret; - imx7_csi_hw_reset(csi); - imx7_csi_init_interface(csi); + imx7_csi_init_default(csi); imx7_csi_dmareq_rff_enable(csi); ret = imx7_csi_dma_setup(csi); @@ -594,8 +580,7 @@ static int imx7_csi_init(struct imx7_csi *csi) static void imx7_csi_deinit(struct imx7_csi *csi) { imx7_csi_dma_cleanup(csi); - imx7_csi_hw_reset(csi); - imx7_csi_init_interface(csi); + imx7_csi_init_default(csi); imx7_csi_dmareq_rff_disable(csi); clk_disable_unprepare(csi->mclk); } -- Regards, Laurent Pinchart