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* [PATCH 0/8] Add peripheral support for imx8mm-nitrogen-r2 board
@ 2021-02-15 23:19 ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

Hi,

this patch set is to add several peripheral support for the
imx8mm-nitrogen-r2 board.

Thanks, 

Adrien Grassein (8):
  arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
  arm64: dts: imx8mm-nitrogen-r2: add USB support
  arm64: dts: imx8mm-nitrogen-r2: add espi2 support
  arm64: dts: imx8mm-nitrogen-r2: add uarts
  arm64: dts: imx8mm-nitrogen-r2: add pwms
  arm64: dts: imx8mm-nitrogen-r2: add flexspi
  arm64: dts: imx8mm-nitrogen-r2: add sai
  arm64: defconfig: Enable wm8960 audio driver.

 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 308 ++++++++++++++++++
 arch/arm64/configs/defconfig                  |   1 +
 2 files changed, 309 insertions(+)

-- 
2.25.1


^ permalink raw reply	[flat|nested] 36+ messages in thread
* [PATCH 0/8] Add peripheral support for imx8mm-nitrogen-r2 board
@ 2021-02-15 23:19 ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

Hi,

this patch set is to add several peripheral support for the
imx8mm-nitrogen-r2 board.

Thanks, 

Adrien Grassein (8):
  arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
  arm64: dts: imx8mm-nitrogen-r2: add USB support
  arm64: dts: imx8mm-nitrogen-r2: add espi2 support
  arm64: dts: imx8mm-nitrogen-r2: add uarts
  arm64: dts: imx8mm-nitrogen-r2: add pwms
  arm64: dts: imx8mm-nitrogen-r2: add flexspi
  arm64: dts: imx8mm-nitrogen-r2: add sai
  arm64: defconfig: Enable wm8960 audio driver.

 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 308 ++++++++++++++++++
 arch/arm64/configs/defconfig                  |   1 +
 2 files changed, 309 insertions(+)

-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* [PATCH 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

Add usdhc3 description which corresponds to the wifi/bt chip

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index c0c384d76147..bf20a40bcda0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -9,6 +9,18 @@
 / {
 	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
 	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
+
+	reg_wlan_vmmc: regulator-wlan-vmmc {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
+		regulator-name = "reg_wlan_vmmc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		startup-delay-us = <70000>;
+	};
 };
 
 &A53_0 {
@@ -206,6 +218,19 @@ &usdhc2 {
 	status = "okay";
 };
 
+/* wlan */
+&usdhc3 {
+	bus-width = <4>;
+	sdhci-caps-mask = <0x2 0x0>;
+	non-removable;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	vmmc-supply = <&reg_wlan_vmmc>;
+	status = "okay";
+};
+
 &wdog1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_wdog>;
@@ -264,6 +289,12 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
 		>;
 	};
 
+	pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

Add usdhc3 description which corresponds to the wifi/bt chip

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index c0c384d76147..bf20a40bcda0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -9,6 +9,18 @@
 / {
 	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
 	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
+
+	reg_wlan_vmmc: regulator-wlan-vmmc {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
+		regulator-name = "reg_wlan_vmmc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		startup-delay-us = <70000>;
+	};
 };
 
 &A53_0 {
@@ -206,6 +218,19 @@ &usdhc2 {
 	status = "okay";
 };
 
+/* wlan */
+&usdhc3 {
+	bus-width = <4>;
+	sdhci-caps-mask = <0x2 0x0>;
+	non-removable;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	vmmc-supply = <&reg_wlan_vmmc>;
+	status = "okay";
+};
+
 &wdog1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_wdog>;
@@ -264,6 +289,12 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
 		>;
 	};
 
+	pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 2/8] arm64: dts: imx8mm-nitrogen-r2: add USB support
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

add description of USB.
usbotg2 seems to not working on all boards (including ones
from variscite).

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 42 +++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index bf20a40bcda0..1b29d8a12d04 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -231,6 +231,34 @@ &usdhc3 {
 	status = "okay";
 };
 
+/* USB OTG port */
+&usbotg1 {
+	dr_mode = "otg";
+	over-current-active-low;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg1>;
+	power-active-high;
+	status = "okay";
+};
+
+/* USB Host port */
+&usbotg2 {
+	dr_mode = "host";
+	over-current-active-low;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg2>;
+	power-active-high;
+	/*
+	 * FIXME: having USB2 enabled hangs the boot just after:
+	 *[    1.655941] ci_hdrc ci_hdrc.1: EHCI Host Controller
+	 *[    1.660880] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 2
+	 *[    1.681505] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00
+	 *[    1.687730] hub 2-0:1.0: USB hub found
+	 *[    1.691528] hub 2-0:1.0: 1 port detected
+	 */
+	status = "disabled";
+};
+
 &wdog1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_wdog>;
@@ -302,6 +330,20 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
 		>;
 	};
 
+	pinctrl_usbotg1: usbotg1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
+			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x156
+		>;
+	};
+
+	pinctrl_usbotg2: usbotg2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR	0x16
+			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x156
+		>;
+	};
+
 	pinctrl_usdhc1: usdhc1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x190
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 2/8] arm64: dts: imx8mm-nitrogen-r2: add USB support
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

add description of USB.
usbotg2 seems to not working on all boards (including ones
from variscite).

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 42 +++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index bf20a40bcda0..1b29d8a12d04 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -231,6 +231,34 @@ &usdhc3 {
 	status = "okay";
 };
 
+/* USB OTG port */
+&usbotg1 {
+	dr_mode = "otg";
+	over-current-active-low;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg1>;
+	power-active-high;
+	status = "okay";
+};
+
+/* USB Host port */
+&usbotg2 {
+	dr_mode = "host";
+	over-current-active-low;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg2>;
+	power-active-high;
+	/*
+	 * FIXME: having USB2 enabled hangs the boot just after:
+	 *[    1.655941] ci_hdrc ci_hdrc.1: EHCI Host Controller
+	 *[    1.660880] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 2
+	 *[    1.681505] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00
+	 *[    1.687730] hub 2-0:1.0: USB hub found
+	 *[    1.691528] hub 2-0:1.0: 1 port detected
+	 */
+	status = "disabled";
+};
+
 &wdog1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_wdog>;
@@ -302,6 +330,20 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
 		>;
 	};
 
+	pinctrl_usbotg1: usbotg1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
+			MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x156
+		>;
+	};
+
+	pinctrl_usbotg2: usbotg2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR	0x16
+			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x156
+		>;
+	};
+
 	pinctrl_usdhc1: usdhc1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x190
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

Add the description for espi support.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 1b29d8a12d04..22acde0f3ba8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -10,6 +10,14 @@ / {
 	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
 	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
 
+	clocks {
+		clk16m: clk16m {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <16000000>;
+		};
+	};
+
 	reg_wlan_vmmc: regulator-wlan-vmmc {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
@@ -39,6 +47,19 @@ &A53_3 {
 	cpu-supply = <&reg_buck3>;
 };
 
+/* J15 */
+&ecspi2 {
+	assigned-clocks = <&clk IMX8MM_CLK_ECSPI2>;
+	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>;
+	assigned-clock-rates = <40000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi2>;
+	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+};
+
 &fec1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_fec1>;
@@ -270,6 +291,15 @@ &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
+	pinctrl_ecspi2: ecspi2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0x140
+			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0x19
+			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0x19
+			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0x19
+		>;
+	};
+
 	pinctrl_fec1: fec1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_ENET_MDC_ENET1_MDC			0x3
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

Add the description for espi support.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 1b29d8a12d04..22acde0f3ba8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -10,6 +10,14 @@ / {
 	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
 	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
 
+	clocks {
+		clk16m: clk16m {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <16000000>;
+		};
+	};
+
 	reg_wlan_vmmc: regulator-wlan-vmmc {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
@@ -39,6 +47,19 @@ &A53_3 {
 	cpu-supply = <&reg_buck3>;
 };
 
+/* J15 */
+&ecspi2 {
+	assigned-clocks = <&clk IMX8MM_CLK_ECSPI2>;
+	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>;
+	assigned-clock-rates = <40000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi2>;
+	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+};
+
 &fec1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_fec1>;
@@ -270,6 +291,15 @@ &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
+	pinctrl_ecspi2: ecspi2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0x140
+			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0x19
+			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0x19
+			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0x19
+		>;
+	};
+
 	pinctrl_fec1: fec1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_ENET_MDC_ENET1_MDC			0x3
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 4/8] arm64: dts: imx8mm-nitrogen-r2: add uarts
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

Add description and pinmuxing for uarts.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 53 ++++++++++++++++++-
 1 file changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 22acde0f3ba8..3c5b692f6ad1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -206,6 +206,15 @@ rtc@68 {
 	};
 };
 
+/* BT */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART1>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
 /* console */
 &uart2 {
 	pinctrl-names = "default";
@@ -215,6 +224,23 @@ &uart2 {
 	status = "okay";
 };
 
+/* J15 */
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART3>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
+/* J9 */
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART4>;
+	status = "okay";
+};
+
 /* eMMC */
 &usdhc1 {
 	bus-width = <8>;
@@ -353,6 +379,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
 		>;
 	};
 
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+			MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+			MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
@@ -360,6 +395,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
 		>;
 	};
 
+	pinctrl_uart3: uart3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
+			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
+			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
+			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
+		>;
+	};
+
+	pinctrl_uart4: uart4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
+			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
+		>;
+	};
+
 	pinctrl_usbotg1: usbotg1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
@@ -370,7 +421,7 @@ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x156
 	pinctrl_usbotg2: usbotg2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR	0x16
-			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x156
+			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x15
 		>;
 	};
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 4/8] arm64: dts: imx8mm-nitrogen-r2: add uarts
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

Add description and pinmuxing for uarts.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 53 ++++++++++++++++++-
 1 file changed, 52 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 22acde0f3ba8..3c5b692f6ad1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -206,6 +206,15 @@ rtc@68 {
 	};
 };
 
+/* BT */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART1>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
 /* console */
 &uart2 {
 	pinctrl-names = "default";
@@ -215,6 +224,23 @@ &uart2 {
 	status = "okay";
 };
 
+/* J15 */
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART3>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
+/* J9 */
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART4>;
+	status = "okay";
+};
+
 /* eMMC */
 &usdhc1 {
 	bus-width = <8>;
@@ -353,6 +379,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
 		>;
 	};
 
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
+			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
+			MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
+			MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
@@ -360,6 +395,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
 		>;
 	};
 
+	pinctrl_uart3: uart3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
+			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
+			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
+			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
+		>;
+	};
+
+	pinctrl_uart4: uart4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
+			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
+		>;
+	};
+
 	pinctrl_usbotg1: usbotg1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
@@ -370,7 +421,7 @@ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x156
 	pinctrl_usbotg2: usbotg2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR	0x16
-			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x156
+			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x15
 		>;
 	};
 
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 5/8] arm64: dts: imx8mm-nitrogen-r2: add pwms
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

Add description for the four pwms.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 51 +++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 3c5b692f6ad1..eafdf39e1f39 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -206,6 +206,33 @@ rtc@68 {
 	};
 };
 
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm1>;
+	status = "okay";
+};
+
+&pwm2 {
+	assigned-clocks = <&clk IMX8MM_CLK_PWM2>;
+	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>;
+	assigned-clock-rates = <40000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm2>;
+	status = "okay";
+};
+
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm3>;
+	status = "okay";
+};
+
+&pwm4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm4>;
+	status = "okay";
+};
+
 /* BT */
 &uart1 {
 	pinctrl-names = "default";
@@ -373,6 +400,30 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
 		>;
 	};
 
+	pinctrl_pwm1: pwm1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x16
+		>;
+	};
+
+	pinctrl_pwm2: pwm2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x16
+		>;
+	};
+
+	pinctrl_pwm3: pwm3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x16
+		>;
+	};
+
+	pinctrl_pwm4: pwm4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x16
+		>;
+	};
+
 	pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp {
 		fsl,pins = <
 			MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 5/8] arm64: dts: imx8mm-nitrogen-r2: add pwms
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

Add description for the four pwms.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 51 +++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 3c5b692f6ad1..eafdf39e1f39 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -206,6 +206,33 @@ rtc@68 {
 	};
 };
 
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm1>;
+	status = "okay";
+};
+
+&pwm2 {
+	assigned-clocks = <&clk IMX8MM_CLK_PWM2>;
+	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>;
+	assigned-clock-rates = <40000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm2>;
+	status = "okay";
+};
+
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm3>;
+	status = "okay";
+};
+
+&pwm4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm4>;
+	status = "okay";
+};
+
 /* BT */
 &uart1 {
 	pinctrl-names = "default";
@@ -373,6 +400,30 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
 		>;
 	};
 
+	pinctrl_pwm1: pwm1grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x16
+		>;
+	};
+
+	pinctrl_pwm2: pwm2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x16
+		>;
+	};
+
+	pinctrl_pwm3: pwm3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x16
+		>;
+	};
+
+	pinctrl_pwm4: pwm4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x16
+		>;
+	};
+
 	pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp {
 		fsl,pins = <
 			MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 6/8] arm64: dts: imx8mm-nitrogen-r2: add flexspi
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

Add flexspi description an pinmuxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts   | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index eafdf39e1f39..5ba3c8ef7706 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -80,6 +80,12 @@ ethphy0: ethernet-phy@4 {
 	};
 };
 
+&flexspi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexspi>;
+	status = "okay";
+};
+
 &i2c1 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
@@ -373,6 +379,17 @@ MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16		0x159
 		>;
 	};
 
+	pinctrl_flexspi: flexspigrp {
+		fsl,pins = <
+			MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK	0x1c2
+			MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B	0x82
+			MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0	0x82
+			MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1	0x82
+			MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2	0x82
+			MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3	0x82
+		>;
+	};
+
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 6/8] arm64: dts: imx8mm-nitrogen-r2: add flexspi
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

Add flexspi description an pinmuxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts   | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index eafdf39e1f39..5ba3c8ef7706 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -80,6 +80,12 @@ ethphy0: ethernet-phy@4 {
 	};
 };
 
+&flexspi {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexspi>;
+	status = "okay";
+};
+
 &i2c1 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
@@ -373,6 +379,17 @@ MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16		0x159
 		>;
 	};
 
+	pinctrl_flexspi: flexspigrp {
+		fsl,pins = <
+			MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK	0x1c2
+			MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B	0x82
+			MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0	0x82
+			MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1	0x82
+			MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2	0x82
+			MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3	0x82
+		>;
+	};
+
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 7/8] arm64: dts: imx8mm-nitrogen-r2: add sai
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

Add SAI description and pinmuxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 86 +++++++++++++++++++
 1 file changed, 86 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 5ba3c8ef7706..6c77d50d9e5d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -29,6 +29,29 @@ reg_wlan_vmmc: regulator-wlan-vmmc {
 		enable-active-high;
 		startup-delay-us = <70000>;
 	};
+
+	sound-wm8960 {
+		audio-cpu = <&sai1>;
+		audio-codec = <&wm8960>;
+		audio-routing =
+			"Headphone Jack", "HP_L",
+			"Headphone Jack", "HP_R",
+			"Ext Spk", "SPK_LP",
+			"Ext Spk", "SPK_LN",
+			"Ext Spk", "SPK_RP",
+			"Ext Spk", "SPK_RN",
+			"RINPUT1", "Mic Jack",
+			"Mic Jack", "MICB";
+		codec-master;
+		compatible = "fsl,imx-audio-wm8960";
+		/* JD2: hp detect high for headphone*/
+		hp-det-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
+		/* Jack is not stuffed */
+		mic-det-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+		model = "wm8960-audio";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_sound_wm8960>;
+	};
 };
 
 &A53_0 {
@@ -212,6 +235,22 @@ rtc@68 {
 	};
 };
 
+&i2c4 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c4>;
+	status = "okay";
+
+	wm8960: codec@1a {
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
+		clock-names = "mclk1";
+		wlf,shared-lrclk;
+		#sound-dai-cells = <0>;
+	};
+};
+
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
@@ -239,6 +278,18 @@ &pwm4 {
 	status = "okay";
 };
 
+&sai1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai1>;
+	status = "okay";
+};
+
+&sai2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai2>;
+	status = "okay";
+};
+
 /* BT */
 &uart1 {
 	pinctrl-names = "default";
@@ -411,6 +462,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
 		>;
 	};
 
+	pinctrl_i2c4: i2c4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
+			MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
+		>;
+	};
+
 	pinctrl_i2c3a_rv4162: i2c3a-rv4162grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
@@ -447,6 +505,34 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
 		>;
 	};
 
+	pinctrl_sai1: sai1grp {
+		fsl,pins = <
+			/* wm8960 */
+			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6
+			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6
+			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6
+			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6
+			MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0	0xd6
+		>;
+	};
+
+	pinctrl_sai2: sai2grp {
+		fsl,pins = <
+			/* Bluetooth PCM */
+			MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
+			MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
+			MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
+			MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
+		>;
+	};
+
+	pinctrl_sound_wm8960: sound-wm8960grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x80
+			MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28	0x80
+		>;
+	};
+
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 7/8] arm64: dts: imx8mm-nitrogen-r2: add sai
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

Add SAI description and pinmuxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 86 +++++++++++++++++++
 1 file changed, 86 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
index 5ba3c8ef7706..6c77d50d9e5d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
@@ -29,6 +29,29 @@ reg_wlan_vmmc: regulator-wlan-vmmc {
 		enable-active-high;
 		startup-delay-us = <70000>;
 	};
+
+	sound-wm8960 {
+		audio-cpu = <&sai1>;
+		audio-codec = <&wm8960>;
+		audio-routing =
+			"Headphone Jack", "HP_L",
+			"Headphone Jack", "HP_R",
+			"Ext Spk", "SPK_LP",
+			"Ext Spk", "SPK_LN",
+			"Ext Spk", "SPK_RP",
+			"Ext Spk", "SPK_RN",
+			"RINPUT1", "Mic Jack",
+			"Mic Jack", "MICB";
+		codec-master;
+		compatible = "fsl,imx-audio-wm8960";
+		/* JD2: hp detect high for headphone*/
+		hp-det-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
+		/* Jack is not stuffed */
+		mic-det-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+		model = "wm8960-audio";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_sound_wm8960>;
+	};
 };
 
 &A53_0 {
@@ -212,6 +235,22 @@ rtc@68 {
 	};
 };
 
+&i2c4 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c4>;
+	status = "okay";
+
+	wm8960: codec@1a {
+		compatible = "wlf,wm8960";
+		reg = <0x1a>;
+		clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
+		clock-names = "mclk1";
+		wlf,shared-lrclk;
+		#sound-dai-cells = <0>;
+	};
+};
+
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
@@ -239,6 +278,18 @@ &pwm4 {
 	status = "okay";
 };
 
+&sai1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai1>;
+	status = "okay";
+};
+
+&sai2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai2>;
+	status = "okay";
+};
+
 /* BT */
 &uart1 {
 	pinctrl-names = "default";
@@ -411,6 +462,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
 		>;
 	};
 
+	pinctrl_i2c4: i2c4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
+			MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
+		>;
+	};
+
 	pinctrl_i2c3a_rv4162: i2c3a-rv4162grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
@@ -447,6 +505,34 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
 		>;
 	};
 
+	pinctrl_sai1: sai1grp {
+		fsl,pins = <
+			/* wm8960 */
+			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6
+			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6
+			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6
+			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6
+			MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0	0xd6
+		>;
+	};
+
+	pinctrl_sai2: sai2grp {
+		fsl,pins = <
+			/* Bluetooth PCM */
+			MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
+			MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
+			MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
+			MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
+		>;
+	};
+
+	pinctrl_sound_wm8960: sound-wm8960grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x80
+			MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28	0x80
+		>;
+	};
+
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 8/8] arm64: defconfig: Enable wm8960 audio driver.
  2021-02-15 23:19 ` Adrien Grassein
@ 2021-02-15 23:19   ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, krzk, devicetree, linux-arm-kernel,
	linux-kernel, Adrien Grassein

This driver is used by the Nitrogen8m Mini SBC.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 292c00f893fc..bd310e91d4ed 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -764,6 +764,7 @@ CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
 CONFIG_SND_SOC_TAS571X=m
 CONFIG_SND_SOC_WCD934X=m
 CONFIG_SND_SOC_WM8904=m
+CONFIG_SND_SOC_WM8960=m
 CONFIG_SND_SOC_WM8962=m
 CONFIG_SND_SOC_WSA881X=m
 CONFIG_SND_SOC_LPASS_WSA_MACRO=m
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 36+ messages in thread
* [PATCH 8/8] arm64: defconfig: Enable wm8960 audio driver.
@ 2021-02-15 23:19   ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-15 23:19 UTC (permalink / raw)
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, krzk, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel,
	Adrien Grassein

This driver is used by the Nitrogen8m Mini SBC.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 292c00f893fc..bd310e91d4ed 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -764,6 +764,7 @@ CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m
 CONFIG_SND_SOC_TAS571X=m
 CONFIG_SND_SOC_WCD934X=m
 CONFIG_SND_SOC_WM8904=m
+CONFIG_SND_SOC_WM8960=m
 CONFIG_SND_SOC_WM8962=m
 CONFIG_SND_SOC_WSA881X=m
 CONFIG_SND_SOC_LPASS_WSA_MACRO=m
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 36+ messages in thread
* Re: [PATCH 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
  2021-02-15 23:19   ` Adrien Grassein
@ 2021-02-17 11:58     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 11:58 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, devicetree, linux-arm-kernel,
	linux-kernel

On Tue, Feb 16, 2021 at 12:19:36AM +0100, Adrien Grassein wrote:
> Add usdhc3 description which corresponds to the wifi/bt chip
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index c0c384d76147..bf20a40bcda0 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -9,6 +9,18 @@
>  / {
>  	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
>  	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
> +
> +	reg_wlan_vmmc: regulator-wlan-vmmc {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
> +		regulator-name = "reg_wlan_vmmc";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		startup-delay-us = <70000>;

That's quite a startup time... and it happens is the same as in bindings
example. Do you really need it or it was just copied?

I actually don't mind it, just poking at various things. :)

> +	};
>  };
>  
>  &A53_0 {
> @@ -206,6 +218,19 @@ &usdhc2 {
>  	status = "okay";
>  };
>  
> +/* wlan */
> +&usdhc3 {
> +	bus-width = <4>;
> +	sdhci-caps-mask = <0x2 0x0>;
> +	non-removable;
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc3>;
> +	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> +	vmmc-supply = <&reg_wlan_vmmc>;

What about vqmmc?

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
@ 2021-02-17 11:58     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 11:58 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel

On Tue, Feb 16, 2021 at 12:19:36AM +0100, Adrien Grassein wrote:
> Add usdhc3 description which corresponds to the wifi/bt chip
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index c0c384d76147..bf20a40bcda0 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -9,6 +9,18 @@
>  / {
>  	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
>  	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
> +
> +	reg_wlan_vmmc: regulator-wlan-vmmc {
> +		compatible = "regulator-fixed";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
> +		regulator-name = "reg_wlan_vmmc";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +		startup-delay-us = <70000>;

That's quite a startup time... and it happens is the same as in bindings
example. Do you really need it or it was just copied?

I actually don't mind it, just poking at various things. :)

> +	};
>  };
>  
>  &A53_0 {
> @@ -206,6 +218,19 @@ &usdhc2 {
>  	status = "okay";
>  };
>  
> +/* wlan */
> +&usdhc3 {
> +	bus-width = <4>;
> +	sdhci-caps-mask = <0x2 0x0>;
> +	non-removable;
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc3>;
> +	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> +	vmmc-supply = <&reg_wlan_vmmc>;

What about vqmmc?

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 2/8] arm64: dts: imx8mm-nitrogen-r2: add USB support
  2021-02-15 23:19   ` Adrien Grassein
@ 2021-02-17 12:03     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 12:03 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, devicetree, linux-arm-kernel,
	linux-kernel

On Tue, Feb 16, 2021 at 12:19:37AM +0100, Adrien Grassein wrote:
> add description of USB.

s/add/Add/

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 2/8] arm64: dts: imx8mm-nitrogen-r2: add USB support
@ 2021-02-17 12:03     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 12:03 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel

On Tue, Feb 16, 2021 at 12:19:37AM +0100, Adrien Grassein wrote:
> add description of USB.

s/add/Add/

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
  2021-02-15 23:19   ` Adrien Grassein
@ 2021-02-17 14:20     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:20 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, devicetree, linux-arm-kernel,
	linux-kernel

On Tue, Feb 16, 2021 at 12:19:38AM +0100, Adrien Grassein wrote:
> Add the description for espi support.
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index 1b29d8a12d04..22acde0f3ba8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -10,6 +10,14 @@ / {
>  	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
>  	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
>  
> +	clocks {
> +		clk16m: clk16m {

Node name: clock or clock-16m.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
@ 2021-02-17 14:20     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:20 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel

On Tue, Feb 16, 2021 at 12:19:38AM +0100, Adrien Grassein wrote:
> Add the description for espi support.
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index 1b29d8a12d04..22acde0f3ba8 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -10,6 +10,14 @@ / {
>  	model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
>  	compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
>  
> +	clocks {
> +		clk16m: clk16m {

Node name: clock or clock-16m.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 4/8] arm64: dts: imx8mm-nitrogen-r2: add uarts
  2021-02-15 23:19   ` Adrien Grassein
@ 2021-02-17 14:22     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:22 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, devicetree, linux-arm-kernel,
	linux-kernel

On Tue, Feb 16, 2021 at 12:19:39AM +0100, Adrien Grassein wrote:
> Add description and pinmuxing for uarts.
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 53 ++++++++++++++++++-
>  1 file changed, 52 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index 22acde0f3ba8..3c5b692f6ad1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -206,6 +206,15 @@ rtc@68 {
>  	};
>  };
>  
> +/* BT */
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart1>;
> +	assigned-clocks = <&clk IMX8MM_CLK_UART1>;

I see you have it also for uart2 - what is the purpose of it? What does
the "assigned-clocks" property alone do?

> +	uart-has-rtscts;
> +	status = "okay";
> +};
> +
>  /* console */
>  &uart2 {
>  	pinctrl-names = "default";
> @@ -215,6 +224,23 @@ &uart2 {
>  	status = "okay";
>  };
>  
> +/* J15 */
> +&uart3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart3>;
> +	assigned-clocks = <&clk IMX8MM_CLK_UART3>;
> +	uart-has-rtscts;
> +	status = "okay";
> +};
> +
> +/* J9 */
> +&uart4 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart4>;
> +	assigned-clocks = <&clk IMX8MM_CLK_UART4>;
> +	status = "okay";
> +};
> +
>  /* eMMC */
>  &usdhc1 {
>  	bus-width = <8>;
> @@ -353,6 +379,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
>  		>;
>  	};
>  
> +	pinctrl_uart1: uart1grp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
> +			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
> +			MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
> +			MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
> +		>;
> +	};
> +
>  	pinctrl_uart2: uart2grp {
>  		fsl,pins = <
>  			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> @@ -360,6 +395,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
>  		>;
>  	};
>  
> +	pinctrl_uart3: uart3grp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
> +			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
> +			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
> +			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
> +		>;
> +	};
> +
> +	pinctrl_uart4: uart4grp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
> +			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
> +		>;
> +	};
> +
>  	pinctrl_usbotg1: usbotg1grp {
>  		fsl,pins = <
>  			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
> @@ -370,7 +421,7 @@ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x156
>  	pinctrl_usbotg2: usbotg2grp {
>  		fsl,pins = <
>  			MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR	0x16
> -			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x156
> +			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x15

This is not relevant to the topic.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 4/8] arm64: dts: imx8mm-nitrogen-r2: add uarts
@ 2021-02-17 14:22     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:22 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel

On Tue, Feb 16, 2021 at 12:19:39AM +0100, Adrien Grassein wrote:
> Add description and pinmuxing for uarts.
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 53 ++++++++++++++++++-
>  1 file changed, 52 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> index 22acde0f3ba8..3c5b692f6ad1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> @@ -206,6 +206,15 @@ rtc@68 {
>  	};
>  };
>  
> +/* BT */
> +&uart1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart1>;
> +	assigned-clocks = <&clk IMX8MM_CLK_UART1>;

I see you have it also for uart2 - what is the purpose of it? What does
the "assigned-clocks" property alone do?

> +	uart-has-rtscts;
> +	status = "okay";
> +};
> +
>  /* console */
>  &uart2 {
>  	pinctrl-names = "default";
> @@ -215,6 +224,23 @@ &uart2 {
>  	status = "okay";
>  };
>  
> +/* J15 */
> +&uart3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart3>;
> +	assigned-clocks = <&clk IMX8MM_CLK_UART3>;
> +	uart-has-rtscts;
> +	status = "okay";
> +};
> +
> +/* J9 */
> +&uart4 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart4>;
> +	assigned-clocks = <&clk IMX8MM_CLK_UART4>;
> +	status = "okay";
> +};
> +
>  /* eMMC */
>  &usdhc1 {
>  	bus-width = <8>;
> @@ -353,6 +379,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
>  		>;
>  	};
>  
> +	pinctrl_uart1: uart1grp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
> +			MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
> +			MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
> +			MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
> +		>;
> +	};
> +
>  	pinctrl_uart2: uart2grp {
>  		fsl,pins = <
>  			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> @@ -360,6 +395,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
>  		>;
>  	};
>  
> +	pinctrl_uart3: uart3grp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
> +			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
> +			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
> +			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
> +		>;
> +	};
> +
> +	pinctrl_uart4: uart4grp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
> +			MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
> +		>;
> +	};
> +
>  	pinctrl_usbotg1: usbotg1grp {
>  		fsl,pins = <
>  			MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR	0x16
> @@ -370,7 +421,7 @@ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC	0x156
>  	pinctrl_usbotg2: usbotg2grp {
>  		fsl,pins = <
>  			MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR	0x16
> -			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x156
> +			MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC	0x15

This is not relevant to the topic.

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 5/8] arm64: dts: imx8mm-nitrogen-r2: add pwms
  2021-02-15 23:19   ` Adrien Grassein
@ 2021-02-17 14:25     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:25 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, devicetree, linux-arm-kernel,
	linux-kernel

On Tue, Feb 16, 2021 at 12:19:40AM +0100, Adrien Grassein wrote:
> Add description for the four pwms.

In title and msg: PWM is an acronym, so "four PWMs", "add PWMs".

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 5/8] arm64: dts: imx8mm-nitrogen-r2: add pwms
@ 2021-02-17 14:25     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:25 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel

On Tue, Feb 16, 2021 at 12:19:40AM +0100, Adrien Grassein wrote:
> Add description for the four pwms.

In title and msg: PWM is an acronym, so "four PWMs", "add PWMs".

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 6/8] arm64: dts: imx8mm-nitrogen-r2: add flexspi
  2021-02-15 23:19   ` Adrien Grassein
@ 2021-02-17 14:27     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:27 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, devicetree, linux-arm-kernel,
	linux-kernel

On Tue, Feb 16, 2021 at 12:19:41AM +0100, Adrien Grassein wrote:
> Add flexspi description an pinmuxing.

FlexSPI, pin muxing (with a space).

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 6/8] arm64: dts: imx8mm-nitrogen-r2: add flexspi
@ 2021-02-17 14:27     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:27 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel

On Tue, Feb 16, 2021 at 12:19:41AM +0100, Adrien Grassein wrote:
> Add flexspi description an pinmuxing.

FlexSPI, pin muxing (with a space).

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 8/8] arm64: defconfig: Enable wm8960 audio driver.
  2021-02-15 23:19   ` Adrien Grassein
@ 2021-02-17 14:29     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:29 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: robh+dt, shawnguo, s.hauer, kernel, festevam, linux-imx,
	catalin.marinas, will, devicetree, linux-arm-kernel,
	linux-kernel

On Tue, Feb 16, 2021 at 12:19:43AM +0100, Adrien Grassein wrote:
> This driver is used by the Nitrogen8m Mini SBC.
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  arch/arm64/configs/defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 8/8] arm64: defconfig: Enable wm8960 audio driver.
@ 2021-02-17 14:29     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 36+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-17 14:29 UTC (permalink / raw)
  To: Adrien Grassein
  Cc: devicetree, will, shawnguo, s.hauer, linux-kernel, robh+dt,
	linux-imx, kernel, catalin.marinas, festevam, linux-arm-kernel

On Tue, Feb 16, 2021 at 12:19:43AM +0100, Adrien Grassein wrote:
> This driver is used by the Nitrogen8m Mini SBC.
> 
> Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> ---
>  arch/arm64/configs/defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
  2021-02-17 11:58     ` Krzysztof Kozlowski
@ 2021-02-17 14:43       ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-17 14:43 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Rob Herring, Shawn Guo, Sascha Hauer, Sascha Hauer,
	Fabio Estevam, dl-linux-imx, catalin.marinas, will, DTML,
	linux-arm-kernel, linux-kernel

Hello,

Thanks for your review and your time.

Le mer. 17 févr. 2021 à 12:58, Krzysztof Kozlowski <krzk@kernel.org> a écrit :
>
> On Tue, Feb 16, 2021 at 12:19:36AM +0100, Adrien Grassein wrote:
> > Add usdhc3 description which corresponds to the wifi/bt chip
> >
> > Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> > ---
> >  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++
> >  1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > index c0c384d76147..bf20a40bcda0 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > @@ -9,6 +9,18 @@
> >  / {
> >       model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
> >       compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
> > +
> > +     reg_wlan_vmmc: regulator-wlan-vmmc {
> > +             compatible = "regulator-fixed";
> > +             pinctrl-names = "default";
> > +             pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
> > +             regulator-name = "reg_wlan_vmmc";
> > +             regulator-min-microvolt = <3300000>;
> > +             regulator-max-microvolt = <3300000>;
> > +             gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
> > +             enable-active-high;
> > +             startup-delay-us = <70000>;
>
> That's quite a startup time... and it happens is the same as in bindings
> example. Do you really need it or it was just copied?
>
> I actually don't mind it, just poking at various things. :)
>

It was a copy/paste. I've just retested without this, it works.

> > +     };
> >  };
> >
> >  &A53_0 {
> > @@ -206,6 +218,19 @@ &usdhc2 {
> >       status = "okay";
> >  };
> >
> > +/* wlan */
> > +&usdhc3 {
> > +     bus-width = <4>;
> > +     sdhci-caps-mask = <0x2 0x0>;
> > +     non-removable;
> > +     pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > +     pinctrl-0 = <&pinctrl_usdhc3>;
> > +     pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> > +     pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> > +     vmmc-supply = <&reg_wlan_vmmc>;
>
> What about vqmmc?
>

It was missing, thanks,

> Best regards,
> Krzysztof

Best regards,
Adrien

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
@ 2021-02-17 14:43       ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-17 14:43 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: DTML, will, Shawn Guo, Sascha Hauer, linux-kernel, Rob Herring,
	dl-linux-imx, Sascha Hauer, catalin.marinas, Fabio Estevam,
	linux-arm-kernel

Hello,

Thanks for your review and your time.

Le mer. 17 févr. 2021 à 12:58, Krzysztof Kozlowski <krzk@kernel.org> a écrit :
>
> On Tue, Feb 16, 2021 at 12:19:36AM +0100, Adrien Grassein wrote:
> > Add usdhc3 description which corresponds to the wifi/bt chip
> >
> > Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> > ---
> >  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++
> >  1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > index c0c384d76147..bf20a40bcda0 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > @@ -9,6 +9,18 @@
> >  / {
> >       model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2";
> >       compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
> > +
> > +     reg_wlan_vmmc: regulator-wlan-vmmc {
> > +             compatible = "regulator-fixed";
> > +             pinctrl-names = "default";
> > +             pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
> > +             regulator-name = "reg_wlan_vmmc";
> > +             regulator-min-microvolt = <3300000>;
> > +             regulator-max-microvolt = <3300000>;
> > +             gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
> > +             enable-active-high;
> > +             startup-delay-us = <70000>;
>
> That's quite a startup time... and it happens is the same as in bindings
> example. Do you really need it or it was just copied?
>
> I actually don't mind it, just poking at various things. :)
>

It was a copy/paste. I've just retested without this, it works.

> > +     };
> >  };
> >
> >  &A53_0 {
> > @@ -206,6 +218,19 @@ &usdhc2 {
> >       status = "okay";
> >  };
> >
> > +/* wlan */
> > +&usdhc3 {
> > +     bus-width = <4>;
> > +     sdhci-caps-mask = <0x2 0x0>;
> > +     non-removable;
> > +     pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > +     pinctrl-0 = <&pinctrl_usdhc3>;
> > +     pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> > +     pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> > +     vmmc-supply = <&reg_wlan_vmmc>;
>
> What about vqmmc?
>

It was missing, thanks,

> Best regards,
> Krzysztof

Best regards,
Adrien

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 4/8] arm64: dts: imx8mm-nitrogen-r2: add uarts
  2021-02-17 14:22     ` Krzysztof Kozlowski
@ 2021-02-17 16:09       ` Adrien Grassein
  -1 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-17 16:09 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Rob Herring, Shawn Guo, Sascha Hauer, Sascha Hauer,
	Fabio Estevam, dl-linux-imx, catalin.marinas, will, DTML,
	linux-arm-kernel, linux-kernel

Le mer. 17 févr. 2021 à 15:22, Krzysztof Kozlowski <krzk@kernel.org> a écrit :
>
> On Tue, Feb 16, 2021 at 12:19:39AM +0100, Adrien Grassein wrote:
> > Add description and pinmuxing for uarts.
> >
> > Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> > ---
> >  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 53 ++++++++++++++++++-
> >  1 file changed, 52 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > index 22acde0f3ba8..3c5b692f6ad1 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > @@ -206,6 +206,15 @@ rtc@68 {
> >       };
> >  };
> >
> > +/* BT */
> > +&uart1 {
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&pinctrl_uart1>;
> > +     assigned-clocks = <&clk IMX8MM_CLK_UART1>;
>
> I see you have it also for uart2 - what is the purpose of it? What does
> the "assigned-clocks" property alone do?
>

 It was a mistake. I forgot to remove this property.

> > +     uart-has-rtscts;
> > +     status = "okay";
> > +};
> > +
> >  /* console */
> >  &uart2 {
> >       pinctrl-names = "default";
> > @@ -215,6 +224,23 @@ &uart2 {
> >       status = "okay";
> >  };
> >
> > +/* J15 */
> > +&uart3 {
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&pinctrl_uart3>;
> > +     assigned-clocks = <&clk IMX8MM_CLK_UART3>;
> > +     uart-has-rtscts;
> > +     status = "okay";
> > +};
> > +
> > +/* J9 */
> > +&uart4 {
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&pinctrl_uart4>;
> > +     assigned-clocks = <&clk IMX8MM_CLK_UART4>;
> > +     status = "okay";
> > +};
> > +
> >  /* eMMC */
> >  &usdhc1 {
> >       bus-width = <8>;
> > @@ -353,6 +379,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
> >               >;
> >       };
> >
> > +     pinctrl_uart1: uart1grp {
> > +             fsl,pins = <
> > +                     MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
> > +                     MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
> > +                     MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
> > +                     MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
> > +             >;
> > +     };
> > +
> >       pinctrl_uart2: uart2grp {
> >               fsl,pins = <
> >                       MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> > @@ -360,6 +395,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
> >               >;
> >       };
> >
> > +     pinctrl_uart3: uart3grp {
> > +             fsl,pins = <
> > +                     MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
> > +                     MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
> > +                     MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
> > +                     MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
> > +             >;
> > +     };
> > +
> > +     pinctrl_uart4: uart4grp {
> > +             fsl,pins = <
> > +                     MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
> > +                     MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
> > +             >;
> > +     };
> > +
> >       pinctrl_usbotg1: usbotg1grp {
> >               fsl,pins = <
> >                       MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR    0x16
> > @@ -370,7 +421,7 @@ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC       0x156
> >       pinctrl_usbotg2: usbotg2grp {
> >               fsl,pins = <
> >                       MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR    0x16
> > -                     MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC     0x156
> > +                     MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC     0x15
>
> This is not relevant to the topic.
>

Thanks, this was also a mistake at rebasing time.

> Best regards,
> Krzysztof

Best regards,
Adrien

^ permalink raw reply	[flat|nested] 36+ messages in thread
* Re: [PATCH 4/8] arm64: dts: imx8mm-nitrogen-r2: add uarts
@ 2021-02-17 16:09       ` Adrien Grassein
  0 siblings, 0 replies; 36+ messages in thread
From: Adrien Grassein @ 2021-02-17 16:09 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: DTML, will, Shawn Guo, Sascha Hauer, linux-kernel, Rob Herring,
	dl-linux-imx, Sascha Hauer, catalin.marinas, Fabio Estevam,
	linux-arm-kernel

Le mer. 17 févr. 2021 à 15:22, Krzysztof Kozlowski <krzk@kernel.org> a écrit :
>
> On Tue, Feb 16, 2021 at 12:19:39AM +0100, Adrien Grassein wrote:
> > Add description and pinmuxing for uarts.
> >
> > Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
> > ---
> >  .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 53 ++++++++++++++++++-
> >  1 file changed, 52 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > index 22acde0f3ba8..3c5b692f6ad1 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts
> > @@ -206,6 +206,15 @@ rtc@68 {
> >       };
> >  };
> >
> > +/* BT */
> > +&uart1 {
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&pinctrl_uart1>;
> > +     assigned-clocks = <&clk IMX8MM_CLK_UART1>;
>
> I see you have it also for uart2 - what is the purpose of it? What does
> the "assigned-clocks" property alone do?
>

 It was a mistake. I forgot to remove this property.

> > +     uart-has-rtscts;
> > +     status = "okay";
> > +};
> > +
> >  /* console */
> >  &uart2 {
> >       pinctrl-names = "default";
> > @@ -215,6 +224,23 @@ &uart2 {
> >       status = "okay";
> >  };
> >
> > +/* J15 */
> > +&uart3 {
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&pinctrl_uart3>;
> > +     assigned-clocks = <&clk IMX8MM_CLK_UART3>;
> > +     uart-has-rtscts;
> > +     status = "okay";
> > +};
> > +
> > +/* J9 */
> > +&uart4 {
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&pinctrl_uart4>;
> > +     assigned-clocks = <&clk IMX8MM_CLK_UART4>;
> > +     status = "okay";
> > +};
> > +
> >  /* eMMC */
> >  &usdhc1 {
> >       bus-width = <8>;
> > @@ -353,6 +379,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
> >               >;
> >       };
> >
> > +     pinctrl_uart1: uart1grp {
> > +             fsl,pins = <
> > +                     MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
> > +                     MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
> > +                     MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
> > +                     MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
> > +             >;
> > +     };
> > +
> >       pinctrl_uart2: uart2grp {
> >               fsl,pins = <
> >                       MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
> > @@ -360,6 +395,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
> >               >;
> >       };
> >
> > +     pinctrl_uart3: uart3grp {
> > +             fsl,pins = <
> > +                     MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140
> > +                     MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140
> > +                     MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140
> > +                     MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140
> > +             >;
> > +     };
> > +
> > +     pinctrl_uart4: uart4grp {
> > +             fsl,pins = <
> > +                     MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
> > +                     MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
> > +             >;
> > +     };
> > +
> >       pinctrl_usbotg1: usbotg1grp {
> >               fsl,pins = <
> >                       MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR    0x16
> > @@ -370,7 +421,7 @@ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC       0x156
> >       pinctrl_usbotg2: usbotg2grp {
> >               fsl,pins = <
> >                       MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR    0x16
> > -                     MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC     0x156
> > +                     MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC     0x15
>
> This is not relevant to the topic.
>

Thanks, this was also a mistake at rebasing time.

> Best regards,
> Krzysztof

Best regards,
Adrien

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 36+ messages in thread
end of thread, other threads:[~2021-02-17 16:12 UTC | newest]

Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-15 23:19 [PATCH 0/8] Add peripheral support for imx8mm-nitrogen-r2 board Adrien Grassein
2021-02-15 23:19 ` Adrien Grassein
2021-02-15 23:19 ` [PATCH 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-17 11:58   ` Krzysztof Kozlowski
2021-02-17 11:58     ` Krzysztof Kozlowski
2021-02-17 14:43     ` Adrien Grassein
2021-02-17 14:43       ` Adrien Grassein
2021-02-15 23:19 ` [PATCH 2/8] arm64: dts: imx8mm-nitrogen-r2: add USB support Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-17 12:03   ` Krzysztof Kozlowski
2021-02-17 12:03     ` Krzysztof Kozlowski
2021-02-15 23:19 ` [PATCH 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-17 14:20   ` Krzysztof Kozlowski
2021-02-17 14:20     ` Krzysztof Kozlowski
2021-02-15 23:19 ` [PATCH 4/8] arm64: dts: imx8mm-nitrogen-r2: add uarts Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-17 14:22   ` Krzysztof Kozlowski
2021-02-17 14:22     ` Krzysztof Kozlowski
2021-02-17 16:09     ` Adrien Grassein
2021-02-17 16:09       ` Adrien Grassein
2021-02-15 23:19 ` [PATCH 5/8] arm64: dts: imx8mm-nitrogen-r2: add pwms Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-17 14:25   ` Krzysztof Kozlowski
2021-02-17 14:25     ` Krzysztof Kozlowski
2021-02-15 23:19 ` [PATCH 6/8] arm64: dts: imx8mm-nitrogen-r2: add flexspi Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-17 14:27   ` Krzysztof Kozlowski
2021-02-17 14:27     ` Krzysztof Kozlowski
2021-02-15 23:19 ` [PATCH 7/8] arm64: dts: imx8mm-nitrogen-r2: add sai Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-15 23:19 ` [PATCH 8/8] arm64: defconfig: Enable wm8960 audio driver Adrien Grassein
2021-02-15 23:19   ` Adrien Grassein
2021-02-17 14:29   ` Krzysztof Kozlowski
2021-02-17 14:29     ` Krzysztof Kozlowski

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