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From: Bindu Ramamurthy <bindu.r@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Qingqing.Zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	Anson.Jacob@amd.com, Aurabindo.Pillai@amd.com,
	Yongqiang Sun <yongqiang.sun@amd.com>,
	Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 07/13] drm/amd/display: move trace buffer to uncached memory.
Date: Fri, 19 Feb 2021 17:16:06 -0500	[thread overview]
Message-ID: <20210219221612.1713328-8-bindu.r@amd.com> (raw)
In-Reply-To: <20210219221612.1713328-1-bindu.r@amd.com>

From: Yongqiang Sun <yongqiang.sun@amd.com>

[Why & How]
Move dmub trace buffer to uncached memory.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
---
 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 7 +++++++
 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h | 7 +++++++
 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c | 7 +++++++
 3 files changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
index 8e8e65fa83c0..ea30da4f794f 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c
@@ -248,6 +248,13 @@ void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
 		  DMCUB_REGION3_CW5_TOP_ADDRESS, cw5->region.top,
 		  DMCUB_REGION3_CW5_ENABLE, 1);
 
+	REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);
+	REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);
+	REG_SET_2(DMCUB_REGION5_TOP_ADDRESS, 0,
+		  DMCUB_REGION5_TOP_ADDRESS,
+		  cw5->region.top - cw5->region.base - 1,
+		  DMCUB_REGION5_ENABLE, 1);
+
 	dmub_dcn20_translate_addr(&cw6->offset, fb_base, fb_offset, &offset);
 
 	REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
index a62be9c0652e..30c6d631a431 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h
@@ -75,6 +75,9 @@ struct dmub_srv;
 	DMUB_SR(DMCUB_REGION4_OFFSET) \
 	DMUB_SR(DMCUB_REGION4_OFFSET_HIGH) \
 	DMUB_SR(DMCUB_REGION4_TOP_ADDRESS) \
+	DMUB_SR(DMCUB_REGION5_OFFSET) \
+	DMUB_SR(DMCUB_REGION5_OFFSET_HIGH) \
+	DMUB_SR(DMCUB_REGION5_TOP_ADDRESS) \
 	DMUB_SR(DMCUB_SCRATCH0) \
 	DMUB_SR(DMCUB_SCRATCH1) \
 	DMUB_SR(DMCUB_SCRATCH2) \
@@ -123,6 +126,8 @@ struct dmub_srv;
 	DMUB_SF(DMCUB_REGION3_CW7_TOP_ADDRESS, DMCUB_REGION3_CW7_ENABLE) \
 	DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_TOP_ADDRESS) \
 	DMUB_SF(DMCUB_REGION4_TOP_ADDRESS, DMCUB_REGION4_ENABLE) \
+	DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_TOP_ADDRESS) \
+	DMUB_SF(DMCUB_REGION5_TOP_ADDRESS, DMCUB_REGION5_ENABLE) \
 	DMUB_SF(CC_DC_PIPE_DIS, DC_DMCUB_ENABLE) \
 	DMUB_SF(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET) \
 	DMUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE) \
@@ -200,4 +205,6 @@ union dmub_fw_boot_status dmub_dcn20_get_fw_boot_status(struct dmub_srv *dmub);
 
 bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub);
 
+bool dmub_dcn20_use_cached_trace_buffer(struct dmub_srv *dmub);
+
 #endif /* _DMUB_DCN20_H_ */
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
index b4bc0df2f14a..fb11c8d39208 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c
@@ -180,6 +180,13 @@ void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
 		  DMCUB_REGION3_CW5_TOP_ADDRESS, cw5->region.top,
 		  DMCUB_REGION3_CW5_ENABLE, 1);
 
+	REG_WRITE(DMCUB_REGION5_OFFSET, offset.u.low_part);
+	REG_WRITE(DMCUB_REGION5_OFFSET_HIGH, offset.u.high_part);
+	REG_SET_2(DMCUB_REGION5_TOP_ADDRESS, 0,
+		  DMCUB_REGION5_TOP_ADDRESS,
+		  cw5->region.top - cw5->region.base - 1,
+		  DMCUB_REGION5_ENABLE, 1);
+
 	offset = cw6->offset;
 
 	REG_WRITE(DMCUB_REGION3_CW6_OFFSET, offset.u.low_part);
-- 
2.25.1

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  parent reply	other threads:[~2021-02-19 22:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-19 22:15 [PATCH 00/13] DC Patches FEB 22, 2021 Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 01/13] drm/amd/display: Remove Assert from dcn10_get_dig_frontend Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 02/13] drm/amd/display: Refactor debugfs entries for all connectors Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 03/13] drm/amd/display: Add vupdate_no_lock interrupts for DCN2.1 Bindu Ramamurthy
2021-02-19 22:16   ` Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 04/13] drm/amd/display: disable seamless boot for DP MST Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 05/13] drm/amd/display: enable audio on DP seamless boot Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 06/13] drm/amd/display: Check for DSC support instead of ASIC revision Bindu Ramamurthy
2021-02-19 22:16 ` Bindu Ramamurthy [this message]
2021-02-19 22:16 ` [PATCH 08/13] drm/amd/display: Synchronize displays with different timings Bindu Ramamurthy
2021-02-21  6:21   ` Nils Wallménius
2021-02-22 13:43     ` R, Bindu
2021-02-22 18:04       ` R, Bindu
2021-02-19 22:16 ` [PATCH 09/13] drm/amd/display: Don't optimize bandwidth before disabling planes Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 10/13] drm/amd/display: reduce scope for local var Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 11/13] drm/amd/display: [FW Promotion] Release 0.0.53 Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 12/13] drm/amd/display: 3.2.124 Bindu Ramamurthy
2021-02-19 22:16 ` [PATCH 13/13] drm/amd/display: Fix system hang after multiple hotplugs Bindu Ramamurthy
2021-02-19 22:29 ` [PATCH 00/13] DC Patches FEB 22, 2021 Wheeler, Daniel

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