tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available config: arm64-randconfig-m031-20210221 (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot Reported-by: Dan Carpenter New smatch warnings: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64. Old smatch warnings: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64. vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np, af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate) af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 { a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk; a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk; 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc; 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret; a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24 af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0); af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26 af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base) 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np); af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /* 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */ 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL); 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) { 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc); 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc); 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 } 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39 a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /* a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */ a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk"); a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk)) a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk)) 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n", 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np); a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) && 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate)) 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0; 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53 a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer"); a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk)) 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk); 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk); 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret) 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret; a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61 a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk); 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate)) 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL; disable timer_clk if clk_get_rate() fails? a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0; af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 } --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org