From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F621C43332 for ; Wed, 24 Feb 2021 13:09:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5958264EDB for ; Wed, 24 Feb 2021 13:09:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235956AbhBXNIP (ORCPT ); Wed, 24 Feb 2021 08:08:15 -0500 Received: from mail.kernel.org ([198.145.29.99]:51042 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235271AbhBXMxA (ORCPT ); Wed, 24 Feb 2021 07:53:00 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 80DCF64F1E; Wed, 24 Feb 2021 12:51:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1614171069; bh=7a1T8LIhQNZZBlPgQaxnoKAUPUpVZzUMZjMsijYS4cw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F9h80CZz5VLPTzH7Vuf1uRi4KEhRtYctNYCzThm7fNoMpK6t4+AVlNMgtJMUCj4xU FBd7llJZYbCG/1GHGID4De9EOluk2T58R9l7S6klZDTQrHSa7+hKeRGBCFXcpTTW8B +rfAVYcYLF/0sByBao5bH+g+ERtYRUtI61DAJJdMp1xDLAjLzBzNLWEkmFQsu2KQj9 NGh8l2jRb6FVK/wVp5Z5ZZHZyB0NnCrM51jQ7kwoG9iPcmbZ+sYHZVR9cNhsnNJme/ 4n1q+aquFUsOVVpXLjd6uXvqKVyYdBaVhAYTsZQMpAwdeCB/3uFfLL5UKM1eWQ4IFd 9Ef//TsbtDU2Q== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Defang Bo , =?UTF-8?q?Christian=20K=C3=B6nig?= , Alex Deucher , Sasha Levin , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.11 31/67] drm/amdgpu: Add check to prevent IH overflow Date: Wed, 24 Feb 2021 07:49:49 -0500 Message-Id: <20210224125026.481804-31-sashal@kernel.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210224125026.481804-1-sashal@kernel.org> References: <20210224125026.481804-1-sashal@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Defang Bo [ Upstream commit e4180c4253f3f2da09047f5139959227f5cf1173 ] Similar to commit ("drm/amdgpu: fix IH overflow on Vega10 v2"). When an ring buffer overflow happens the appropriate bit is set in the WPTR register which is also written back to memory. But clearing the bit in the WPTR doesn't trigger another memory writeback. So what can happen is that we end up processing the buffer overflow over and over again because the bit is never cleared. Resulting in a random system lockup because of an infinite loop in an interrupt handler. Reviewed-by: Christian König Signed-off-by: Defang Bo Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/cz_ih.c | 37 ++++++++++++++++--------- drivers/gpu/drm/amd/amdgpu/iceland_ih.c | 36 +++++++++++++++--------- drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 37 ++++++++++++++++--------- 3 files changed, 71 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c index da37f8a900afb..307c01301c87a 100644 --- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c @@ -194,19 +194,30 @@ static u32 cz_ih_get_wptr(struct amdgpu_device *adev, wptr = le32_to_cpu(*ih->wptr_cpu); - if (REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) { - wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); - /* When a ring buffer overflow happen start parsing interrupt - * from the last not overwritten vector (wptr + 16). Hopefully - * this should allow us to catchup. - */ - dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", - wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); - ih->rptr = (wptr + 16) & ih->ptr_mask; - tmp = RREG32(mmIH_RB_CNTL); - tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); - WREG32(mmIH_RB_CNTL, tmp); - } + if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) + goto out; + + /* Double check that the overflow wasn't already cleared. */ + wptr = RREG32(mmIH_RB_WPTR); + + if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) + goto out; + + wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); + + /* When a ring buffer overflow happen start parsing interrupt + * from the last not overwritten vector (wptr + 16). Hopefully + * this should allow us to catchup. + */ + dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", + wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); + ih->rptr = (wptr + 16) & ih->ptr_mask; + tmp = RREG32(mmIH_RB_CNTL); + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); + WREG32(mmIH_RB_CNTL, tmp); + + +out: return (wptr & ih->ptr_mask); } diff --git a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c index 37d8b6ca4dab8..cc957471f31ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/iceland_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/iceland_ih.c @@ -194,19 +194,29 @@ static u32 iceland_ih_get_wptr(struct amdgpu_device *adev, wptr = le32_to_cpu(*ih->wptr_cpu); - if (REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) { - wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); - /* When a ring buffer overflow happen start parsing interrupt - * from the last not overwritten vector (wptr + 16). Hopefully - * this should allow us to catchup. - */ - dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", - wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); - ih->rptr = (wptr + 16) & ih->ptr_mask; - tmp = RREG32(mmIH_RB_CNTL); - tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); - WREG32(mmIH_RB_CNTL, tmp); - } + if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) + goto out; + + /* Double check that the overflow wasn't already cleared. */ + wptr = RREG32(mmIH_RB_WPTR); + + if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) + goto out; + + wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); + /* When a ring buffer overflow happen start parsing interrupt + * from the last not overwritten vector (wptr + 16). Hopefully + * this should allow us to catchup. + */ + dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", + wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); + ih->rptr = (wptr + 16) & ih->ptr_mask; + tmp = RREG32(mmIH_RB_CNTL); + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); + WREG32(mmIH_RB_CNTL, tmp); + + +out: return (wptr & ih->ptr_mask); } diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c index ce3319993b4bd..249fcbee7871c 100644 --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c @@ -196,19 +196,30 @@ static u32 tonga_ih_get_wptr(struct amdgpu_device *adev, wptr = le32_to_cpu(*ih->wptr_cpu); - if (REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) { - wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); - /* When a ring buffer overflow happen start parsing interrupt - * from the last not overwritten vector (wptr + 16). Hopefully - * this should allow us to catchup. - */ - dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", - wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); - ih->rptr = (wptr + 16) & ih->ptr_mask; - tmp = RREG32(mmIH_RB_CNTL); - tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); - WREG32(mmIH_RB_CNTL, tmp); - } + if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) + goto out; + + /* Double check that the overflow wasn't already cleared. */ + wptr = RREG32(mmIH_RB_WPTR); + + if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) + goto out; + + wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); + + /* When a ring buffer overflow happen start parsing interrupt + * from the last not overwritten vector (wptr + 16). Hopefully + * this should allow us to catchup. + */ + + dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", + wptr, ih->rptr, (wptr + 16) & ih->ptr_mask); + ih->rptr = (wptr + 16) & ih->ptr_mask; + tmp = RREG32(mmIH_RB_CNTL); + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); + WREG32(mmIH_RB_CNTL, tmp); + +out: return (wptr & ih->ptr_mask); } -- 2.27.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AC77C433E6 for ; Wed, 24 Feb 2021 12:51:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4725C64F16 for ; Wed, 24 Feb 2021 12:51:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4725C64F16 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AD0C36EA90; Wed, 24 Feb 2021 12:51:10 +0000 (UTC) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id B78EF6EA8F; Wed, 24 Feb 2021 12:51:09 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id 80DCF64F1E; Wed, 24 Feb 2021 12:51:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1614171069; bh=7a1T8LIhQNZZBlPgQaxnoKAUPUpVZzUMZjMsijYS4cw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F9h80CZz5VLPTzH7Vuf1uRi4KEhRtYctNYCzThm7fNoMpK6t4+AVlNMgtJMUCj4xU FBd7llJZYbCG/1GHGID4De9EOluk2T58R9l7S6klZDTQrHSa7+hKeRGBCFXcpTTW8B +rfAVYcYLF/0sByBao5bH+g+ERtYRUtI61DAJJdMp1xDLAjLzBzNLWEkmFQsu2KQj9 NGh8l2jRb6FVK/wVp5Z5ZZHZyB0NnCrM51jQ7kwoG9iPcmbZ+sYHZVR9cNhsnNJme/ 4n1q+aquFUsOVVpXLjd6uXvqKVyYdBaVhAYTsZQMpAwdeCB/3uFfLL5UKM1eWQ4IFd 9Ef//TsbtDU2Q== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH AUTOSEL 5.11 31/67] drm/amdgpu: Add check to prevent IH overflow Date: Wed, 24 Feb 2021 07:49:49 -0500 Message-Id: <20210224125026.481804-31-sashal@kernel.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210224125026.481804-1-sashal@kernel.org> References: <20210224125026.481804-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-BeenThere: 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id 8626A64F16 for ; Wed, 24 Feb 2021 12:51:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8626A64F16 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=amd-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D85AB6EA91; Wed, 24 Feb 2021 12:51:10 +0000 (UTC) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id B78EF6EA8F; Wed, 24 Feb 2021 12:51:09 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id 80DCF64F1E; Wed, 24 Feb 2021 12:51:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1614171069; bh=7a1T8LIhQNZZBlPgQaxnoKAUPUpVZzUMZjMsijYS4cw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F9h80CZz5VLPTzH7Vuf1uRi4KEhRtYctNYCzThm7fNoMpK6t4+AVlNMgtJMUCj4xU FBd7llJZYbCG/1GHGID4De9EOluk2T58R9l7S6klZDTQrHSa7+hKeRGBCFXcpTTW8B +rfAVYcYLF/0sByBao5bH+g+ERtYRUtI61DAJJdMp1xDLAjLzBzNLWEkmFQsu2KQj9 NGh8l2jRb6FVK/wVp5Z5ZZHZyB0NnCrM51jQ7kwoG9iPcmbZ+sYHZVR9cNhsnNJme/ 4n1q+aquFUsOVVpXLjd6uXvqKVyYdBaVhAYTsZQMpAwdeCB/3uFfLL5UKM1eWQ4IFd 9Ef//TsbtDU2Q== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH AUTOSEL 5.11 31/67] drm/amdgpu: Add check to prevent IH overflow Date: Wed, 24 Feb 2021 07:49:49 -0500 Message-Id: <20210224125026.481804-31-sashal@kernel.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210224125026.481804-1-sashal@kernel.org> References: <20210224125026.481804-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sasha Levin , dri-devel@lists.freedesktop.org, Defang Bo , amd-gfx@lists.freedesktop.org, Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" RnJvbTogRGVmYW5nIEJvIDxib2RlZmFuZ0AxMjYuY29tPgoKWyBVcHN0cmVhbSBjb21taXQgZTQx ODBjNDI1M2YzZjJkYTA5MDQ3ZjUxMzk5NTkyMjdmNWNmMTE3MyBdCgpTaW1pbGFyIHRvIGNvbW1p dCA8YjgyMTc1NzUwMTMxPigiZHJtL2FtZGdwdTogZml4IElIIG92ZXJmbG93IG9uIFZlZ2ExMCB2 MiIpLgpXaGVuIGFuIHJpbmcgYnVmZmVyIG92ZXJmbG93IGhhcHBlbnMgdGhlIGFwcHJvcHJpYXRl IGJpdCBpcyBzZXQgaW4gdGhlIFdQVFIKcmVnaXN0ZXIgd2hpY2ggaXMgYWxzbyB3cml0dGVuIGJh Y2sgdG8gbWVtb3J5LiBCdXQgY2xlYXJpbmcgdGhlIGJpdCBpbiB0aGUKV1BUUiBkb2Vzbid0IHRy aWdnZXIgYW5vdGhlciBtZW1vcnkgd3JpdGViYWNrLgoKU28gd2hhdCBjYW4gaGFwcGVuIGlzIHRo YXQgd2UgZW5kIHVwIHByb2Nlc3NpbmcgdGhlIGJ1ZmZlciBvdmVyZmxvdyBvdmVyIGFuZApvdmVy IGFnYWluIGJlY2F1c2UgdGhlIGJpdCBpcyBuZXZlciBjbGVhcmVkLiBSZXN1bHRpbmcgaW4gYSBy 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