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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org
Subject: [PATCH 23/27] accel/tcg: rename tb_lookup__cpu_state and hoist state extraction
Date: Tue,  2 Mar 2021 09:57:37 -0800	[thread overview]
Message-ID: <20210302175741.1079851-24-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210302175741.1079851-1-richard.henderson@linaro.org>

From: Alex Bennée <alex.bennee@linaro.org>

Having a function return either and valid TB and some system state
seems excessive. It will make the subsequent re-factoring easier if we
lookup the current state where we are.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210224165811.11567-2-alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/tb-lookup.h | 18 ++++++++----------
 accel/tcg/cpu-exec.c     | 10 ++++++++--
 accel/tcg/tcg-runtime.c  |  4 +++-
 3 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/include/exec/tb-lookup.h b/include/exec/tb-lookup.h
index 9cf475bb03..62a509535d 100644
--- a/include/exec/tb-lookup.h
+++ b/include/exec/tb-lookup.h
@@ -17,30 +17,28 @@
 #include "exec/tb-hash.h"
 
 /* Might cause an exception, so have a longjmp destination ready */
-static inline TranslationBlock *
-tb_lookup__cpu_state(CPUState *cpu, target_ulong *pc, target_ulong *cs_base,
-                     uint32_t *flags, uint32_t cf_mask)
+static inline TranslationBlock * tb_lookup(CPUState *cpu,
+                                           target_ulong pc, target_ulong cs_base,
+                                           uint32_t flags, uint32_t cf_mask)
 {
-    CPUArchState *env = (CPUArchState *)cpu->env_ptr;
     TranslationBlock *tb;
     uint32_t hash;
 
-    cpu_get_tb_cpu_state(env, pc, cs_base, flags);
-    hash = tb_jmp_cache_hash_func(*pc);
+    hash = tb_jmp_cache_hash_func(pc);
     tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]);
 
     cf_mask &= ~CF_CLUSTER_MASK;
     cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT;
 
     if (likely(tb &&
-               tb->pc == *pc &&
-               tb->cs_base == *cs_base &&
-               tb->flags == *flags &&
+               tb->pc == pc &&
+               tb->cs_base == cs_base &&
+               tb->flags == flags &&
                tb->trace_vcpu_dstate == *cpu->trace_dstate &&
                (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == cf_mask)) {
         return tb;
     }
-    tb = tb_htable_lookup(cpu, *pc, *cs_base, *flags, cf_mask);
+    tb = tb_htable_lookup(cpu, pc, cs_base, flags, cf_mask);
     if (tb == NULL) {
         return NULL;
     }
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 16e4fe3ccd..ef96b312a1 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -245,6 +245,7 @@ static void cpu_exec_exit(CPUState *cpu)
 
 void cpu_exec_step_atomic(CPUState *cpu)
 {
+    CPUArchState *env = (CPUArchState *)cpu->env_ptr;
     TranslationBlock *tb;
     target_ulong cs_base, pc;
     uint32_t flags;
@@ -258,7 +259,9 @@ void cpu_exec_step_atomic(CPUState *cpu)
         g_assert(!cpu->running);
         cpu->running = true;
 
-        tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
+        cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
+        tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask);
+
         if (tb == NULL) {
             mmap_lock();
             tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
@@ -418,11 +421,14 @@ static inline TranslationBlock *tb_find(CPUState *cpu,
                                         TranslationBlock *last_tb,
                                         int tb_exit, uint32_t cf_mask)
 {
+    CPUArchState *env = (CPUArchState *)cpu->env_ptr;
     TranslationBlock *tb;
     target_ulong cs_base, pc;
     uint32_t flags;
 
-    tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
+    cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
+
+    tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask);
     if (tb == NULL) {
         mmap_lock();
         tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c
index d736f4ff55..05e3d52c2f 100644
--- a/accel/tcg/tcg-runtime.c
+++ b/accel/tcg/tcg-runtime.c
@@ -152,7 +152,9 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
     target_ulong cs_base, pc;
     uint32_t flags;
 
-    tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, curr_cflags());
+    cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
+
+    tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags());
     if (tb == NULL) {
         return tcg_code_gen_epilogue;
     }
-- 
2.25.1



  parent reply	other threads:[~2021-03-02 18:29 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-02 17:57 [PATCH 00/27] tcg patch queue Richard Henderson
2021-03-02 17:57 ` [PATCH 01/27] tcg/aarch64: Fix constant subtraction in tcg_out_addsub2 Richard Henderson
2021-03-02 17:57 ` [PATCH 02/27] tcg/aarch64: Fix I3617_CMLE0 Richard Henderson
2021-03-05 14:17   ` Peter Maydell
2021-03-02 17:57 ` [PATCH 03/27] tcg/aarch64: Fix generation of "scalar" vector operations Richard Henderson
2021-03-05 14:35   ` Peter Maydell
2021-03-05 15:21     ` Richard Henderson
2021-03-02 17:57 ` [PATCH 04/27] tcg/tci: Use exec/cpu_ldst.h interfaces Richard Henderson
2021-03-05 17:32   ` Philippe Mathieu-Daudé
2021-03-05 17:45   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 05/27] tcg: Split out tcg_raise_tb_overflow Richard Henderson
2021-03-05 17:49   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 06/27] tcg: Manage splitwx in tc_ptr_to_region_tree by hand Richard Henderson
2021-03-05 17:50   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 07/27] tcg/tci: Merge identical cases in generation (arithmetic opcodes) Richard Henderson
2021-03-02 17:57 ` [PATCH 08/27] tcg/tci: Merge identical cases in generation (exchange opcodes) Richard Henderson
2021-03-02 17:57 ` [PATCH 09/27] tcg/tci: Merge identical cases in generation (deposit opcode) Richard Henderson
2021-03-02 17:57 ` [PATCH 10/27] tcg/tci: Merge identical cases in generation (conditional opcodes) Richard Henderson
2021-03-02 17:57 ` [PATCH 11/27] tcg/tci: Merge identical cases in generation (load/store opcodes) Richard Henderson
2021-03-02 17:57 ` [PATCH 12/27] tcg/tci: Remove tci_read_r8 Richard Henderson
2021-03-05 17:50   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 13/27] tcg/tci: Remove tci_read_r8s Richard Henderson
2021-03-05 17:50   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 14/27] tcg/tci: Remove tci_read_r16 Richard Henderson
2021-03-05 17:51   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 15/27] tcg/tci: Remove tci_read_r16s Richard Henderson
2021-03-05 17:51   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 16/27] tcg/tci: Remove tci_read_r32 Richard Henderson
2021-03-05 17:51   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 17/27] tcg/tci: Remove tci_read_r32s Richard Henderson
2021-03-05 17:51   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 18/27] tcg/tci: Reduce use of tci_read_r64 Richard Henderson
2021-03-05 17:53   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 19/27] tcg/tci: Merge basic arithmetic operations Richard Henderson
2021-03-05 17:54   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 20/27] tcg/tci: Merge extension operations Richard Henderson
2021-03-05 17:56   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 21/27] tcg/tci: Merge bswap operations Richard Henderson
2021-03-05 17:57   ` Alex Bennée
2021-03-02 17:57 ` [PATCH 22/27] tcg/tci: Merge mov, not and neg operations Richard Henderson
2021-03-05 17:58   ` Alex Bennée
2021-03-02 17:57 ` Richard Henderson [this message]
2021-03-02 17:57 ` [PATCH 24/27] accel/tcg: move CF_CLUSTER calculation to curr_cflags Richard Henderson
2021-03-02 17:57 ` [PATCH 25/27] accel/tcg: drop the use of CF_HASH_MASK and rename params Richard Henderson
2021-03-02 17:57 ` [PATCH 26/27] include/exec: lightly re-arrange TranslationBlock Richard Henderson
2021-03-02 17:57 ` [PATCH 27/27] accel/tcg: Precompute curr_cflags into cpu->tcg_cflags Richard Henderson
2021-03-05 17:12   ` Alex Bennée
2021-03-02 18:33 ` [PATCH 00/27] tcg patch queue no-reply

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