From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F03DC43381 for ; Sat, 6 Mar 2021 16:48:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CFC3E64FFD for ; Sat, 6 Mar 2021 16:48:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231171AbhCFQrp (ORCPT ); Sat, 6 Mar 2021 11:47:45 -0500 Received: from mail.kernel.org ([198.145.29.99]:53024 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230216AbhCFQrf (ORCPT ); Sat, 6 Mar 2021 11:47:35 -0500 Received: from archlinux (cpc108967-cmbg20-2-0-cust86.5-4.cable.virginm.net [81.101.6.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D0FAB64FE4; Sat, 6 Mar 2021 16:47:33 +0000 (UTC) Date: Sat, 6 Mar 2021 16:47:30 +0000 From: Jonathan Cameron To: William Breathitt Gray Cc: Fabrice Gasnier , david@lechnology.com, alexandre.torgue@foss.st.com, mcoquelin.stm32@gmail.com, olivier.moysan@foss.st.com, linux-iio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] counter: stm32-timer-cnt: fix ceiling write max value Message-ID: <20210306164730.61043167@archlinux> In-Reply-To: References: <1614696235-24088-1-git-send-email-fabrice.gasnier@foss.st.com> X-Mailer: Claws Mail 3.17.8 (GTK+ 2.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2 Mar 2021 23:56:46 +0900 William Breathitt Gray wrote: > On Tue, Mar 02, 2021 at 03:43:55PM +0100, Fabrice Gasnier wrote: > > The ceiling value isn't checked before writing it into registers. The user > > could write a value higher than the counter resolution (e.g. 16 or 32 bits > > indicated by max_arr). This makes most significant bits to be truncated. > > Fix it by checking the max_arr to report a range error [1] to the user. > > > > Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder") > > > > [1] https://lkml.org/lkml/2021/2/12/358 > > > > Signed-off-by: Fabrice Gasnier > > Acked-by: William Breathitt Gray Applied to the fixes-togreg branch of iio.git and marked for stable. thanks Jonathan > > Side question: if priv->ceiling is tracking the current ceiling > configuration, would it make sense to change stm32_count_ceiling_read() > to print the value of priv->ceiling instead of doing a regmap_read() > call? > > > --- > > drivers/counter/stm32-timer-cnt.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c > > index ef2a974..2cf0c05 100644 > > --- a/drivers/counter/stm32-timer-cnt.c > > +++ b/drivers/counter/stm32-timer-cnt.c > > @@ -32,6 +32,7 @@ struct stm32_timer_cnt { > > struct regmap *regmap; > > struct clk *clk; > > u32 ceiling; > > + u32 max_arr; > > bool enabled; > > struct stm32_timer_regs bak; > > }; > > @@ -185,6 +186,9 @@ static ssize_t stm32_count_ceiling_write(struct counter_device *counter, > > if (ret) > > return ret; > > > > + if (ceiling > priv->max_arr) > > + return -ERANGE; > > + > > /* TIMx_ARR register shouldn't be buffered (ARPE=0) */ > > regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); > > regmap_write(priv->regmap, TIM_ARR, ceiling); > > @@ -360,6 +364,7 @@ static int stm32_timer_cnt_probe(struct platform_device *pdev) > > priv->regmap = ddata->regmap; > > priv->clk = ddata->clk; > > priv->ceiling = ddata->max_arr; > > + priv->max_arr = ddata->max_arr; > > > > priv->counter.name = dev_name(dev); > > priv->counter.parent = dev; > > -- > > 2.7.4 > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEF68C433E0 for ; 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Sat, 6 Mar 2021 16:47:33 +0000 (UTC) Date: Sat, 6 Mar 2021 16:47:30 +0000 From: Jonathan Cameron To: William Breathitt Gray Cc: Fabrice Gasnier , david@lechnology.com, alexandre.torgue@foss.st.com, mcoquelin.stm32@gmail.com, olivier.moysan@foss.st.com, linux-iio@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] counter: stm32-timer-cnt: fix ceiling write max value Message-ID: <20210306164730.61043167@archlinux> In-Reply-To: References: <1614696235-24088-1-git-send-email-fabrice.gasnier@foss.st.com> X-Mailer: Claws Mail 3.17.8 (GTK+ 2.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210306_164739_284267_22560E82 X-CRM114-Status: GOOD ( 24.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 2 Mar 2021 23:56:46 +0900 William Breathitt Gray wrote: > On Tue, Mar 02, 2021 at 03:43:55PM +0100, Fabrice Gasnier wrote: > > The ceiling value isn't checked before writing it into registers. The user > > could write a value higher than the counter resolution (e.g. 16 or 32 bits > > indicated by max_arr). This makes most significant bits to be truncated. > > Fix it by checking the max_arr to report a range error [1] to the user. > > > > Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder") > > > > [1] https://lkml.org/lkml/2021/2/12/358 > > > > Signed-off-by: Fabrice Gasnier > > Acked-by: William Breathitt Gray Applied to the fixes-togreg branch of iio.git and marked for stable. thanks Jonathan > > Side question: if priv->ceiling is tracking the current ceiling > configuration, would it make sense to change stm32_count_ceiling_read() > to print the value of priv->ceiling instead of doing a regmap_read() > call? > > > --- > > drivers/counter/stm32-timer-cnt.c | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c > > index ef2a974..2cf0c05 100644 > > --- a/drivers/counter/stm32-timer-cnt.c > > +++ b/drivers/counter/stm32-timer-cnt.c > > @@ -32,6 +32,7 @@ struct stm32_timer_cnt { > > struct regmap *regmap; > > struct clk *clk; > > u32 ceiling; > > + u32 max_arr; > > bool enabled; > > struct stm32_timer_regs bak; > > }; > > @@ -185,6 +186,9 @@ static ssize_t stm32_count_ceiling_write(struct counter_device *counter, > > if (ret) > > return ret; > > > > + if (ceiling > priv->max_arr) > > + return -ERANGE; > > + > > /* TIMx_ARR register shouldn't be buffered (ARPE=0) */ > > regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); > > regmap_write(priv->regmap, TIM_ARR, ceiling); > > @@ -360,6 +364,7 @@ static int stm32_timer_cnt_probe(struct platform_device *pdev) > > priv->regmap = ddata->regmap; > > priv->clk = ddata->clk; > > priv->ceiling = ddata->max_arr; > > + priv->max_arr = ddata->max_arr; > > > > priv->counter.name = dev_name(dev); > > priv->counter.parent = dev; > > -- > > 2.7.4 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel