From: Kishon Vijay Abraham I <kishon@ti.com>
To: u-boot@lists.denx.de
Subject: [PATCH 10/16] arm: dts: k3-j7200-main: Add DT node for torrent serdes
Date: Tue, 9 Mar 2021 17:57:42 +0530 [thread overview]
Message-ID: <20210309122748.31842-11-kishon@ti.com> (raw)
In-Reply-To: <20210309122748.31842-1-kishon@ti.com>
From: Aswath Govindraju <a-govindraju@ti.com>
Add DT node for torrent serdes.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm/dts/k3-j7200-main.dtsi | 63 +++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index 1131464075..138702cf9d 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -5,6 +5,13 @@
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
*/
+/ {
+ serdes_refclk: serdes-refclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ };
+};
+
&cbass_main {
msmc_ram: sram at 70000000 {
compatible = "mmio-sram";
@@ -554,6 +561,62 @@
clock-names = "gpio";
};
+ serdes_wiz0: wiz at 5060000 {
+ compatible = "ti,j721e-wiz-10g";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 292 11>, <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-names = "fck", "core_ref_clk", "ext_ref_clk";
+ num-lanes = <4>;
+ #reset-cells = <1>;
+ ranges = <0x5060000 0x0 0x5060000 0x10000>;
+
+ assigned-clocks = <&k3_clks 292 85>;
+ assigned-clock-parents = <&k3_clks 292 89>;
+
+ wiz0_pll0_refclk: pll0-refclk {
+ clocks = <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-output-names = "wiz0_pll0_refclk";
+ #clock-cells = <0>;
+ assigned-clocks = <&wiz0_pll0_refclk>;
+ assigned-clock-parents = <&k3_clks 292 85>;
+ };
+
+ wiz0_pll1_refclk: pll1-refclk {
+ clocks = <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-output-names = "wiz0_pll1_refclk";
+ #clock-cells = <0>;
+ assigned-clocks = <&wiz0_pll1_refclk>;
+ assigned-clock-parents = <&k3_clks 292 85>;
+ };
+
+ wiz0_refclk_dig: refclk-dig {
+ clocks = <&k3_clks 292 85>, <&serdes_refclk>;
+ clock-output-names = "wiz0_refclk_dig";
+ #clock-cells = <0>;
+ assigned-clocks = <&wiz0_refclk_dig>;
+ assigned-clock-parents = <&k3_clks 292 85>;
+ };
+
+ wiz0_cmn_refclk_dig_div: cmn-refclk-dig-div {
+ clocks = <&wiz0_refclk_dig>;
+ #clock-cells = <0>;
+ };
+
+ serdes0: serdes at 5060000 {
+ compatible = "ti,j721e-serdes-10g";
+ reg = <0x05060000 0x00010000>;
+ reg-names = "torrent_phy";
+ resets = <&serdes_wiz0 0>;
+ reset-names = "torrent_reset";
+ clocks = <&wiz0_pll0_refclk>;
+ clock-names = "refclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
usbss0: cdns-usb at 4104000 {
compatible = "ti,j721e-usb";
reg = <0x00 0x4104000 0x00 0x100>;
--
2.17.1
next prev parent reply other threads:[~2021-03-09 12:27 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-09 12:27 [PATCH 00/16] TI/Cadence: Add Sierra/Torrent SERDES driver Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 01/16] dm: core: Add helper to compare node names Kishon Vijay Abraham I
2021-03-12 4:45 ` Simon Glass
2021-03-22 5:06 ` Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 02/16] drivers: reset: Handle gracefully NULL pointers Kishon Vijay Abraham I
2021-03-12 4:45 ` Simon Glass
2021-03-22 5:11 ` Kishon Vijay Abraham I
2021-03-23 0:56 ` Simon Glass
2021-03-23 7:16 ` Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 03/16] dt-bindings: phy: Add definitions for additional phy types Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 04/16] phy: cadence: Add driver for Sierra PHY Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 05/16] phy: cadence: Add driver for Torrent SERDES Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 06/16] phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 07/16] usb: cdns3: cdns3-ti: Fix clk_get_by_name() to get the correct name Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 08/16] board: ti: j721e: Add support for probing and configuring Torrent serdes on J7200 Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 09/16] ARM: dts: k3-j721e: Add the entries required for USB3 support on USB0 Kishon Vijay Abraham I
2021-03-09 12:27 ` Kishon Vijay Abraham I [this message]
2021-03-09 12:27 ` [PATCH 11/16] arm: dts: k3-j7200-common-proc-board: Enable SERDES DT Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 12/16] arm: dts: k3-j7200-common-proc-board-u-boot: Add u-boot tags for torrent serdes Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 13/16] configs: j721e_evm_a72: Enable the drivers required for the USB3 support Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 14/16] configs: j7200_evm_a72_defconfig: Add config for torrent serdes and common clock framework Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 15/16] env: ti: j721e-evm: Add env variable to power on & reset QSGMII PHY in J7200 EVM Kishon Vijay Abraham I
2021-03-09 12:27 ` [PATCH 16/16] configs: j7200_evm_a72: Enhance bootcmd to configure ethernet PHY Kishon Vijay Abraham I
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