From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5D4EC433E9 for ; Wed, 10 Mar 2021 09:26:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 98EC464FFC for ; Wed, 10 Mar 2021 09:26:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232327AbhCJJ0K (ORCPT ); Wed, 10 Mar 2021 04:26:10 -0500 Received: from verein.lst.de ([213.95.11.211]:35412 "EHLO verein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230397AbhCJJZk (ORCPT ); Wed, 10 Mar 2021 04:25:40 -0500 Received: by verein.lst.de (Postfix, from userid 2407) id 2657568B05; Wed, 10 Mar 2021 10:25:34 +0100 (CET) Date: Wed, 10 Mar 2021 10:25:33 +0100 From: Christoph Hellwig To: Robin Murphy Cc: Christoph Hellwig , Joerg Roedel , Will Deacon , Li Yang , freedreno@lists.freedesktop.org, kvm@vger.kernel.org, Michael Ellerman , linuxppc-dev@lists.ozlabs.org, dri-devel@lists.freedesktop.org, virtualization@lists.linux-foundation.org, iommu@lists.linux-foundation.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, David Woodhouse , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE Message-ID: <20210310092533.GA6819@lst.de> References: <20210301084257.945454-1-hch@lst.de> <20210301084257.945454-15-hch@lst.de> <1658805c-ed28-b650-7385-a56fab3383e3@arm.com> <20210310091501.GC5928@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210310091501.GC5928@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Wed, Mar 10, 2021 at 10:15:01AM +0100, Christoph Hellwig wrote: > On Thu, Mar 04, 2021 at 03:25:27PM +0000, Robin Murphy wrote: > > On 2021-03-01 08:42, Christoph Hellwig wrote: > >> Use explicit methods for setting and querying the information instead. > > > > Now that everyone's using iommu-dma, is there any point in bouncing this > > through the drivers at all? Seems like it would make more sense for the x86 > > drivers to reflect their private options back to iommu_dma_strict (and > > allow Intel's caching mode to override it as well), then have > > iommu_dma_init_domain just test !iommu_dma_strict && > > domain->ops->flush_iotlb_all. > > Hmm. I looked at this, and kill off ->dma_enable_flush_queue for > the ARM drivers and just looking at iommu_dma_strict seems like a > very clear win. > > OTOH x86 is a little more complicated. AMD and intel defaul to lazy > mode, so we'd have to change the global iommu_dma_strict if they are > initialized. Also Intel has not only a "static" option to disable > lazy mode, but also a "dynamic" one where it iterates structure. So > I think on the get side we're stuck with the method, but it still > simplifies the whole thing. Actually... Just mirroring the iommu_dma_strict value into struct iommu_domain should solve all of that with very little boilerplate code. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 010B5C433E6 for ; Wed, 10 Mar 2021 09:26:01 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3933264FC4 for ; Wed, 10 Mar 2021 09:26:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3933264FC4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4DwRX75rXpz3d4w for ; Wed, 10 Mar 2021 20:25:59 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lst.de (client-ip=213.95.11.211; helo=verein.lst.de; envelope-from=hch@lst.de; receiver=) Received: from verein.lst.de (verein.lst.de [213.95.11.211]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4DwRWn1zz2z30K4 for ; Wed, 10 Mar 2021 20:25:41 +1100 (AEDT) Received: by verein.lst.de (Postfix, from userid 2407) id 2657568B05; Wed, 10 Mar 2021 10:25:34 +0100 (CET) Date: Wed, 10 Mar 2021 10:25:33 +0100 From: Christoph Hellwig To: Robin Murphy Subject: Re: [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE Message-ID: <20210310092533.GA6819@lst.de> References: <20210301084257.945454-1-hch@lst.de> <20210301084257.945454-15-hch@lst.de> <1658805c-ed28-b650-7385-a56fab3383e3@arm.com> <20210310091501.GC5928@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210310091501.GC5928@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kvm@vger.kernel.org, Will Deacon , Joerg Roedel , linuxppc-dev@lists.ozlabs.org, dri-devel@lists.freedesktop.org, Li Yang , iommu@lists.linux-foundation.org, netdev@vger.kernel.org, David Woodhouse , linux-arm-kernel@lists.infradead.org, virtualization@lists.linux-foundation.org, freedreno@lists.freedesktop.org, Christoph Hellwig , linux-arm-msm@vger.kernel.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Mar 10, 2021 at 10:15:01AM +0100, Christoph Hellwig wrote: > On Thu, Mar 04, 2021 at 03:25:27PM +0000, Robin Murphy wrote: > > On 2021-03-01 08:42, Christoph Hellwig wrote: > >> Use explicit methods for setting and querying the information instead. > > > > Now that everyone's using iommu-dma, is there any point in bouncing this > > through the drivers at all? Seems like it would make more sense for the x86 > > drivers to reflect their private options back to iommu_dma_strict (and > > allow Intel's caching mode to override it as well), then have > > iommu_dma_init_domain just test !iommu_dma_strict && > > domain->ops->flush_iotlb_all. > > Hmm. I looked at this, and kill off ->dma_enable_flush_queue for > the ARM drivers and just looking at iommu_dma_strict seems like a > very clear win. > > OTOH x86 is a little more complicated. AMD and intel defaul to lazy > mode, so we'd have to change the global iommu_dma_strict if they are > initialized. Also Intel has not only a "static" option to disable > lazy mode, but also a "dynamic" one where it iterates structure. So > I think on the get side we're stuck with the method, but it still > simplifies the whole thing. Actually... Just mirroring the iommu_dma_strict value into struct iommu_domain should solve all of that with very little boilerplate code. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C18AC433E6 for ; Wed, 10 Mar 2021 09:25:44 +0000 (UTC) Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 97F1164FC4 for ; Wed, 10 Mar 2021 09:25:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 97F1164FC4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id 303486F521; Wed, 10 Mar 2021 09:25:43 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mchWsEDzrPMR; Wed, 10 Mar 2021 09:25:42 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [IPv6:2605:bc80:3010:104::8cd3:938]) by smtp3.osuosl.org (Postfix) with ESMTP id 21259605C1; Wed, 10 Mar 2021 09:25:42 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id A55EAC000B; Wed, 10 Mar 2021 09:25:41 +0000 (UTC) Received: from smtp2.osuosl.org (smtp2.osuosl.org [140.211.166.133]) by lists.linuxfoundation.org (Postfix) with ESMTP id E31BEC0001; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp2.osuosl.org (Postfix) with ESMTP id D0D45431A5; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp2.osuosl.org ([127.0.0.1]) by localhost (smtp2.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id V1bcMZgOaSoK; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.8.0 X-Greylist: from auto-whitelisted by SQLgrey-1.8.0 Received: from verein.lst.de (verein.lst.de [213.95.11.211]) by smtp2.osuosl.org (Postfix) with ESMTPS id 34A924314A; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) Received: by verein.lst.de (Postfix, from userid 2407) id 2657568B05; Wed, 10 Mar 2021 10:25:34 +0100 (CET) Date: Wed, 10 Mar 2021 10:25:33 +0100 From: Christoph Hellwig To: Robin Murphy Subject: Re: [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE Message-ID: <20210310092533.GA6819@lst.de> References: <20210301084257.945454-1-hch@lst.de> <20210301084257.945454-15-hch@lst.de> <1658805c-ed28-b650-7385-a56fab3383e3@arm.com> <20210310091501.GC5928@lst.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210310091501.GC5928@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) Cc: kvm@vger.kernel.org, Will Deacon , linuxppc-dev@lists.ozlabs.org, dri-devel@lists.freedesktop.org, Li Yang , iommu@lists.linux-foundation.org, netdev@vger.kernel.org, David Woodhouse , linux-arm-kernel@lists.infradead.org, Michael Ellerman , virtualization@lists.linux-foundation.org, freedreno@lists.freedesktop.org, Christoph Hellwig , linux-arm-msm@vger.kernel.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Wed, Mar 10, 2021 at 10:15:01AM +0100, Christoph Hellwig wrote: > On Thu, Mar 04, 2021 at 03:25:27PM +0000, Robin Murphy wrote: > > On 2021-03-01 08:42, Christoph Hellwig wrote: > >> Use explicit methods for setting and querying the information instead. > > > > Now that everyone's using iommu-dma, is there any point in bouncing this > > through the drivers at all? Seems like it would make more sense for the x86 > > drivers to reflect their private options back to iommu_dma_strict (and > > allow Intel's caching mode to override it as well), then have > > iommu_dma_init_domain just test !iommu_dma_strict && > > domain->ops->flush_iotlb_all. > > Hmm. I looked at this, and kill off ->dma_enable_flush_queue for > the ARM drivers and just looking at iommu_dma_strict seems like a > very clear win. > > OTOH x86 is a little more complicated. AMD and intel defaul to lazy > mode, so we'd have to change the global iommu_dma_strict if they are > initialized. Also Intel has not only a "static" option to disable > lazy mode, but also a "dynamic" one where it iterates structure. So > I think on the get side we're stuck with the method, but it still > simplifies the whole thing. Actually... Just mirroring the iommu_dma_strict value into struct iommu_domain should solve all of that with very little boilerplate code. _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7235FC433DB for ; Wed, 10 Mar 2021 09:25:45 +0000 (UTC) Received: from smtp4.osuosl.org (smtp4.osuosl.org [140.211.166.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DB0F964FC4 for ; Wed, 10 Mar 2021 09:25:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DB0F964FC4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=virtualization-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by smtp4.osuosl.org (Postfix) with ESMTP id 480AC4EC4A; Wed, 10 Mar 2021 09:25:44 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vPgMwwEzSv3B; Wed, 10 Mar 2021 09:25:43 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [IPv6:2605:bc80:3010:104::8cd3:938]) by smtp4.osuosl.org (Postfix) with ESMTP id 949E24EC4F; Wed, 10 Mar 2021 09:25:42 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id E63B1C0015; Wed, 10 Mar 2021 09:25:41 +0000 (UTC) Received: from smtp2.osuosl.org (smtp2.osuosl.org [140.211.166.133]) by lists.linuxfoundation.org (Postfix) with ESMTP id E31BEC0001; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp2.osuosl.org (Postfix) with ESMTP id D0D45431A5; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp2.osuosl.org ([127.0.0.1]) by localhost (smtp2.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id V1bcMZgOaSoK; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.8.0 X-Greylist: from auto-whitelisted by SQLgrey-1.8.0 Received: from verein.lst.de (verein.lst.de [213.95.11.211]) by smtp2.osuosl.org (Postfix) with ESMTPS id 34A924314A; Wed, 10 Mar 2021 09:25:40 +0000 (UTC) Received: by verein.lst.de (Postfix, from userid 2407) id 2657568B05; Wed, 10 Mar 2021 10:25:34 +0100 (CET) Date: Wed, 10 Mar 2021 10:25:33 +0100 From: Christoph Hellwig To: Robin Murphy Subject: Re: [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE Message-ID: <20210310092533.GA6819@lst.de> References: <20210301084257.945454-1-hch@lst.de> <20210301084257.945454-15-hch@lst.de> <1658805c-ed28-b650-7385-a56fab3383e3@arm.com> <20210310091501.GC5928@lst.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210310091501.GC5928@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) Cc: kvm@vger.kernel.org, Will Deacon , Joerg Roedel , linuxppc-dev@lists.ozlabs.org, dri-devel@lists.freedesktop.org, Li Yang , iommu@lists.linux-foundation.org, netdev@vger.kernel.org, David Woodhouse , linux-arm-kernel@lists.infradead.org, Michael Ellerman , virtualization@lists.linux-foundation.org, freedreno@lists.freedesktop.org, Christoph Hellwig , linux-arm-msm@vger.kernel.org X-BeenThere: virtualization@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux virtualization List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: virtualization-bounces@lists.linux-foundation.org Sender: "Virtualization" On Wed, Mar 10, 2021 at 10:15:01AM +0100, Christoph Hellwig wrote: > On Thu, Mar 04, 2021 at 03:25:27PM +0000, Robin Murphy wrote: > > On 2021-03-01 08:42, Christoph Hellwig wrote: > >> Use explicit methods for setting and querying the information instead. > > > > Now that everyone's using iommu-dma, is there any point in bouncing this > > through the drivers at all? Seems like it would make more sense for the x86 > > drivers to reflect their private options back to iommu_dma_strict (and > > allow Intel's caching mode to override it as well), then have > > iommu_dma_init_domain just test !iommu_dma_strict && > > domain->ops->flush_iotlb_all. > > Hmm. I looked at this, and kill off ->dma_enable_flush_queue for > the ARM drivers and just looking at iommu_dma_strict seems like a > very clear win. > > OTOH x86 is a little more complicated. AMD and intel defaul to lazy > mode, so we'd have to change the global iommu_dma_strict if they are > initialized. Also Intel has not only a "static" option to disable > lazy mode, but also a "dynamic" one where it iterates structure. So > I think on the get side we're stuck with the method, but it still > simplifies the whole thing. Actually... Just mirroring the iommu_dma_strict value into struct iommu_domain should solve all of that with very little boilerplate code. _______________________________________________ Virtualization mailing list Virtualization@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/virtualization From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C32DC433DB for ; Wed, 10 Mar 2021 09:27:14 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C6C4964FE2 for ; Wed, 10 Mar 2021 09:27:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C6C4964FE2 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ZFfEE6fZ0xsuYdunFDhOAw5qpBV7XONoKKCcbw4UzoI=; b=dnduEslqaJR40dW3xcMhL2Rqf y7yo7Dx81Wv19uJ1eIswNCeUr9mx0+TKbx+RRMk5fi6tXHF9cVr07FKue1q8CgCh5MbYfulkzPbYg 6WiukbO8QqLy1Te7moE+3bp+UftlEfj/e3y2TYivZngDEdZLgEBG65+Vo6+FmRsDGwY2cQY8Z3WS2 yceKPQ/h1KjCOSMKPPEbayWk6g+9r6LNfOlucKPrr4nljch/7bx4s8WmLEjfTJqWgInddn9g4N0ES 4bsY8pTAkL/7Dh6FR9itG6CnexNvF7nhtv7hnN4eGMkJzaJnFnEZmfW6g+N3+tjCx0yOkUWgYUMdf EF4iTb+cA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lJv68-006SZk-LJ; Wed, 10 Mar 2021 09:25:44 +0000 Received: from verein.lst.de ([213.95.11.211]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lJv62-006SYn-4y for linux-arm-kernel@lists.infradead.org; Wed, 10 Mar 2021 09:25:41 +0000 Received: by verein.lst.de (Postfix, from userid 2407) id 2657568B05; Wed, 10 Mar 2021 10:25:34 +0100 (CET) Date: Wed, 10 Mar 2021 10:25:33 +0100 From: Christoph Hellwig To: Robin Murphy Cc: Christoph Hellwig , Joerg Roedel , Will Deacon , Li Yang , freedreno@lists.freedesktop.org, kvm@vger.kernel.org, Michael Ellerman , linuxppc-dev@lists.ozlabs.org, dri-devel@lists.freedesktop.org, virtualization@lists.linux-foundation.org, iommu@lists.linux-foundation.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, David Woodhouse , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE Message-ID: <20210310092533.GA6819@lst.de> References: <20210301084257.945454-1-hch@lst.de> <20210301084257.945454-15-hch@lst.de> <1658805c-ed28-b650-7385-a56fab3383e3@arm.com> <20210310091501.GC5928@lst.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210310091501.GC5928@lst.de> User-Agent: Mutt/1.5.17 (2007-11-01) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210310_092538_330917_1D52B68B X-CRM114-Status: GOOD ( 22.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Mar 10, 2021 at 10:15:01AM +0100, Christoph Hellwig wrote: > On Thu, Mar 04, 2021 at 03:25:27PM +0000, Robin Murphy wrote: > > On 2021-03-01 08:42, Christoph Hellwig wrote: > >> Use explicit methods for setting and querying the information instead. > > > > Now that everyone's using iommu-dma, is there any point in bouncing this > > through the drivers at all? Seems like it would make more sense for the x86 > > drivers to reflect their private options back to iommu_dma_strict (and > > allow Intel's caching mode to override it as well), then have > > iommu_dma_init_domain just test !iommu_dma_strict && > > domain->ops->flush_iotlb_all. > > Hmm. I looked at this, and kill off ->dma_enable_flush_queue for > the ARM drivers and just looking at iommu_dma_strict seems like a > very clear win. > > OTOH x86 is a little more complicated. AMD and intel defaul to lazy > mode, so we'd have to change the global iommu_dma_strict if they are > initialized. Also Intel has not only a "static" option to disable > lazy mode, but also a "dynamic" one where it iterates structure. So > I think on the get side we're stuck with the method, but it still > simplifies the whole thing. Actually... Just mirroring the iommu_dma_strict value into struct iommu_domain should solve all of that with very little boilerplate code. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel