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Wysocki" , "Ravi V. Shankar" , Srinivas Pandruvada Subject: Re: [PATCH V2 1/25] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit Message-ID: <20210310165358.GI23521@zn.tnic> References: <1615394281-68214-1-git-send-email-kan.liang@linux.intel.com> <1615394281-68214-2-git-send-email-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1615394281-68214-2-git-send-email-kan.liang@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 10, 2021 at 08:37:37AM -0800, kan.liang@linux.intel.com wrote: > From: Ricardo Neri > > Add feature enumeration to identify a processor with Intel Hybrid > Technology: one in which CPUs of more than one type are the same package. > On a hybrid processor, all CPUs support the same homogeneous (i.e., > symmetric) instruction set. All CPUs enumerate the same features in CPUID. > Thus, software (user space and kernel) can run and migrate to any CPU in > the system as well as utilize any of the enumerated features without any > change or special provisions. The main difference among CPUs in a hybrid > processor are power and performance properties. > > Cc: Andi Kleen > Cc: Kan Liang > Cc: "Peter Zijlstra (Intel)" > Cc: "Rafael J. Wysocki" > Cc: "Ravi V. Shankar" > Cc: Srinivas Pandruvada > Cc: linux-kernel@vger.kernel.org > Reviewed-by: Len Brown > Reviewed-by: Tony Luck > Signed-off-by: Ricardo Neri > --- > Changes since v1 (as part of patchset for perf change for Alderlake) > * None > > Changes since v1 (in a separate posting): > * Reworded commit message to clearly state what is Intel Hybrid > Technology. Stress that all CPUs can run the same instruction > set and support the same features. > --- > arch/x86/include/asm/cpufeatures.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index cc96e26d69f7..e7cfc9eedf8d 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -374,6 +374,7 @@ > #define X86_FEATURE_MD_CLEAR (18*32+10) /* VERW clears CPU buffers */ > #define X86_FEATURE_TSX_FORCE_ABORT (18*32+13) /* "" TSX_FORCE_ABORT */ > #define X86_FEATURE_SERIALIZE (18*32+14) /* SERIALIZE instruction */ > +#define X86_FEATURE_HYBRID_CPU (18*32+15) /* This part has CPUs of more than one type */ /* "" This ... unless you have a valid use case for "hybrid_cpu" being present there. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette