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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Kevin Wolf" <kwolf@redhat.com>,
	qemu-block@nongnu.org, "Max Reitz" <mreitz@redhat.com>,
	"David Edmondson" <david.edmondson@oracle.com>,
	"Bin Meng" <bmeng.cn@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PULL 10/11] hw/block/pflash_cfi01: Correct the type of PFlashCFI01.ro
Date: Tue, 16 Mar 2021 00:35:26 +0100	[thread overview]
Message-ID: <20210315233527.2988483-11-philmd@redhat.com> (raw)
In-Reply-To: <20210315233527.2988483-1-philmd@redhat.com>

From: David Edmondson <david.edmondson@oracle.com>

PFlashCFI01.ro is a bool, declare it as such.

Signed-off-by: David Edmondson <david.edmondson@oracle.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210216142721.1985543-3-david.edmondson@oracle.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 hw/block/pflash_cfi01.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index c8cecb3ac8b..07910356756 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -82,7 +82,7 @@ struct PFlashCFI01 {
     uint8_t max_device_width;  /* max device width in bytes */
     uint32_t features;
     uint8_t wcycle; /* if 0, the flash is read normally */
-    int ro;
+    bool ro;
     uint8_t cmd;
     uint8_t status;
     uint16_t ident0;
@@ -853,7 +853,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
             return;
         }
     } else {
-        pfl->ro = 0;
+        pfl->ro = false;
     }
 
     if (pfl->blk) {
-- 
2.26.2



  parent reply	other threads:[~2021-03-15 23:43 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-15 23:35 [PULL 00/11] pflash patches for 2021-03-16 Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 01/11] hw/block/pflash_cfi: Fix code style for checkpatch.pl Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 02/11] hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table() Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 03/11] hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table() Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 04/11] hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings() Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 05/11] hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=false) Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 06/11] hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 07/11] hw/block/pflash_cfi02: Factor out pflash_reset_state_machine() Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 08/11] hw/block/pflash_cfi02: Add DeviceReset method Philippe Mathieu-Daudé
2021-03-15 23:35 ` [PULL 09/11] hw/block/pflash_cfi01: Clarify trace events Philippe Mathieu-Daudé
2021-03-15 23:35 ` Philippe Mathieu-Daudé [this message]
2021-03-15 23:35 ` [PULL 11/11] hw/block/pflash_cfi: Replace DPRINTF with " Philippe Mathieu-Daudé
2021-03-17 13:37 ` [PULL 00/11] pflash patches for 2021-03-16 Peter Maydell
2021-03-17 14:22   ` Philippe Mathieu-Daudé

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