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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 03/23] drm/i915/display: Eliminate most usage of INTEL_GEN()
Date: Wed, 17 Mar 2021 11:37:53 -0700	[thread overview]
Message-ID: <20210317183753.wr6t33u5kh3d3rd4@ldmartin-desk2> (raw)
In-Reply-To: <87czvxoe7n.fsf@intel.com>

On Wed, Mar 17, 2021 at 07:57:32PM +0200, Jani Nikula wrote:
>On Mon, 15 Mar 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
>> On Thu, Mar 11, 2021 at 07:33:55AM -0800, Matt Roper wrote:
>>>Use Coccinelle to convert most of the usage of INTEL_GEN() and IS_GEN()
>>>in the display code to use DISPLAY_VER() comparisons instead.  The
>>>following semantic patch was used:
>>>
>>>        @@ expression dev_priv; @@
>>>        - INTEL_GEN(dev_priv)
>>>        + DISPLAY_VER(dev_priv)
>>>
>>>        @@ expression dev_priv; expression E; @@
>>>        - !IS_GEN(dev_priv, E)
>>>        + DISPLAY_VER(dev_priv) != E
>>>
>>>        @@ expression dev_priv; expression E; @@
>>>        - IS_GEN(dev_priv, E)
>>>        + DISPLAY_VER(dev_priv) == E
>>>
>>>        @@
>>>        expression dev_priv;
>>>        expression from, until;
>>>        @@
>>>        - !IS_GEN_RANGE(dev_priv, from, until)
>>>        + DISPLAY_VER(dev_priv) < from || DISPLAY_VER(dev_priv) > until
>>>
>>>        @@
>>>        expression dev_priv;
>>>        expression from, until;
>>>        statement S;
>>>        @@
>>>        - if (IS_GEN_RANGE(dev_priv, from, until)) S
>>>        + if (DISPLAY_VER(dev_priv) >= from && DISPLAY_VER(dev_priv) <= until) S
>>>
>>>        @@
>>>        expression dev_priv;
>>>        expression from, until;
>>>        @@
>>>        - IS_GEN_RANGE(dev_priv, from, until)
>>>        + (DISPLAY_VER(dev_priv) >= from && DISPLAY_VER(dev_priv) <= until)
>>>
>>>There are still some display-related uses of INTEL_GEN() in intel_pm.c
>>>(watermark code) and i915_irq.c.  Those will be updated separately.
>>>
>>>Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>>
>> The reason why we had macros like IS_GEN() and IS_GEN_RANGE() is because
>> this allows the compiler to short-circuit it into a single
>> bitwise AND + comparison check.
>
>Well, just looking at the code, I think IS_GEN() and IS_GEN_RANGE() also
>look cleaner, at least once you've grown used to them.
>
>Stuff like this gets slower to read IMO:
>
>>>-	if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
>>>+	if (DISPLAY_VER(dev_priv) < 3 || DISPLAY_VER(dev_priv) > 7) {
>
>In the past we had all combinations of <, <=, >, >= with && and ||, and,
>while it's pretty regular stuff, I think it benefited from the
>unification readability wise.
>
>Sure we can add IS_DISPLAY_VER() and _RANGE() later on, but with a bunch
>of churn that I find unlikely to happen again soon.
>
>So I guess I need more convincing this is indeed the path we want to
>take.

I don't disagree. I think the case you cited is the worst case, where we
have to invert the check. But looking at the code there are just 4 cases
in which this is used:

$ git grep \!IS_GEN_RANGE
drivers/gpu/drm/i915/display/intel_bios.c:      if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
drivers/gpu/drm/i915/gt/gen8_ppgtt.c:   ppgtt->vm.has_read_only = !IS_GEN_RANGE(gt->i915, 11, 12);
drivers/gpu/drm/i915/gt/intel_ring_submission.c:        if (!IS_GEN_RANGE(engine->i915, 6, 7))
drivers/gpu/drm/i915/i915_cmd_parser.c:                         GEM_BUG_ON(!IS_GEN_RANGE(engine->i915, 6, 7));

Checking also the positive checks:

	$ git grep IS_GEN_RANGE | wc -l 
	37

So, not that many.  But to avoid this kind of issue I think we could add a
`DISPLAY_VER_RANGE(i915, from, until)` already and get rid of this problem.

Lucas De Marchi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-03-17 18:37 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-11 15:33 [Intel-gfx] [PATCH v2 00/23] Separate display version numbering and add XE_LPD (version 13) Matt Roper
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 01/23] drm/i915/display: Convert gen5/gen6 tests to IS_IRONLAKE/IS_SANDYBRIDGE Matt Roper
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 02/23] drm/i915: Add DISPLAY_VER() Matt Roper
2021-03-17 17:45   ` Jani Nikula
2021-03-19 20:49     ` Matt Roper
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 03/23] drm/i915/display: Eliminate most usage of INTEL_GEN() Matt Roper
2021-03-15 20:14   ` Lucas De Marchi
2021-03-17 17:57     ` Jani Nikula
2021-03-17 18:37       ` Lucas De Marchi [this message]
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 04/23] drm/i915: Convert INTEL_GEN() to DISPLAY_VER() as appropriate in intel_pm.c Matt Roper
2021-03-15 20:17   ` Lucas De Marchi
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 05/23] drm/i915: Convert INTEL_GEN() to DISPLAY_VER() as appropriate in i915_irq.c Matt Roper
2021-03-15 20:19   ` Lucas De Marchi
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 06/23] drm/i915/display: Simplify GLK display version tests Matt Roper
2021-03-15 20:21   ` Lucas De Marchi
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 07/23] drm/i915/xelpd: add XE_LPD display characteristics Matt Roper
2021-03-17 17:15   ` Jani Nikula
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 08/23] drm/i915/xelpd: Handle proper AUX interrupt bits Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 09/23] drm/i915/xelpd: Enhanced pipe underrun reporting Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 10/23] drm/i915/xelpd: Define plane capabilities Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 11/23] drm/i915/xelpd: Support 128k plane stride Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 12/23] drm/i915/xelpd: Handle new location of outputs D and E Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 13/23] drm/i915/xelpd: Add XE_LPD power wells Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 14/23] drm/i915/xelpd: Handle LPSP for XE_LPD Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 15/23] drm/i915/xelpd: Increase maximum watermark lines to 255 Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 16/23] drm/i915/xelpd: Required bandwidth increases when VT-d is active Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 17/23] drm/i915/xelpd: Add Wa_14011503030 Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 18/23] drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 19/23] drm/i915/xelpd: Support DP1.4 compression BPPs Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 20/23] drm/i915: Get slice height before computing rc params Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 21/23] drm/i915/xelpd: Calculate VDSC RC parameters Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 22/23] drm/i915/xelpd: Add rc_qp_table for rcparams calculation Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 23/23] drm/i915/xelpd: Add VRR guardband for VRR CTL Matt Roper
2021-03-11 16:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Separate display version numbering and add XE_LPD (version 13) Patchwork
2021-03-11 16:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-03-11 16:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-11 18:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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