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From: "Navare, Manasi" <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/6] drm/i915: Fix enabled_planes bitmask
Date: Fri, 19 Mar 2021 14:17:18 -0700	[thread overview]
Message-ID: <20210319211710.GB6359@labuser-Z97X-UD5H> (raw)
In-Reply-To: <20210305153610.12177-2-ville.syrjala@linux.intel.com>

On Fri, Mar 05, 2021 at 05:36:05PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The enabled_planes bitmask was supposed to track logically enabled
> planes (ie. fb!=NULL and crtc!=NULL), but instead we end up putting
> even disabled planes into the bitmask since
> intel_plane_atomic_check_with_state() only takes the early exit
> if the plane was disabled and stays disabled. I think I misread
> the early said codepath to exit whenever the plane is logically
> disabled, which is not true.
> 
> So let's fix this up properly and set the bit only when the plane
> actually is logically enabled.

Hmm yes makes sense, I guess I added the check in skl_plane_check_fb to return if !fb
but I think thats a bug there since I return 0 there instead of return a -EINVAL or something.

Because if we return a negative value there then if !fb, skl_plane_check will return that
and we will return from plane->check_plane so just moving the enabled planes bitmask assignment
to after the check_plane will do no need to check for if (fb) there again right?

Manasi

> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Fixes: ee42ec19ca2e ("drm/i915: Track logically enabled planes for hw state")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_atomic_plane.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 4683f98f7e54..c3f2962aa1eb 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -317,12 +317,13 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
>  	if (!new_plane_state->hw.crtc && !old_plane_state->hw.crtc)
>  		return 0;
>  
> -	new_crtc_state->enabled_planes |= BIT(plane->id);
> -
>  	ret = plane->check_plane(new_crtc_state, new_plane_state);
>  	if (ret)
>  		return ret;
>  
> +	if (fb)
> +		new_crtc_state->enabled_planes |= BIT(plane->id);
> +
>  	/* FIXME pre-g4x don't work like this */
>  	if (new_plane_state->uapi.visible)
>  		new_crtc_state->active_planes |= BIT(plane->id);
> -- 
> 2.26.2
> 
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  reply	other threads:[~2021-03-19 21:11 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-05 15:36 [Intel-gfx] [PATCH 0/6] drm/i915: More SAGV related fixes/cleanups Ville Syrjala
2021-03-05 15:36 ` [Intel-gfx] [PATCH 1/6] drm/i915: Fix enabled_planes bitmask Ville Syrjala
2021-03-19 21:17   ` Navare, Manasi [this message]
2021-03-19 21:20     ` Ville Syrjälä
2021-03-19 21:30       ` Navare, Manasi
2021-03-05 15:36 ` [Intel-gfx] [PATCH 2/6] drm/i915: Tighten SAGV constraint for pre-tgl Ville Syrjala
2021-03-11 14:36   ` Lisovskiy, Stanislav
2021-03-11 15:28     ` Ville Syrjälä
2021-03-12 12:12       ` Lisovskiy, Stanislav
2021-03-05 15:36 ` [Intel-gfx] [PATCH 3/6] drm/i915: Check SAGV wm min_ddb_alloc rather than plane_res_b Ville Syrjala
2021-03-12 12:13   ` Lisovskiy, Stanislav
2021-03-05 15:36 ` [Intel-gfx] [PATCH 4/6] drm/i915: Calculate min_ddb_alloc for trans_wm Ville Syrjala
2021-03-12 12:14   ` Lisovskiy, Stanislav
2021-03-05 15:36 ` [Intel-gfx] [PATCH 5/6] drm/i915: Extract skl_check_wm_level() and skl_check_nv12_wm_level() Ville Syrjala
2021-03-12 12:25   ` Lisovskiy, Stanislav
2021-03-05 15:36 ` [Intel-gfx] [PATCH 6/6] drm/i915: s/plane_res_b/blocks/ etc Ville Syrjala
2021-03-11 14:26   ` Lisovskiy, Stanislav
2021-03-12 12:45   ` Lisovskiy, Stanislav
2021-03-05 16:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: More SAGV related fixes/cleanups Patchwork
2021-03-05 16:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-05 20:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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