From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69DA0C433C1 for ; Mon, 22 Mar 2021 16:25:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3ED1761974 for ; Mon, 22 Mar 2021 16:25:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231129AbhCVQYj (ORCPT ); Mon, 22 Mar 2021 12:24:39 -0400 Received: from foss.arm.com ([217.140.110.172]:34712 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231645AbhCVQYR (ORCPT ); Mon, 22 Mar 2021 12:24:17 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A873D1042; Mon, 22 Mar 2021 09:24:16 -0700 (PDT) Received: from slackpad.fritz.box (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 52A053F719; Mon, 22 Mar 2021 09:24:15 -0700 (PDT) Date: Mon, 22 Mar 2021 16:24:11 +0000 From: Andre Przywara To: Ivan Uvarov Cc: devicetree@vger.kernel.org, Chen-Yu Tsai , Jernej Skrabec , Maxime Ripard , Rob Herring , linux-arm-kernel@lists.infradead.org, Icenowy Zheng Subject: Re: [PATCH v2 2/4] ARM: dts: sun8i: r40: add pinmux settings for MMC3 and UARTs 2,4,5&7 Message-ID: <20210322162411.1569bc4c@slackpad.fritz.box> In-Reply-To: <20210322105538.3475183-3-i.uvarov@cognitivepilot.com> References: <20210322105538.3475183-1-i.uvarov@cognitivepilot.com> <20210322105538.3475183-3-i.uvarov@cognitivepilot.com> Organization: Arm Ltd. X-Mailer: Claws Mail 3.17.1 (GTK+ 2.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, 22 Mar 2021 13:55:36 +0300 Ivan Uvarov wrote: Hi, > The Forlinx OKA40i-C devboard makes use of UARTs 0,2,3,4,5 and 7 of the R40 > SoC, of which UART 0 is connected to an RS232 converter, UART 5 routed to > an RS485 converter, and the rest broken out directly via labeled headers. > The board also contains a micro-SD slot connected to SDC3. > > This patch adds settings to R40's pinmux node for those UARTs that were not > already mapped, which would allow us to make use of all available UARTs and > the micro-SD slot on this board in a further patch. > > Signed-off-by: Ivan Uvarov Looks alright, compared against the R40 manual. Reviewed-by: Andre Przywara Cheers, Andre > > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi > index 0b257a0779..51031a0e59 100644 > --- a/arch/arm/boot/dts/sun8i-r40.dtsi > +++ b/arch/arm/boot/dts/sun8i-r40.dtsi > @@ -357,6 +357,8 @@ mmc3: mmc@1c12000 { > clock-names = "ahb", "mmc"; > resets = <&ccu RST_BUS_MMC3>; > reset-names = "ahb"; > + pinctrl-0 = <&mmc3_pins>; > + pinctrl-names = "default"; > interrupts = ; > status = "disabled"; > #address-cells = <1>; > @@ -601,6 +603,14 @@ mmc2_pins: mmc2-pins { > bias-pull-up; > }; > > + mmc3_pins: mmc3-pins { > + pins = "PI4", "PI5", "PI6", > + "PI7", "PI8", "PI9"; > + function = "mmc3"; > + drive-strength = <30>; > + bias-pull-up; > + }; > + > /omit-if-no-ref/ > spi0_pc_pins: spi0-pc-pins { > pins = "PC0", "PC1", "PC2"; > @@ -637,6 +647,18 @@ uart0_pb_pins: uart0-pb-pins { > function = "uart0"; > }; > > + /omit-if-no-ref/ > + uart2_pi_pins: uart2-pi-pins { > + pins = "PI18", "PI19"; > + function = "uart2"; > + }; > + > + /omit-if-no-ref/ > + uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ > + pins = "PI16", "PI17"; > + function = "uart2"; > + }; > + > /omit-if-no-ref/ > uart3_pg_pins: uart3-pg-pins { > pins = "PG6", "PG7"; > @@ -648,6 +670,24 @@ uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins { > pins = "PG8", "PG9"; > function = "uart3"; > }; > + > + /omit-if-no-ref/ > + uart4_pg_pins: uart4-pg-pins { > + pins = "PG10", "PG11"; > + function = "uart4"; > + }; > + > + /omit-if-no-ref/ > + uart5_ph_pins: uart5-ph-pins { > + pins = "PH6", "PH7"; > + function = "uart5"; > + }; > + > + /omit-if-no-ref/ > + uart7_pi_pins: uart7-pi-pins { > + pins = "PI20", "PI21"; > + function = "uart7"; > + }; > }; > > wdt: watchdog@1c20c90 { From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7605C433DB for ; Mon, 22 Mar 2021 16:26:27 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6607661974 for ; Mon, 22 Mar 2021 16:26:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6607661974 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/0cWgsRHdM5GqTWbN5XnFqWz2Bk6pxofuMJXTPA0Uas=; b=UHrNVl0bx/DtLmSWf1goUHZFG 7YYam3IPeyqMScp1ifaCV+u+5QK6aK+jKc847jtrK78M9TDqDNsRY33tVRJ+cy0B5b1/TI95tZpdj EdL/poOCzRcQkpE9zZZceZJ6AbpPsMYDlh9cFU7EkIVPbRFLBJh9wgkakRog+RpYGIUf5/17zYrZA y5sAgxe5u3YJah//7hbICYVdQNZAKYriWcc3aJ7/gb80Xo+9xsAQj1l+PVYCNVqCDY/UlsSaPYveI 8leJU0Rb0Yokh2rhVWRXbg7USaaS1hMg4I7vPOycX9x+DLERR1CGLVCTEcnLDlwL0BmYVLeveJCyl LMePsVmfA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lONLv-00C17d-47; Mon, 22 Mar 2021 16:24:27 +0000 Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lONLo-00C16S-09 for linux-arm-kernel@lists.infradead.org; Mon, 22 Mar 2021 16:24:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A873D1042; Mon, 22 Mar 2021 09:24:16 -0700 (PDT) Received: from slackpad.fritz.box (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 52A053F719; Mon, 22 Mar 2021 09:24:15 -0700 (PDT) Date: Mon, 22 Mar 2021 16:24:11 +0000 From: Andre Przywara To: Ivan Uvarov Cc: devicetree@vger.kernel.org, Chen-Yu Tsai , Jernej Skrabec , Maxime Ripard , Rob Herring , linux-arm-kernel@lists.infradead.org, Icenowy Zheng Subject: Re: [PATCH v2 2/4] ARM: dts: sun8i: r40: add pinmux settings for MMC3 and UARTs 2,4,5&7 Message-ID: <20210322162411.1569bc4c@slackpad.fritz.box> In-Reply-To: <20210322105538.3475183-3-i.uvarov@cognitivepilot.com> References: <20210322105538.3475183-1-i.uvarov@cognitivepilot.com> <20210322105538.3475183-3-i.uvarov@cognitivepilot.com> Organization: Arm Ltd. X-Mailer: Claws Mail 3.17.1 (GTK+ 2.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210322_162420_558820_D737B8E6 X-CRM114-Status: GOOD ( 18.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 22 Mar 2021 13:55:36 +0300 Ivan Uvarov wrote: Hi, > The Forlinx OKA40i-C devboard makes use of UARTs 0,2,3,4,5 and 7 of the R40 > SoC, of which UART 0 is connected to an RS232 converter, UART 5 routed to > an RS485 converter, and the rest broken out directly via labeled headers. > The board also contains a micro-SD slot connected to SDC3. > > This patch adds settings to R40's pinmux node for those UARTs that were not > already mapped, which would allow us to make use of all available UARTs and > the micro-SD slot on this board in a further patch. > > Signed-off-by: Ivan Uvarov Looks alright, compared against the R40 manual. Reviewed-by: Andre Przywara Cheers, Andre > > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi > index 0b257a0779..51031a0e59 100644 > --- a/arch/arm/boot/dts/sun8i-r40.dtsi > +++ b/arch/arm/boot/dts/sun8i-r40.dtsi > @@ -357,6 +357,8 @@ mmc3: mmc@1c12000 { > clock-names = "ahb", "mmc"; > resets = <&ccu RST_BUS_MMC3>; > reset-names = "ahb"; > + pinctrl-0 = <&mmc3_pins>; > + pinctrl-names = "default"; > interrupts = ; > status = "disabled"; > #address-cells = <1>; > @@ -601,6 +603,14 @@ mmc2_pins: mmc2-pins { > bias-pull-up; > }; > > + mmc3_pins: mmc3-pins { > + pins = "PI4", "PI5", "PI6", > + "PI7", "PI8", "PI9"; > + function = "mmc3"; > + drive-strength = <30>; > + bias-pull-up; > + }; > + > /omit-if-no-ref/ > spi0_pc_pins: spi0-pc-pins { > pins = "PC0", "PC1", "PC2"; > @@ -637,6 +647,18 @@ uart0_pb_pins: uart0-pb-pins { > function = "uart0"; > }; > > + /omit-if-no-ref/ > + uart2_pi_pins: uart2-pi-pins { > + pins = "PI18", "PI19"; > + function = "uart2"; > + }; > + > + /omit-if-no-ref/ > + uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ > + pins = "PI16", "PI17"; > + function = "uart2"; > + }; > + > /omit-if-no-ref/ > uart3_pg_pins: uart3-pg-pins { > pins = "PG6", "PG7"; > @@ -648,6 +670,24 @@ uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins { > pins = "PG8", "PG9"; > function = "uart3"; > }; > + > + /omit-if-no-ref/ > + uart4_pg_pins: uart4-pg-pins { > + pins = "PG10", "PG11"; > + function = "uart4"; > + }; > + > + /omit-if-no-ref/ > + uart5_ph_pins: uart5-ph-pins { > + pins = "PH6", "PH7"; > + function = "uart5"; > + }; > + > + /omit-if-no-ref/ > + uart7_pi_pins: uart7-pi-pins { > + pins = "PI20", "PI21"; > + function = "uart7"; > + }; > }; > > wdt: watchdog@1c20c90 { _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel