From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDB4DC433DB for ; Thu, 25 Mar 2021 18:07:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82E7761A24 for ; Thu, 25 Mar 2021 18:07:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 82E7761A24 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 26CE26EE2B; Thu, 25 Mar 2021 18:07:34 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 585426EE1F for ; Thu, 25 Mar 2021 18:07:32 +0000 (UTC) IronPort-SDR: ZLJ+yA92pkSfAoQzxpfUs1H6ffXl2gPoA4x/8ARkIUoTHWMDGIcZ2qPXhBlRUGFs03MAsMYkvg aaUiCpPq1+vw== X-IronPort-AV: E=McAfee;i="6000,8403,9934"; a="178112541" X-IronPort-AV: E=Sophos;i="5.81,278,1610438400"; d="scan'208";a="178112541" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2021 11:07:31 -0700 IronPort-SDR: NNWWZRKKo8xugn5rrOE32jvdoLOqoAhtMXcw/NqQ9xr12PVBqqqAQWB50KLOrHxNTd3iDh9QOf v1AU49kIxXTA== X-IronPort-AV: E=Sophos;i="5.81,278,1610438400"; d="scan'208";a="453176627" Received: from mdroper-desk1.fm.intel.com ([10.1.27.168]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2021 11:07:31 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Thu, 25 Mar 2021 11:06:53 -0700 Message-Id: <20210325180720.401410-24-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20210325180720.401410-1-matthew.d.roper@intel.com> References: <20210325180720.401410-1-matthew.d.roper@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 23/50] drm/i915/adl_p: Load DMC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: me@freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Anusha Srivatsa Load DMC v2.08 on ADLP. The release notes mention that this version enables few power savings features. Cc: Lucas De Marchi Cc: Clint Taylor Signed-off-by: Anusha Srivatsa Signed-off-by: Clinton Taylor Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_csr.c | 10 +++++++++- .../gpu/drm/i915/display/intel_display_power.c | 16 +++++++++++++++- 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c index 794efcc3ca08..015fb545f6f8 100644 --- a/drivers/gpu/drm/i915/display/intel_csr.c +++ b/drivers/gpu/drm/i915/display/intel_csr.c @@ -40,6 +40,10 @@ #define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE +#define ADLP_CSR_PATH "i915/adlp_dmc_ver2_08.bin" +#define ADLP_CSR_VERSION_REQUIRED CSR_VERSION(2, 8) +MODULE_FIRMWARE(ADLP_CSR_PATH); + #define ADLS_CSR_PATH "i915/adls_dmc_ver2_01.bin" #define ADLS_CSR_VERSION_REQUIRED CSR_VERSION(2, 1) MODULE_FIRMWARE(ADLS_CSR_PATH); @@ -693,7 +697,11 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv) */ intel_csr_runtime_pm_get(dev_priv); - if (IS_ALDERLAKE_S(dev_priv)) { + if (IS_ALDERLAKE_P(dev_priv)) { + csr->fw_path = ADLP_CSR_PATH; + csr->required_version = ADLP_CSR_VERSION_REQUIRED; + csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE; + } else if (IS_ALDERLAKE_S(dev_priv)) { csr->fw_path = ADLS_CSR_PATH; csr->required_version = ADLS_CSR_VERSION_REQUIRED; csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE; diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 930488fba3cd..20cfb86c0174 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -4953,7 +4953,21 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv, int requested_dc; int max_dc; - if (IS_DG1(dev_priv)) + if (!HAS_DISPLAY(dev_priv)) + return 0; + + if (DISPLAY_VER(dev_priv) == 13) + /* + * FIXME: We need to disable DC-states for two reasons: + * + * - Although not documented in the bspec, we've been told + * that we need to upload Pipe DMC firmwares in addition + * to the main DMC firmware for DC5 to work properly. + * We need proper bspec documentation before we can handle + * this. + */ + max_dc = 0; + else if (IS_DG1(dev_priv)) max_dc = 3; else if (DISPLAY_VER(dev_priv) >= 12) max_dc = 4; -- 2.25.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx