From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8352FC433E1 for ; Tue, 30 Mar 2021 10:31:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4EF10619A9 for ; Tue, 30 Mar 2021 10:31:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231549AbhC3Kag (ORCPT ); Tue, 30 Mar 2021 06:30:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:43562 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231430AbhC3KaV (ORCPT ); Tue, 30 Mar 2021 06:30:21 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id F15E76195C; Tue, 30 Mar 2021 10:30:17 +0000 (UTC) Date: Tue, 30 Mar 2021 11:30:15 +0100 From: Catalin Marinas To: Steven Price Cc: Marc Zyngier , Will Deacon , James Morse , Julien Thierry , Suzuki K Poulose , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dave Martin , Mark Rutland , Thomas Gleixner , qemu-devel@nongnu.org, Juan Quintela , "Dr. David Alan Gilbert" , Richard Henderson , Peter Maydell , Haibo Xu , Andrew Jones Subject: Re: [PATCH v10 2/6] arm64: kvm: Introduce MTE VM feature Message-ID: <20210330103013.GD18075@arm.com> References: <20210312151902.17853-1-steven.price@arm.com> <20210312151902.17853-3-steven.price@arm.com> <20210327152324.GA28167@arm.com> <20210328122131.GB17535@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote: > On 28/03/2021 13:21, Catalin Marinas wrote: > > On Sat, Mar 27, 2021 at 03:23:24PM +0000, Catalin Marinas wrote: > > > On Fri, Mar 12, 2021 at 03:18:58PM +0000, Steven Price wrote: > > > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > > > > index 77cb2d28f2a4..b31b7a821f90 100644 > > > > --- a/arch/arm64/kvm/mmu.c > > > > +++ b/arch/arm64/kvm/mmu.c > > > > @@ -879,6 +879,22 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, > > > > if (vma_pagesize == PAGE_SIZE && !force_pte) > > > > vma_pagesize = transparent_hugepage_adjust(memslot, hva, > > > > &pfn, &fault_ipa); > > > > + > > > > + if (fault_status != FSC_PERM && kvm_has_mte(kvm) && pfn_valid(pfn)) { > > > > + /* > > > > + * VM will be able to see the page's tags, so we must ensure > > > > + * they have been initialised. if PG_mte_tagged is set, tags > > > > + * have already been initialised. > > > > + */ > > > > + struct page *page = pfn_to_page(pfn); > > > > + unsigned long i, nr_pages = vma_pagesize >> PAGE_SHIFT; > > > > + > > > > + for (i = 0; i < nr_pages; i++, page++) { > > > > + if (!test_and_set_bit(PG_mte_tagged, &page->flags)) > > > > + mte_clear_page_tags(page_address(page)); > > > > + } > > > > + } > > > > > > This pfn_valid() check may be problematic. Following commit eeb0753ba27b > > > ("arm64/mm: Fix pfn_valid() for ZONE_DEVICE based memory"), it returns > > > true for ZONE_DEVICE memory but such memory is allowed not to support > > > MTE. > > > > Some more thinking, this should be safe as any ZONE_DEVICE would be > > mapped as untagged memory in the kernel linear map. It could be slightly > > inefficient if it unnecessarily tries to clear tags in ZONE_DEVICE, > > untagged memory. Another overhead is pfn_valid() which will likely end > > up calling memblock_is_map_memory(). > > > > However, the bigger issue is that Stage 2 cannot disable tagging for > > Stage 1 unless the memory is Non-cacheable or Device at S2. Is there a > > way to detect what gets mapped in the guest as Normal Cacheable memory > > and make sure it's only early memory or hotplug but no ZONE_DEVICE (or > > something else like on-chip memory)? If we can't guarantee that all > > Cacheable memory given to a guest supports tags, we should disable the > > feature altogether. > > In stage 2 I believe we only have two types of mapping - 'normal' or > DEVICE_nGnRE (see stage2_map_set_prot_attr()). Filtering out the latter is a > case of checking the 'device' variable, and makes sense to avoid the > overhead you describe. > > This should also guarantee that all stage-2 cacheable memory supports tags, > as kvm_is_device_pfn() is simply !pfn_valid(), and pfn_valid() should only > be true for memory that Linux considers "normal". That's the problem. With Anshuman's commit I mentioned above, pfn_valid() returns true for ZONE_DEVICE mappings (e.g. persistent memory, not talking about some I/O mapping that requires Device_nGnRE). So kvm_is_device_pfn() is false for such memory and it may be mapped as Normal but it is not guaranteed to support tagging. For user MTE, we get away with this as the MAP_ANONYMOUS requirement would filter it out while arch_add_memory() will ensure it's mapped as untagged in the linear map. See another recent fix for hotplugged memory: d15dfd31384b ("arm64: mte: Map hotplugged memory as Normal Tagged"). We needed to ensure that ZONE_DEVICE doesn't end up as tagged, only hoplugged memory. Both handled via arch_add_memory() in the arch code with ZONE_DEVICE starting at devm_memremap_pages(). > > > I now wonder if we can get a MAP_ANONYMOUS mapping of ZONE_DEVICE pfn > > > even without virtualisation. > > > > I haven't checked all the code paths but I don't think we can get a > > MAP_ANONYMOUS mapping of ZONE_DEVICE memory as we normally need a file > > descriptor. > > I certainly hope this is the case - it's the weird corner cases of device > drivers that worry me. E.g. I know i915 has a "hidden" mmap behind an ioctl > (see i915_gem_mmap_ioctl(), although this case is fine - it's MAP_SHARED). > Mali's kbase did something similar in the past. I think this should be fine since it's not a MAP_ANONYMOUS (we do allow MAP_SHARED to be tagged). -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC715C433C1 for ; Tue, 30 Mar 2021 10:32:28 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 25CC06195C for ; Tue, 30 Mar 2021 10:32:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 25CC06195C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:60022 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lRBff-0004m9-51 for qemu-devel@archiver.kernel.org; Tue, 30 Mar 2021 06:32:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49266) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRBdl-0003re-9U for qemu-devel@nongnu.org; Tue, 30 Mar 2021 06:30:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:55314) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRBdf-00049p-11 for qemu-devel@nongnu.org; Tue, 30 Mar 2021 06:30:24 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id F15E76195C; Tue, 30 Mar 2021 10:30:17 +0000 (UTC) Date: Tue, 30 Mar 2021 11:30:15 +0100 From: Catalin Marinas To: Steven Price Subject: Re: [PATCH v10 2/6] arm64: kvm: Introduce MTE VM feature Message-ID: <20210330103013.GD18075@arm.com> References: <20210312151902.17853-1-steven.price@arm.com> <20210312151902.17853-3-steven.price@arm.com> <20210327152324.GA28167@arm.com> <20210328122131.GB17535@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Received-SPF: pass client-ip=198.145.29.99; envelope-from=cmarinas@kernel.org; helo=mail.kernel.org X-Spam_score_int: -66 X-Spam_score: -6.7 X-Spam_bar: ------ X-Spam_report: (-6.7 / 5.0 requ) BAYES_00=-1.9, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Peter Maydell , "Dr. David Alan Gilbert" , Andrew Jones , Haibo Xu , Suzuki K Poulose , qemu-devel@nongnu.org, Marc Zyngier , Juan Quintela , Richard Henderson , linux-kernel@vger.kernel.org, Dave Martin , James Morse , linux-arm-kernel@lists.infradead.org, Thomas Gleixner , Will Deacon , kvmarm@lists.cs.columbia.edu, Julien Thierry Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote: > On 28/03/2021 13:21, Catalin Marinas wrote: > > On Sat, Mar 27, 2021 at 03:23:24PM +0000, Catalin Marinas wrote: > > > On Fri, Mar 12, 2021 at 03:18:58PM +0000, Steven Price wrote: > > > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > > > > index 77cb2d28f2a4..b31b7a821f90 100644 > > > > --- a/arch/arm64/kvm/mmu.c > > > > +++ b/arch/arm64/kvm/mmu.c > > > > @@ -879,6 +879,22 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, > > > > if (vma_pagesize == PAGE_SIZE && !force_pte) > > > > vma_pagesize = transparent_hugepage_adjust(memslot, hva, > > > > &pfn, &fault_ipa); > > > > + > > > > + if (fault_status != FSC_PERM && kvm_has_mte(kvm) && pfn_valid(pfn)) { > > > > + /* > > > > + * VM will be able to see the page's tags, so we must ensure > > > > + * they have been initialised. if PG_mte_tagged is set, tags > > > > + * have already been initialised. > > > > + */ > > > > + struct page *page = pfn_to_page(pfn); > > > > + unsigned long i, nr_pages = vma_pagesize >> PAGE_SHIFT; > > > > + > > > > + for (i = 0; i < nr_pages; i++, page++) { > > > > + if (!test_and_set_bit(PG_mte_tagged, &page->flags)) > > > > + mte_clear_page_tags(page_address(page)); > > > > + } > > > > + } > > > > > > This pfn_valid() check may be problematic. Following commit eeb0753ba27b > > > ("arm64/mm: Fix pfn_valid() for ZONE_DEVICE based memory"), it returns > > > true for ZONE_DEVICE memory but such memory is allowed not to support > > > MTE. > > > > Some more thinking, this should be safe as any ZONE_DEVICE would be > > mapped as untagged memory in the kernel linear map. It could be slightly > > inefficient if it unnecessarily tries to clear tags in ZONE_DEVICE, > > untagged memory. Another overhead is pfn_valid() which will likely end > > up calling memblock_is_map_memory(). > > > > However, the bigger issue is that Stage 2 cannot disable tagging for > > Stage 1 unless the memory is Non-cacheable or Device at S2. Is there a > > way to detect what gets mapped in the guest as Normal Cacheable memory > > and make sure it's only early memory or hotplug but no ZONE_DEVICE (or > > something else like on-chip memory)? If we can't guarantee that all > > Cacheable memory given to a guest supports tags, we should disable the > > feature altogether. > > In stage 2 I believe we only have two types of mapping - 'normal' or > DEVICE_nGnRE (see stage2_map_set_prot_attr()). Filtering out the latter is a > case of checking the 'device' variable, and makes sense to avoid the > overhead you describe. > > This should also guarantee that all stage-2 cacheable memory supports tags, > as kvm_is_device_pfn() is simply !pfn_valid(), and pfn_valid() should only > be true for memory that Linux considers "normal". That's the problem. With Anshuman's commit I mentioned above, pfn_valid() returns true for ZONE_DEVICE mappings (e.g. persistent memory, not talking about some I/O mapping that requires Device_nGnRE). So kvm_is_device_pfn() is false for such memory and it may be mapped as Normal but it is not guaranteed to support tagging. For user MTE, we get away with this as the MAP_ANONYMOUS requirement would filter it out while arch_add_memory() will ensure it's mapped as untagged in the linear map. See another recent fix for hotplugged memory: d15dfd31384b ("arm64: mte: Map hotplugged memory as Normal Tagged"). We needed to ensure that ZONE_DEVICE doesn't end up as tagged, only hoplugged memory. Both handled via arch_add_memory() in the arch code with ZONE_DEVICE starting at devm_memremap_pages(). > > > I now wonder if we can get a MAP_ANONYMOUS mapping of ZONE_DEVICE pfn > > > even without virtualisation. > > > > I haven't checked all the code paths but I don't think we can get a > > MAP_ANONYMOUS mapping of ZONE_DEVICE memory as we normally need a file > > descriptor. > > I certainly hope this is the case - it's the weird corner cases of device > drivers that worry me. E.g. I know i915 has a "hidden" mmap behind an ioctl > (see i915_gem_mmap_ioctl(), although this case is fine - it's MAP_SHARED). > Mali's kbase did something similar in the past. I think this should be fine since it's not a MAP_ANONYMOUS (we do allow MAP_SHARED to be tagged). -- Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 230ADC433C1 for ; Tue, 30 Mar 2021 10:30:28 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 6666F619A6 for ; Tue, 30 Mar 2021 10:30:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6666F619A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id D7A314B2DF; Tue, 30 Mar 2021 06:30:26 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 16QE5ZpPUTmg; Tue, 30 Mar 2021 06:30:25 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 977F74B29C; Tue, 30 Mar 2021 06:30:25 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 58A7F4B281 for ; Tue, 30 Mar 2021 06:30:24 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7ViwU8skV+o5 for ; Tue, 30 Mar 2021 06:30:23 -0400 (EDT) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id F0C114B23E for ; Tue, 30 Mar 2021 06:30:22 -0400 (EDT) Received: by mail.kernel.org (Postfix) with ESMTPSA id F15E76195C; Tue, 30 Mar 2021 10:30:17 +0000 (UTC) Date: Tue, 30 Mar 2021 11:30:15 +0100 From: Catalin Marinas To: Steven Price Subject: Re: [PATCH v10 2/6] arm64: kvm: Introduce MTE VM feature Message-ID: <20210330103013.GD18075@arm.com> References: <20210312151902.17853-1-steven.price@arm.com> <20210312151902.17853-3-steven.price@arm.com> <20210327152324.GA28167@arm.com> <20210328122131.GB17535@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Cc: "Dr. David Alan Gilbert" , qemu-devel@nongnu.org, Marc Zyngier , Juan Quintela , Richard Henderson , linux-kernel@vger.kernel.org, Dave Martin , linux-arm-kernel@lists.infradead.org, Thomas Gleixner , Will Deacon , kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote: > On 28/03/2021 13:21, Catalin Marinas wrote: > > On Sat, Mar 27, 2021 at 03:23:24PM +0000, Catalin Marinas wrote: > > > On Fri, Mar 12, 2021 at 03:18:58PM +0000, Steven Price wrote: > > > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > > > > index 77cb2d28f2a4..b31b7a821f90 100644 > > > > --- a/arch/arm64/kvm/mmu.c > > > > +++ b/arch/arm64/kvm/mmu.c > > > > @@ -879,6 +879,22 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, > > > > if (vma_pagesize == PAGE_SIZE && !force_pte) > > > > vma_pagesize = transparent_hugepage_adjust(memslot, hva, > > > > &pfn, &fault_ipa); > > > > + > > > > + if (fault_status != FSC_PERM && kvm_has_mte(kvm) && pfn_valid(pfn)) { > > > > + /* > > > > + * VM will be able to see the page's tags, so we must ensure > > > > + * they have been initialised. if PG_mte_tagged is set, tags > > > > + * have already been initialised. > > > > + */ > > > > + struct page *page = pfn_to_page(pfn); > > > > + unsigned long i, nr_pages = vma_pagesize >> PAGE_SHIFT; > > > > + > > > > + for (i = 0; i < nr_pages; i++, page++) { > > > > + if (!test_and_set_bit(PG_mte_tagged, &page->flags)) > > > > + mte_clear_page_tags(page_address(page)); > > > > + } > > > > + } > > > > > > This pfn_valid() check may be problematic. Following commit eeb0753ba27b > > > ("arm64/mm: Fix pfn_valid() for ZONE_DEVICE based memory"), it returns > > > true for ZONE_DEVICE memory but such memory is allowed not to support > > > MTE. > > > > Some more thinking, this should be safe as any ZONE_DEVICE would be > > mapped as untagged memory in the kernel linear map. It could be slightly > > inefficient if it unnecessarily tries to clear tags in ZONE_DEVICE, > > untagged memory. Another overhead is pfn_valid() which will likely end > > up calling memblock_is_map_memory(). > > > > However, the bigger issue is that Stage 2 cannot disable tagging for > > Stage 1 unless the memory is Non-cacheable or Device at S2. Is there a > > way to detect what gets mapped in the guest as Normal Cacheable memory > > and make sure it's only early memory or hotplug but no ZONE_DEVICE (or > > something else like on-chip memory)? If we can't guarantee that all > > Cacheable memory given to a guest supports tags, we should disable the > > feature altogether. > > In stage 2 I believe we only have two types of mapping - 'normal' or > DEVICE_nGnRE (see stage2_map_set_prot_attr()). Filtering out the latter is a > case of checking the 'device' variable, and makes sense to avoid the > overhead you describe. > > This should also guarantee that all stage-2 cacheable memory supports tags, > as kvm_is_device_pfn() is simply !pfn_valid(), and pfn_valid() should only > be true for memory that Linux considers "normal". That's the problem. With Anshuman's commit I mentioned above, pfn_valid() returns true for ZONE_DEVICE mappings (e.g. persistent memory, not talking about some I/O mapping that requires Device_nGnRE). So kvm_is_device_pfn() is false for such memory and it may be mapped as Normal but it is not guaranteed to support tagging. For user MTE, we get away with this as the MAP_ANONYMOUS requirement would filter it out while arch_add_memory() will ensure it's mapped as untagged in the linear map. See another recent fix for hotplugged memory: d15dfd31384b ("arm64: mte: Map hotplugged memory as Normal Tagged"). We needed to ensure that ZONE_DEVICE doesn't end up as tagged, only hoplugged memory. Both handled via arch_add_memory() in the arch code with ZONE_DEVICE starting at devm_memremap_pages(). > > > I now wonder if we can get a MAP_ANONYMOUS mapping of ZONE_DEVICE pfn > > > even without virtualisation. > > > > I haven't checked all the code paths but I don't think we can get a > > MAP_ANONYMOUS mapping of ZONE_DEVICE memory as we normally need a file > > descriptor. > > I certainly hope this is the case - it's the weird corner cases of device > drivers that worry me. E.g. I know i915 has a "hidden" mmap behind an ioctl > (see i915_gem_mmap_ioctl(), although this case is fine - it's MAP_SHARED). > Mali's kbase did something similar in the past. I think this should be fine since it's not a MAP_ANONYMOUS (we do allow MAP_SHARED to be tagged). -- Catalin _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83A4DC433DB for ; Tue, 30 Mar 2021 10:32:03 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 06599619A6 for ; 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Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lRBdn-003P3C-E1; Tue, 30 Mar 2021 10:30:31 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lRBdh-003P2I-8c for linux-arm-kernel@lists.infradead.org; Tue, 30 Mar 2021 10:30:27 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id F15E76195C; Tue, 30 Mar 2021 10:30:17 +0000 (UTC) Date: Tue, 30 Mar 2021 11:30:15 +0100 From: Catalin Marinas To: Steven Price Cc: Marc Zyngier , Will Deacon , James Morse , Julien Thierry , Suzuki K Poulose , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dave Martin , Mark Rutland , Thomas Gleixner , qemu-devel@nongnu.org, Juan Quintela , "Dr. David Alan Gilbert" , Richard Henderson , Peter Maydell , Haibo Xu , Andrew Jones Subject: Re: [PATCH v10 2/6] arm64: kvm: Introduce MTE VM feature Message-ID: <20210330103013.GD18075@arm.com> References: <20210312151902.17853-1-steven.price@arm.com> <20210312151902.17853-3-steven.price@arm.com> <20210327152324.GA28167@arm.com> <20210328122131.GB17535@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210330_113025_839838_BDE15B23 X-CRM114-Status: GOOD ( 42.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote: > On 28/03/2021 13:21, Catalin Marinas wrote: > > On Sat, Mar 27, 2021 at 03:23:24PM +0000, Catalin Marinas wrote: > > > On Fri, Mar 12, 2021 at 03:18:58PM +0000, Steven Price wrote: > > > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c > > > > index 77cb2d28f2a4..b31b7a821f90 100644 > > > > --- a/arch/arm64/kvm/mmu.c > > > > +++ b/arch/arm64/kvm/mmu.c > > > > @@ -879,6 +879,22 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, > > > > if (vma_pagesize == PAGE_SIZE && !force_pte) > > > > vma_pagesize = transparent_hugepage_adjust(memslot, hva, > > > > &pfn, &fault_ipa); > > > > + > > > > + if (fault_status != FSC_PERM && kvm_has_mte(kvm) && pfn_valid(pfn)) { > > > > + /* > > > > + * VM will be able to see the page's tags, so we must ensure > > > > + * they have been initialised. if PG_mte_tagged is set, tags > > > > + * have already been initialised. > > > > + */ > > > > + struct page *page = pfn_to_page(pfn); > > > > + unsigned long i, nr_pages = vma_pagesize >> PAGE_SHIFT; > > > > + > > > > + for (i = 0; i < nr_pages; i++, page++) { > > > > + if (!test_and_set_bit(PG_mte_tagged, &page->flags)) > > > > + mte_clear_page_tags(page_address(page)); > > > > + } > > > > + } > > > > > > This pfn_valid() check may be problematic. Following commit eeb0753ba27b > > > ("arm64/mm: Fix pfn_valid() for ZONE_DEVICE based memory"), it returns > > > true for ZONE_DEVICE memory but such memory is allowed not to support > > > MTE. > > > > Some more thinking, this should be safe as any ZONE_DEVICE would be > > mapped as untagged memory in the kernel linear map. It could be slightly > > inefficient if it unnecessarily tries to clear tags in ZONE_DEVICE, > > untagged memory. Another overhead is pfn_valid() which will likely end > > up calling memblock_is_map_memory(). > > > > However, the bigger issue is that Stage 2 cannot disable tagging for > > Stage 1 unless the memory is Non-cacheable or Device at S2. Is there a > > way to detect what gets mapped in the guest as Normal Cacheable memory > > and make sure it's only early memory or hotplug but no ZONE_DEVICE (or > > something else like on-chip memory)? If we can't guarantee that all > > Cacheable memory given to a guest supports tags, we should disable the > > feature altogether. > > In stage 2 I believe we only have two types of mapping - 'normal' or > DEVICE_nGnRE (see stage2_map_set_prot_attr()). Filtering out the latter is a > case of checking the 'device' variable, and makes sense to avoid the > overhead you describe. > > This should also guarantee that all stage-2 cacheable memory supports tags, > as kvm_is_device_pfn() is simply !pfn_valid(), and pfn_valid() should only > be true for memory that Linux considers "normal". That's the problem. With Anshuman's commit I mentioned above, pfn_valid() returns true for ZONE_DEVICE mappings (e.g. persistent memory, not talking about some I/O mapping that requires Device_nGnRE). So kvm_is_device_pfn() is false for such memory and it may be mapped as Normal but it is not guaranteed to support tagging. For user MTE, we get away with this as the MAP_ANONYMOUS requirement would filter it out while arch_add_memory() will ensure it's mapped as untagged in the linear map. See another recent fix for hotplugged memory: d15dfd31384b ("arm64: mte: Map hotplugged memory as Normal Tagged"). We needed to ensure that ZONE_DEVICE doesn't end up as tagged, only hoplugged memory. Both handled via arch_add_memory() in the arch code with ZONE_DEVICE starting at devm_memremap_pages(). > > > I now wonder if we can get a MAP_ANONYMOUS mapping of ZONE_DEVICE pfn > > > even without virtualisation. > > > > I haven't checked all the code paths but I don't think we can get a > > MAP_ANONYMOUS mapping of ZONE_DEVICE memory as we normally need a file > > descriptor. > > I certainly hope this is the case - it's the weird corner cases of device > drivers that worry me. E.g. I know i915 has a "hidden" mmap behind an ioctl > (see i915_gem_mmap_ioctl(), although this case is fine - it's MAP_SHARED). > Mali's kbase did something similar in the past. I think this should be fine since it's not a MAP_ANONYMOUS (we do allow MAP_SHARED to be tagged). -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel