Re: [PATCH v1 3/7] PCI: New Primary to Sideband (P2SB) bridge support library

[Mika Westerberg <mika.westerberg@linux.intel.com>]

On Thu, Apr 01, 2021 at 06:43:11PM +0300, Andy Shevchenko wrote:
> On Sat, Mar 13, 2021 at 10:45:57AM +0100, Henning Schild wrote:
> > Am Mon, 8 Mar 2021 14:20:16 +0200
> > schrieb Andy Shevchenko <andriy.shevchenko@linux.intel.com>:
> 
> ...
> 
> > > + * pci_p2sb_bar - Get Primary to Sideband bridge (P2SB) device BAR
> > > + * @pdev:	PCI device to get a PCI bus to communicate with
> > > + * @devfn:	PCI slot and function to communicate with
> > > + * @mem:	memory resource to be filled in
> > 
> > Do we really need that many arguments to it?
> > 
> > Before i had, in a platform driver that never had its own pci_dev or bus
> > 
> >   res->start = simatic_ipc_get_membase0(PCI_DEVFN(13, 0));
> >   if (res-start == 0)
> >     return -ENODEV;
> > 
> > So helper only asked for the devfn, returned base and no dedicated
> > error code.
> > 
> > With this i need
> > 
> >   struct pci_bus *bus = pci_find_bus(0, 0);
> >   struct pci_dev *pci_dev = bus->self;
> >   unsigned int magic_i_do_not_want =  PCI_DEVFN(13, 0);
> 
> What confuses me is the use for SPI NOR controller on Broxton. And I think
> we actually can indeed hide all this under the hood by exposing P2SB to the OS.
> 
> Mika, what do you think?

Not sure I follow. Do you mean we force unhide P2SB and then bind (MFD)
driver to that?