From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35BA9C433B4 for ; Sat, 3 Apr 2021 07:24:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 02969611F2 for ; Sat, 3 Apr 2021 07:24:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236134AbhDCHYA (ORCPT ); Sat, 3 Apr 2021 03:24:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231282AbhDCHX7 (ORCPT ); Sat, 3 Apr 2021 03:23:59 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3FF32C0613E6 for ; Sat, 3 Apr 2021 00:23:55 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id q6-20020a17090a4306b02900c42a012202so3490605pjg.5 for ; Sat, 03 Apr 2021 00:23:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Bvw4GzQn65DZ4pqQ+AEs3gw49XLdASJ2qk5ucIwMhWc=; b=vfxmwLq1Wa5/v6Q8MWuThJ/u1mb6ks/kJNkdjYnd1bL/Q1b82OuQ2m9AleIPnLJ+4W w0X55rkfipyIZaoJhMUzRyf5U5j2IeKR1nqywSH2m0BKU5FGQV+PSTR4RO+7n6i2T0yL Hl7FWaWMv24yGF6puX1wS4om6e3OO2Bz/HX5bV211Lu5Jh384LpaIDXuvi2VYh7dtEG+ YOjEqHdav6fJf+oNvB6ZzIaZepnFEofj3A82TWZK1UN6xfIWMCo5Tu+DNq7a14cLpqVZ jWjQhTNJoWiRz8mRHRb5xP2zJ+WDQ+uM77vjCMlq0uAWM+8D8UhtUmPJHe0aHHm0DsH8 hYiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Bvw4GzQn65DZ4pqQ+AEs3gw49XLdASJ2qk5ucIwMhWc=; b=Q7SDY9tlpQkfPbnbFwNwnQ6usGCxB8pM45Dvq0xYt718vQhxyXWSstuoICbKyEcLhR 10Fs+o1Rm2TFtFBhAY1R3lgQvrsTQ9giRjodDOPEwIIYmq8NP0aBRBbKU/+oiIxmi07w eUsYYX3BXEqEWfrvVlJXOw9sygUYkT1R+PFo7KzOBwr0tauMmPsA6v7lJmNtWHtN60Qk nWApqqQ4C/R6kOyjo0VCjbCE+2KbhpdWB+GLmGVcfAbtl897VCuF/fbt2u84C+7bnZsn plXWVBRlwCXQFpbSomvutBgIA5IXSxKAR8kce6Qi0LoUODueMO3FnQWSxXKwA8Xn4IGa ndtg== X-Gm-Message-State: AOAM533ySLTJBYGFFu+uY7NTxg4pqyu3Oa++VABPkfZWEj6XVLfuB7aq 2DcIBBCo39BzgwqmCSOCzKSjJhc0pAtiVRM+Gwk= X-Google-Smtp-Source: ABdhPJzo0Z+ZiHQT4uddJs2d9jflhbxk1HHdYlKqMxcnXX45d4aM+OCFQj89QTB23YiQrq6Vj85fuA== X-Received: by 2002:a17:90b:e87:: with SMTP id fv7mr17331255pjb.27.1617434634053; Sat, 03 Apr 2021 00:23:54 -0700 (PDT) Received: from localhost ([116.206.101.232]) by smtp.gmail.com with ESMTPSA id y4sm9691865pfn.67.2021.04.03.00.23.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Apr 2021 00:23:53 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , James Clark , Al Grant , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v2 0/7] perf arm-spe: Enable timestamp Date: Sat, 3 Apr 2021 15:23:39 +0800 Message-Id: <20210403072346.30430-1-leo.yan@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As we know, the timestamp is important for AUX trace; it's mainly used to correlate between perf events and AUX trace, allows to generate events with time ordered manner. There have several good examples of enabling timestamp for AUX trace (like Intel-pt, Intel-bts, etc). Since the conversion between TSC and kernel timestamp has been supported on Arm64, TSC is a naming convention from x86, but perf now has reused it to support Arm arch timer counter. This patch set is to enable timestamp for Arm SPE trace. It reads out TSC parameters from mmap page and stores into auxtrace info structure; the TSC parameters are used for conversion between timer counter and kernel time and which is applied for Arm SPE samples. This patch set can be clearly applied on perf/core branch with: commit 6859bc0e78c6 ("perf stat: Improve readability of shadow stats") Ths patch series has been tested on Hisilicon D06 platform. After: # perf script -F comm,time,cpu,pid,dso,ip,sym perf 2408 [032] 168.680297: ffffbd1253690a3c perf_event_exec ([kernel.kallsyms]) perf 2408 [032] 168.680297: ffffbd1253690a3c perf_event_exec ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680317: ffffbd1253683f50 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680317: ffffbd1253683f50 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680319: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680319: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680367: ffffbd12539b03ec __arch_clear_user ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) Changes from v1: * Rebased patch series on the latest perf/core branch; * Fixed the patch for dumping TSC parameters to support both the older and new auxtrace info format. Leo Yan (7): perf arm-spe: Remove unused enum value ARM_SPE_PER_CPU_MMAPS perf arm-spe: Store TSC parameters in auxtrace info perf arm-spe: Dump TSC parameters perf arm-spe: Convert event kernel time to counter value perf arm-spe: Assign kernel time to synthesized event perf arm-spe: Bail out if the trace is later than perf event perf arm-spe: Don't wait for PERF_RECORD_EXIT event tools/perf/arch/arm64/util/arm-spe.c | 23 +++++++ tools/perf/util/arm-spe.c | 89 +++++++++++++++++++++++----- tools/perf/util/arm-spe.h | 7 ++- 3 files changed, 103 insertions(+), 16 deletions(-) -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F1E9C433B4 for ; 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Sat, 03 Apr 2021 00:23:54 -0700 (PDT) Received: from localhost ([116.206.101.232]) by smtp.gmail.com with ESMTPSA id y4sm9691865pfn.67.2021.04.03.00.23.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Apr 2021 00:23:53 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , James Clark , Al Grant , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v2 0/7] perf arm-spe: Enable timestamp Date: Sat, 3 Apr 2021 15:23:39 +0800 Message-Id: <20210403072346.30430-1-leo.yan@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210403_082356_354579_B2394AD9 X-CRM114-Status: GOOD ( 12.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org As we know, the timestamp is important for AUX trace; it's mainly used to correlate between perf events and AUX trace, allows to generate events with time ordered manner. There have several good examples of enabling timestamp for AUX trace (like Intel-pt, Intel-bts, etc). Since the conversion between TSC and kernel timestamp has been supported on Arm64, TSC is a naming convention from x86, but perf now has reused it to support Arm arch timer counter. This patch set is to enable timestamp for Arm SPE trace. It reads out TSC parameters from mmap page and stores into auxtrace info structure; the TSC parameters are used for conversion between timer counter and kernel time and which is applied for Arm SPE samples. This patch set can be clearly applied on perf/core branch with: commit 6859bc0e78c6 ("perf stat: Improve readability of shadow stats") Ths patch series has been tested on Hisilicon D06 platform. After: # perf script -F comm,time,cpu,pid,dso,ip,sym perf 2408 [032] 168.680297: ffffbd1253690a3c perf_event_exec ([kernel.kallsyms]) perf 2408 [032] 168.680297: ffffbd1253690a3c perf_event_exec ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680317: ffffbd1253683f50 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680317: ffffbd1253683f50 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680319: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680319: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680367: ffffbd12539b03ec __arch_clear_user ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 kmem_cache_alloc ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) Changes from v1: * Rebased patch series on the latest perf/core branch; * Fixed the patch for dumping TSC parameters to support both the older and new auxtrace info format. Leo Yan (7): perf arm-spe: Remove unused enum value ARM_SPE_PER_CPU_MMAPS perf arm-spe: Store TSC parameters in auxtrace info perf arm-spe: Dump TSC parameters perf arm-spe: Convert event kernel time to counter value perf arm-spe: Assign kernel time to synthesized event perf arm-spe: Bail out if the trace is later than perf event perf arm-spe: Don't wait for PERF_RECORD_EXIT event tools/perf/arch/arm64/util/arm-spe.c | 23 +++++++ tools/perf/util/arm-spe.c | 89 +++++++++++++++++++++++----- tools/perf/util/arm-spe.h | 7 ++- 3 files changed, 103 insertions(+), 16 deletions(-) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel