From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Andy Gross <agross@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v1 4/4] arm64: dts: qcom: sdm845: add required clocks on the gcc
Date: Sun, 4 Apr 2021 09:56:41 -0500 [thread overview]
Message-ID: <20210404145641.GY904837@yoga> (raw)
In-Reply-To: <20210402233944.273275-4-dmitry.baryshkov@linaro.org>
On Fri 02 Apr 18:39 CDT 2021, Dmitry Baryshkov wrote:
> Specify input clocks to the SDM845's Global Clock Controller as required
> by the bindings.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Okay, so that proved me wrong on my suggestion to rely on bi_tcxo always
coming from the DT...
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 454f794af547..86f717d5bfb6 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -1061,6 +1061,16 @@ soc: soc@0 {
> gcc: clock-controller@100000 {
> compatible = "qcom,gcc-sdm845";
> reg = <0 0x00100000 0 0x1f0000>;
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&rpmhcc RPMH_CXO_CLK_A>,
> + <&sleep_clk>,
> + <&pcie0_lane>,
> + <&pcie1_lane>;
> + clock-names = "bi_tcxo",
> + "bi_tcxo_ao",
> + "sleep_clk",
> + "pcie_0_pipe_clk",
> + "pcie_1_pipe_clk";
> #clock-cells = <1>;
> #reset-cells = <1>;
> #power-domain-cells = <1>;
> @@ -2062,6 +2072,7 @@ pcie0_lane: lanes@1c06200 {
> clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
> clock-names = "pipe0";
>
> + #clock-cells = <0>;
> #phy-cells = <0>;
> clock-output-names = "pcie_0_pipe_clk";
> };
> @@ -2170,6 +2181,7 @@ pcie1_lane: lanes@1c06200 {
> clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
> clock-names = "pipe0";
>
> + #clock-cells = <0>;
> #phy-cells = <0>;
> clock-output-names = "pcie_1_pipe_clk";
> };
> --
> 2.30.2
>
prev parent reply other threads:[~2021-04-04 14:56 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-02 23:39 [PATCH v1 1/4] dt-bindings: clock: separate SDM845 GCC clock bindings Dmitry Baryshkov
2021-04-02 23:39 ` [PATCH v1 2/4] clk: qcom: convert SDM845 Global Clock Controller to parent_data Dmitry Baryshkov
2021-04-04 14:51 ` Bjorn Andersson
2021-04-02 23:39 ` [PATCH v1 3/4] clk: qcom: gcc-sdm845: get rid of the test clock Dmitry Baryshkov
2021-04-04 14:53 ` Bjorn Andersson
2021-04-02 23:39 ` [PATCH v1 4/4] arm64: dts: qcom: sdm845: add required clocks on the gcc Dmitry Baryshkov
2021-04-04 14:56 ` Bjorn Andersson [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210404145641.GY904837@yoga \
--to=bjorn.andersson@linaro.org \
--cc=agross@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.