From mboxrd@z Thu Jan  1 00:00:00 1970
From: Pratyush Yadav <p.yadav@ti.com>
Date: Mon, 5 Apr 2021 13:13:29 +0530
Subject: [PATCH v8 00/28] mtd: spi-nor-core: add xSPI Octal DTR support
In-Reply-To: <18cd03c8-642f-6c49-8827-6bfba9581398@gmail.com>
References: <20210401193133.18129-1-p.yadav@ti.com>
 <18cd03c8-642f-6c49-8827-6bfba9581398@gmail.com>
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On 02/04/21 06:28PM, Sean Anderson wrote:
> On 4/1/21 3:31 PM, Pratyush Yadav wrote:
> > Hi,
> > 
> > This series adds support for octal DTR flashes in the SPI NOR framework,
> 
> As an overall question, is this the same as "DDR" mode?

Sort of...

DDR is "Double Data Rate" which implies that the "double" part only 
refers to the data phase. DTR is "Double Transfer Rate" which means the 
"double" part refers to all 3 (command, address, data) phases.

The underlying concept is the same: transfer data twice per clock cycle.

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.