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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH-for-6.0?] target/mips: Fix TCG temporary leak in gen_cache_operation()
Date: Tue,  6 Apr 2021 22:28:57 +0200	[thread overview]
Message-ID: <20210406202857.1440744-1-f4bug@amsat.org> (raw)

Fix a TCG temporary leak when translating CACHE opcode.

Fixes: 0d74a222c27 ("make ITC Configuration Tags accessible to the CPU")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/translate.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index c518bf3963b..71fa5ec1973 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -12804,6 +12804,8 @@ static void gen_cache_operation(DisasContext *ctx, uint32_t op, int base,
     TCGv t1 = tcg_temp_new();
     gen_base_offset_addr(ctx, t1, base, offset);
     gen_helper_cache(cpu_env, t1, t0);
+    tcg_temp_free(t1);
+    tcg_temp_free_i32(t0);
 }
 
 #if defined(TARGET_MIPS64)
-- 
2.26.3



             reply	other threads:[~2021-04-06 20:30 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-06 20:28 Philippe Mathieu-Daudé [this message]
2021-04-06 23:07 ` [PATCH-for-6.0?] target/mips: Fix TCG temporary leak in gen_cache_operation() Richard Henderson

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