From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 887DDC433B4 for ; Thu, 8 Apr 2021 06:37:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5D7546113B for ; Thu, 8 Apr 2021 06:37:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230125AbhDHGiD (ORCPT ); Thu, 8 Apr 2021 02:38:03 -0400 Received: from mo-csw1116.securemx.jp ([210.130.202.158]:46762 "EHLO mo-csw.securemx.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229691AbhDHGiB (ORCPT ); Thu, 8 Apr 2021 02:38:01 -0400 Received: by mo-csw.securemx.jp (mx-mo-csw1116) id 1386bNU3022923; Thu, 8 Apr 2021 15:37:23 +0900 X-Iguazu-Qid: 2wHHssSnbVqCDS96L2 X-Iguazu-QSIG: v=2; s=0; t=1617863843; q=2wHHssSnbVqCDS96L2; m=MK+itwrSUtN910qMWIa57PTH69k5sGpQgX66utEmjMI= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1111) id 1386bMme023272 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Thu, 8 Apr 2021 15:37:23 +0900 Received: from enc02.toshiba.co.jp (enc02.toshiba.co.jp [61.202.160.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by imx12-a.toshiba.co.jp (Postfix) with ESMTPS id 580FA1000C8; Thu, 8 Apr 2021 15:37:22 +0900 (JST) Received: from hop101.toshiba.co.jp ([133.199.85.107]) by enc02.toshiba.co.jp with ESMTP id 1386bLhH021840; Thu, 8 Apr 2021 15:37:22 +0900 Date: Thu, 8 Apr 2021 15:37:19 +0900 From: Nobuhiro Iwamatsu To: Rob Herring Cc: Bjorn Helgaas , Lorenzo Pieralisi , PCI , Punit Agrawal , yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 1/3] dt-bindings: pci: Add DT binding for Toshiba Visconti PCIe controller X-TSB-HOP: ON Message-ID: <20210408063719.jxh27ez375ezx3dc@toshiba.co.jp> References: <20210407031839.386088-1-nobuhiro1.iwamatsu@toshiba.co.jp> <20210407031839.386088-2-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Thanks for your review. On Wed, Apr 07, 2021 at 08:18:58AM -0500, Rob Herring wrote: > On Tue, Apr 6, 2021 at 10:19 PM Nobuhiro Iwamatsu > wrote: > > > > This commit adds the Device Tree binding documentation that allows > > to describe the PCIe controller found in Toshiba Visconti SoCs. > > > > Signed-off-by: Nobuhiro Iwamatsu > > --- > > .../bindings/pci/toshiba,visconti-pcie.yaml | 121 ++++++++++++++++++ > > 1 file changed, 121 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml > > > > diff --git a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml > > new file mode 100644 > > index 000000000000..8ab60c235007 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml > > @@ -0,0 +1,121 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Toshiba Visconti5 SoC PCIe Host Controller Device Tree Bindings > > + > > +maintainers: > > + - Nobuhiro Iwamatsu > > + > > +description: |+ > > + Toshiba Visconti5 SoC PCIe host controller is based on the Synopsys DesignWare PCIe IP. > > + > > +allOf: > > + - $ref: /schemas/pci/pci-bus.yaml# > > + > > +properties: > > + compatible: > > + const: toshiba,visconti-pcie > > + > > + reg: > > + items: > > + - description: Data Bus Interface (DBI) registers. > > + - description: PCIe configuration space region. > > + - description: Visconti specific additional registers. > > + - description: Visconti specific SMU registers > > + - description: Visconti specific memory protection unit registers (MPU) > > + > > + reg-names: > > + items: > > + - const: dbi > > + - const: config > > + - const: ulreg > > + - const: smu > > + - const: mpu > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: PCIe reference clock > > + - description: PCIe system clock > > + - description: Auxiliary clock > > + > > + clock-names: > > + items: > > + - const: pcie_refclk > > + - const: sysclk > > + - const: auxclk > > + > > + num-lanes: > > + const: 2 > > + > > + num-viewport: > > + const: 8 > > Drop this, we detect this now. > OK, I will drop this. > > + > > +required: > > Drop everything that pci-bus.yaml already requires. OK, I will check pci-bus.yaml, and update this. > > > + - reg > > + - reg-names > > + - interrupts > > + - "#address-cells" > > + - "#size-cells" > > + - "#interrupt-cells" > > + - interrupt-map > > + - interrupt-map-mask > > + - ranges > > + - bus-range > > If you support 0-0xff, there's no need for this to be required. > OK, this device supports 0x0 -0xff, I will drop. > > + - device_type > > + - num-lanes > > + - num-viewport > > + - clocks > > + - clock-names > > + - max-link-speed > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + pcie: pcie@28400000 { > > + compatible = "toshiba,visconti-pcie"; > > + reg = <0x0 0x28400000 0x0 0x00400000>, > > + <0x0 0x70000000 0x0 0x10000000>, > > + <0x0 0x28050000 0x0 0x00010000>, > > + <0x0 0x24200000 0x0 0x00002000>, > > + <0x0 0x24162000 0x0 0x00001000>; > > + reg-names = "dbi", "config", "ulreg", "smu", "mpu"; > > + device_type = "pci"; > > + bus-range = <0x00 0xff>; > > + num-lanes = <2>; > > + num-viewport = <8>; > > + > > + #address-cells = <3>; > > + #size-cells = <2>; > > + #interrupt-cells = <1>; > > + ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000>, > > + <0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>; > > + interrupts = ; > > + interrupt-names = "intr"; > > + interrupt-map-mask = <0 0 0 7>; > > + interrupt-map = > > + <0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH > > + 0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH > > + 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH > > + 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>; > > + clock-names = "pcie_refclk", "sysclk", "auxclk"; > > + max-link-speed = <2>; > > + > > + status = "disabled"; > > Don't show status in examples. OK, I will drop. > > > + }; > > + }; > > +... > > -- > > 2.30.0.rc2 > > > Best regards, Nobuhiro From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88E7FC433B4 for ; Thu, 8 Apr 2021 06:39:17 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2C65E61139 for ; Thu, 8 Apr 2021 06:39:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2C65E61139 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=toshiba.co.jp Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=th+wl9mzFjQS77eg9Wgs9FNlCRBPEOCNoq4gwQjIoSg=; b=F937sJmfP6DLaB4RPzURVx+wd hTCk8BI91bDazMnEVV5Whxd3WIRcQWoVzJc4N4qx0TG1S3GVIemh2wSNaGImCCHRm4j3BkQRPcuJ3 eVGd6inEf+1s/9rgseYN1WJ75lrTGuawRuC6FaRxwxQldwVBQHVYh+3/10Lfyux9jLnn5llGKgYgE DBqheqOC/1ogbtfDe+A6GUCC+PkePOeOpaXvPOc0rsdMYm1L9jd1IWXnur4csNX1ZNnNBZZmMUIu1 nAasEy137IRFOFet3LsnGSvYXfndHEVYlsAcqSavq7rHOTACMtifI+gkImfM6NEaHDgS/+5yFIePg kVNFcaneg==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lUOIZ-0076fp-Ha; Thu, 08 Apr 2021 06:37:51 +0000 Received: from mo-csw1116.securemx.jp ([210.130.202.158] helo=mo-csw.securemx.jp) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lUOIS-0076eN-Bs for linux-arm-kernel@lists.infradead.org; Thu, 08 Apr 2021 06:37:49 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1116) id 1386bNU3022923; Thu, 8 Apr 2021 15:37:23 +0900 X-Iguazu-Qid: 2wHHssSnbVqCDS96L2 X-Iguazu-QSIG: v=2; s=0; t=1617863843; q=2wHHssSnbVqCDS96L2; m=MK+itwrSUtN910qMWIa57PTH69k5sGpQgX66utEmjMI= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1111) id 1386bMme023272 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Thu, 8 Apr 2021 15:37:23 +0900 Received: from enc02.toshiba.co.jp (enc02.toshiba.co.jp [61.202.160.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by imx12-a.toshiba.co.jp (Postfix) with ESMTPS id 580FA1000C8; Thu, 8 Apr 2021 15:37:22 +0900 (JST) Received: from hop101.toshiba.co.jp ([133.199.85.107]) by enc02.toshiba.co.jp with ESMTP id 1386bLhH021840; Thu, 8 Apr 2021 15:37:22 +0900 Date: Thu, 8 Apr 2021 15:37:19 +0900 From: Nobuhiro Iwamatsu To: Rob Herring Cc: Bjorn Helgaas , Lorenzo Pieralisi , PCI , Punit Agrawal , yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 1/3] dt-bindings: pci: Add DT binding for Toshiba Visconti PCIe controller X-TSB-HOP: ON Message-ID: <20210408063719.jxh27ez375ezx3dc@toshiba.co.jp> References: <20210407031839.386088-1-nobuhiro1.iwamatsu@toshiba.co.jp> <20210407031839.386088-2-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210408_073745_036837_C588C423 X-CRM114-Status: GOOD ( 25.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Thanks for your review. On Wed, Apr 07, 2021 at 08:18:58AM -0500, Rob Herring wrote: > On Tue, Apr 6, 2021 at 10:19 PM Nobuhiro Iwamatsu > wrote: > > > > This commit adds the Device Tree binding documentation that allows > > to describe the PCIe controller found in Toshiba Visconti SoCs. > > > > Signed-off-by: Nobuhiro Iwamatsu > > --- > > .../bindings/pci/toshiba,visconti-pcie.yaml | 121 ++++++++++++++++++ > > 1 file changed, 121 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml > > > > diff --git a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml > > new file mode 100644 > > index 000000000000..8ab60c235007 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml > > @@ -0,0 +1,121 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Toshiba Visconti5 SoC PCIe Host Controller Device Tree Bindings > > + > > +maintainers: > > + - Nobuhiro Iwamatsu > > + > > +description: |+ > > + Toshiba Visconti5 SoC PCIe host controller is based on the Synopsys DesignWare PCIe IP. > > + > > +allOf: > > + - $ref: /schemas/pci/pci-bus.yaml# > > + > > +properties: > > + compatible: > > + const: toshiba,visconti-pcie > > + > > + reg: > > + items: > > + - description: Data Bus Interface (DBI) registers. > > + - description: PCIe configuration space region. > > + - description: Visconti specific additional registers. > > + - description: Visconti specific SMU registers > > + - description: Visconti specific memory protection unit registers (MPU) > > + > > + reg-names: > > + items: > > + - const: dbi > > + - const: config > > + - const: ulreg > > + - const: smu > > + - const: mpu > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + items: > > + - description: PCIe reference clock > > + - description: PCIe system clock > > + - description: Auxiliary clock > > + > > + clock-names: > > + items: > > + - const: pcie_refclk > > + - const: sysclk > > + - const: auxclk > > + > > + num-lanes: > > + const: 2 > > + > > + num-viewport: > > + const: 8 > > Drop this, we detect this now. > OK, I will drop this. > > + > > +required: > > Drop everything that pci-bus.yaml already requires. OK, I will check pci-bus.yaml, and update this. > > > + - reg > > + - reg-names > > + - interrupts > > + - "#address-cells" > > + - "#size-cells" > > + - "#interrupt-cells" > > + - interrupt-map > > + - interrupt-map-mask > > + - ranges > > + - bus-range > > If you support 0-0xff, there's no need for this to be required. > OK, this device supports 0x0 -0xff, I will drop. > > + - device_type > > + - num-lanes > > + - num-viewport > > + - clocks > > + - clock-names > > + - max-link-speed > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + pcie: pcie@28400000 { > > + compatible = "toshiba,visconti-pcie"; > > + reg = <0x0 0x28400000 0x0 0x00400000>, > > + <0x0 0x70000000 0x0 0x10000000>, > > + <0x0 0x28050000 0x0 0x00010000>, > > + <0x0 0x24200000 0x0 0x00002000>, > > + <0x0 0x24162000 0x0 0x00001000>; > > + reg-names = "dbi", "config", "ulreg", "smu", "mpu"; > > + device_type = "pci"; > > + bus-range = <0x00 0xff>; > > + num-lanes = <2>; > > + num-viewport = <8>; > > + > > + #address-cells = <3>; > > + #size-cells = <2>; > > + #interrupt-cells = <1>; > > + ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000>, > > + <0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>; > > + interrupts = ; > > + interrupt-names = "intr"; > > + interrupt-map-mask = <0 0 0 7>; > > + interrupt-map = > > + <0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH > > + 0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH > > + 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH > > + 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>; > > + clock-names = "pcie_refclk", "sysclk", "auxclk"; > > + max-link-speed = <2>; > > + > > + status = "disabled"; > > Don't show status in examples. OK, I will drop. > > > + }; > > + }; > > +... > > -- > > 2.30.0.rc2 > > > Best regards, Nobuhiro _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel