From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sean Anderson Date: Thu, 8 Apr 2021 22:13:12 -0400 Subject: [PATCH v3 10/11] riscv: k210: Use AI as the parent clock of aisram, not PLL1 In-Reply-To: <20210409021313.433558-1-seanga2@gmail.com> References: <20210409021313.433558-1-seanga2@gmail.com> Message-ID: <20210409021313.433558-11-seanga2@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Testing showed that disabling AI while leaving PLL1 enabled disabled the aisram. This suggests that AI is a more appropriate clock for that ram bank. Signed-off-by: Sean Anderson --- (no changes since v2) Changes in v2: - New arch/riscv/dts/k210.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi index 2032f1e5c2..75e101530b 100644 --- a/arch/riscv/dts/k210.dtsi +++ b/arch/riscv/dts/k210.dtsi @@ -89,7 +89,7 @@ reg-names = "sram0", "sram1", "aisram"; clocks = <&sysclk K210_CLK_SRAM0>, <&sysclk K210_CLK_SRAM1>, - <&sysclk K210_CLK_PLL1>; + <&sysclk K210_CLK_AI>; clock-names = "sram0", "sram1", "aisram"; u-boot,dm-pre-reloc; }; -- 2.31.0