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[88.21.201.17]) by smtp.gmail.com with ESMTPSA id a27sm717738ejk.80.2021.04.08.23.24.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Apr 2021 23:24:03 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [RFC PATCH-for-6.1 0/9] hw/clock: Strengthen machine (non-qdev) clock propagation Date: Fri, 9 Apr 2021 08:23:52 +0200 Message-Id: <20210409062401.2350436-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-x532.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Peter Maydell , Luc Michel , Eduardo Habkost , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi Damian, Luc, Peter.=0D =0D I've been debugging some odd issue with the clocks:=0D a clock created in the machine (IOW, not a qdev clock) isn't=0D always resetted, thus propagating its value.=0D "not always" is the odd part. In the MPS2 board, the machine=0D clock is propagated. Apparently because the peripherals are=0D created directly in the machine_init() handler. When moving=0D them out in a SoC QOM container, the clock isn't... I'm still=0D having hard time to understand what is going on.=0D =0D Alternatively I tried to strengthen the clock API by reducing=0D the clock creation in 2 cases: machine/device. This way clocks=0D aren't left dangling around alone. The qdev clocks are properly=0D resetted, and for the machine clocks I register a generic reset=0D handler. This way is safer, but I don't think we want to keep=0D adding generic reset handlers, instead we'd like to remove them.=0D =0D I'll keep debugging to understand. Meanwhile posting this series=0D as RFC to get feedback on the approach and start discussing on=0D this issue.=0D =0D Regards,=0D =0D Phil.=0D =0D Philippe Mathieu-Daud=C3=A9 (9):=0D hw/core/clock: Increase clock propagation trace events verbosity=0D hw/core/machine: Add machine_create_constant_clock() helper=0D hw/arm: Use new machine_create_constant_clock() helper=0D hw/mips: Use new machine_create_constant_clock() helper=0D hw/core/qdev-clock: Add qdev_ground_clock() helper=0D hw/misc/bcm2835_cprman: Use qdev_ground_clock() helper=0D hw/misc/bcm2835_cprman: Feed 'xosc' from the board=0D hw/clock: Declare clock_new() internally=0D hw/core/machine: Reset machine clocks using qemu_register_reset()=0D =0D hw/core/clock-internal.h | 32 ++++++++++++++++++++++++++++++++=0D include/hw/boards.h | 17 +++++++++++++++++=0D include/hw/clock.h | 13 -------------=0D include/hw/misc/bcm2835_cprman.h | 2 --=0D include/hw/qdev-clock.h | 9 +++++++++=0D hw/arm/bcm2835_peripherals.c | 1 +=0D hw/arm/bcm2836.c | 1 +=0D hw/arm/mps2-tz.c | 6 ++----=0D hw/arm/mps2.c | 3 +--=0D hw/arm/musca.c | 6 ++----=0D hw/arm/raspi.c | 4 ++++=0D hw/core/clock.c | 9 ++++++++-=0D hw/core/machine.c | 20 ++++++++++++++++++++=0D hw/core/qdev-clock.c | 12 ++++++++++++=0D hw/mips/fuloong2e.c | 4 ++--=0D hw/mips/jazz.c | 6 +++---=0D hw/mips/loongson3_virt.c | 4 ++--=0D hw/mips/mipssim.c | 7 ++++---=0D hw/misc/bcm2835_cprman.c | 12 +++---------=0D MAINTAINERS | 1 +=0D hw/core/trace-events | 3 ++-=0D 21 files changed, 126 insertions(+), 46 deletions(-)=0D create mode 100644 hw/core/clock-internal.h=0D =0D -- =0D 2.26.3=0D =0D