From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92B89C43460 for ; Fri, 9 Apr 2021 06:52:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5DB82610C8 for ; Fri, 9 Apr 2021 06:52:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233524AbhDIGwm (ORCPT ); Fri, 9 Apr 2021 02:52:42 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:59593 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233434AbhDIGwT (ORCPT ); Fri, 9 Apr 2021 02:52:19 -0400 X-Originating-IP: 81.185.169.105 Received: from localhost.localdomain (105.169.185.81.rev.sfr.net [81.185.169.105]) (Authenticated sender: alex@ghiti.fr) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id E01E42000D; Fri, 9 Apr 2021 06:51:26 +0000 (UTC) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org Cc: Vitaly Wool , Alexandre Ghiti Subject: [PATCH v7] RISC-V: enable XIP Date: Fri, 9 Apr 2021 02:51:15 -0400 Message-Id: <20210409065115.11054-1-alex@ghiti.fr> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vitaly Wool Introduce XIP (eXecute In Place) support for RISC-V platforms. It allows code to be executed directly from non-volatile storage directly addressable by the CPU, such as QSPI NOR flash which can be found on many RISC-V platforms. This makes way for significant optimization of RAM footprint. The XIP kernel is not compressed since it has to run directly from flash, so it will occupy more space on the non-volatile storage. The physical flash address used to link the kernel object files and for storing it has to be known at compile time and is represented by a Kconfig option. XIP on RISC-V will for the time being only work on MMU-enabled kernels. Signed-off-by: Alexandre Ghiti [ Rebase on top of "Move kernel mapping outside the linear mapping ] Signed-off-by: Vitaly Wool --- Changes in v2: - dedicated macro for XIP address fixup when MMU is not enabled yet o both for 32-bit and 64-bit RISC-V - SP is explicitly set to a safe place in RAM before __copy_data call - removed redundant alignment requirements in vmlinux-xip.lds.S - changed long -> uintptr_t typecast in __XIP_FIXUP macro. Changes in v3: - rebased against latest for-next - XIP address fixup macro now takes an argument - SMP related fixes Changes in v4: - rebased against the current for-next - less #ifdef's in C/ASM code - dedicated XIP_FIXUP_OFFSET assembler macro in head.S - C-specific definitions moved into #ifndef __ASSEMBLY__ - Fixed multi-core boot Changes in v5: - fixed build error for non-XIP kernels Changes in v6: - XIP_PHYS_RAM_BASE config option renamed to PHYS_RAM_BASE - added PHYS_RAM_BASE_FIXED config flag to allow usage of PHYS_RAM_BASE in non-XIP configurations if needed - XIP_FIXUP macro rewritten with a tempoarary variable to avoid side effects - fixed crash for non-XIP kernels that don't use built-in DTB Changes in v7: - Fix pfn_base that required FIXUP - Fix copy_data which lacked + 1 in size to copy - Fix pfn_valid for FLATMEM - Rebased on top of "Move kernel mapping outside the linear mapping": this is the biggest change and affected mm/init.c, kernel/vmlinux-xip.lds.S and include/asm/pgtable.h: XIP kernel is now mapped like 'normal' kernel at the end of the address space. arch/riscv/Kconfig | 51 ++++++++++- arch/riscv/Makefile | 8 +- arch/riscv/boot/Makefile | 13 +++ arch/riscv/include/asm/page.h | 28 ++++++ arch/riscv/include/asm/pgtable.h | 25 +++++- arch/riscv/kernel/head.S | 46 +++++++++- arch/riscv/kernel/head.h | 3 + arch/riscv/kernel/setup.c | 10 ++- arch/riscv/kernel/vmlinux-xip.lds.S | 133 ++++++++++++++++++++++++++++ arch/riscv/kernel/vmlinux.lds.S | 6 ++ arch/riscv/mm/init.c | 118 ++++++++++++++++++++++-- 11 files changed, 424 insertions(+), 17 deletions(-) create mode 100644 arch/riscv/kernel/vmlinux-xip.lds.S diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 8ea60a0a19ae..4d0153805927 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -28,7 +28,7 @@ config RISCV select ARCH_HAS_PTE_SPECIAL select ARCH_HAS_SET_DIRECT_MAP select ARCH_HAS_SET_MEMORY - select ARCH_HAS_STRICT_KERNEL_RWX if MMU + select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT @@ -441,7 +441,7 @@ config EFI_STUB config EFI bool "UEFI runtime support" - depends on OF + depends on OF && !XIP_KERNEL select LIBFDT select UCS2_STRING select EFI_PARAMS_FROM_FDT @@ -465,11 +465,56 @@ config STACKPROTECTOR_PER_TASK def_bool y depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS +config PHYS_RAM_BASE_FIXED + bool "Explicitly specified physical RAM address" + default n + +config PHYS_RAM_BASE + hex "Platform Physical RAM address" + depends on PHYS_RAM_BASE_FIXED + default "0x80000000" + help + This is the physical address of RAM in the system. It has to be + explicitly specified to run early relocations of read-write data + from flash to RAM. + +config XIP_KERNEL + bool "Kernel Execute-In-Place from ROM" + depends on MMU + select PHYS_RAM_BASE_FIXED + help + Execute-In-Place allows the kernel to run from non-volatile storage + directly addressable by the CPU, such as NOR flash. This saves RAM + space since the text section of the kernel is not loaded from flash + to RAM. Read-write sections, such as the data section and stack, + are still copied to RAM. The XIP kernel is not compressed since + it has to run directly from flash, so it will take more space to + store it. The flash address used to link the kernel object files, + and for storing it, is configuration dependent. Therefore, if you + say Y here, you must know the proper physical address where to + store the kernel image depending on your own flash memory usage. + + Also note that the make target becomes "make xipImage" rather than + "make zImage" or "make Image". The final kernel binary to put in + ROM memory will be arch/riscv/boot/xipImage. + + If unsure, say N. + +config XIP_PHYS_ADDR + hex "XIP Kernel Physical Location" + depends on XIP_KERNEL + default "0x21000000" + help + This is the physical address in your flash memory the kernel will + be linked for and stored to. This address is dependent on your + own flash usage. + endmenu config BUILTIN_DTB - def_bool n + bool depends on OF + default y if XIP_KERNEL menu "Power management options" diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 1368d943f1f3..8fcbec03974d 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -82,7 +82,11 @@ CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS) # Default target when executing plain make boot := arch/riscv/boot +ifeq ($(CONFIG_XIP_KERNEL),y) +KBUILD_IMAGE := $(boot)/xipImage +else KBUILD_IMAGE := $(boot)/Image.gz +endif head-y := arch/riscv/kernel/head.o @@ -95,12 +99,14 @@ PHONY += vdso_install vdso_install: $(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@ +ifneq ($(CONFIG_XIP_KERNEL),y) ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy) KBUILD_IMAGE := $(boot)/loader.bin else KBUILD_IMAGE := $(boot)/Image.gz endif -BOOT_TARGETS := Image Image.gz loader loader.bin +endif +BOOT_TARGETS := Image Image.gz loader loader.bin xipImage all: $(notdir $(KBUILD_IMAGE)) diff --git a/arch/riscv/boot/Makefile b/arch/riscv/boot/Makefile index 03404c84f971..6bf299f70c27 100644 --- a/arch/riscv/boot/Makefile +++ b/arch/riscv/boot/Makefile @@ -17,8 +17,21 @@ KCOV_INSTRUMENT := n OBJCOPYFLAGS_Image :=-O binary -R .note -R .note.gnu.build-id -R .comment -S +OBJCOPYFLAGS_xipImage :=-O binary -R .note -R .note.gnu.build-id -R .comment -S targets := Image Image.* loader loader.o loader.lds loader.bin +targets := Image Image.* loader loader.o loader.lds loader.bin xipImage + +ifeq ($(CONFIG_XIP_KERNEL),y) + +quiet_cmd_mkxip = $(quiet_cmd_objcopy) +cmd_mkxip = $(cmd_objcopy) + +$(obj)/xipImage: vmlinux FORCE + $(call if_changed,mkxip) + @$(kecho) ' Physical Address of xipImage: $(CONFIG_XIP_PHYS_ADDR)' + +endif $(obj)/Image: vmlinux FORCE $(call if_changed,objcopy) diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h index 22cfb2be60dc..6fe0ff8c8fa9 100644 --- a/arch/riscv/include/asm/page.h +++ b/arch/riscv/include/asm/page.h @@ -91,6 +91,9 @@ typedef struct page *pgtable_t; #ifdef CONFIG_MMU extern unsigned long va_pa_offset; extern unsigned long va_kernel_pa_offset; +#ifdef CONFIG_XIP_KERNEL +extern unsigned long va_kernel_xip_pa_offset; +#endif extern unsigned long pfn_base; #define ARCH_PFN_OFFSET (pfn_base) #else @@ -102,11 +105,29 @@ extern unsigned long pfn_base; extern unsigned long kernel_virt_addr; #define linear_mapping_pa_to_va(x) ((void *)((unsigned long)(x) + va_pa_offset)) +#ifdef CONFIG_XIP_KERNEL +#define kernel_mapping_pa_to_va(y) ({ \ + unsigned long _y = y; \ + (_y >= CONFIG_PHYS_RAM_BASE) ? \ + (void *)((unsigned long)(_y) + va_kernel_pa_offset + XIP_OFFSET) : \ + (void *)((unsigned long)(_y) + va_kernel_xip_pa_offset); \ + }) +#else #define kernel_mapping_pa_to_va(x) ((void *)((unsigned long)(x) + va_kernel_pa_offset)) +#endif #define __pa_to_va_nodebug(x) linear_mapping_pa_to_va(x) #define linear_mapping_va_to_pa(x) ((unsigned long)(x) - va_pa_offset) +#ifdef CONFIG_XIP_KERNEL +#define kernel_mapping_va_to_pa(y) ({ \ + unsigned long _y = y; \ + (_y < kernel_virt_addr + XIP_OFFSET) ? \ + ((unsigned long)(_y) - va_kernel_xip_pa_offset) : \ + ((unsigned long)(_y) - va_kernel_pa_offset - XIP_OFFSET); \ + }) +#else #define kernel_mapping_va_to_pa(x) ((unsigned long)(x) - va_kernel_pa_offset) +#endif #define __va_to_pa_nodebug(x) ({ \ unsigned long _x = x; \ (_x < kernel_virt_addr) ? \ @@ -139,9 +160,16 @@ extern phys_addr_t __phys_addr_symbol(unsigned long x); #define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) #ifdef CONFIG_FLATMEM +#ifdef CONFIG_XIP_KERNEL +#define pfn_valid(pfn) \ + ((((pfn) >= ARCH_PFN_OFFSET) && (((pfn) - ARCH_PFN_OFFSET) < max_mapnr)) || \ + ((pfn) >= PFN_DOWN(CONFIG_XIP_PHYS_ADDR) && \ + (((pfn) - PFN_DOWN(CONFIG_XIP_PHYS_ADDR)) < XIP_OFFSET))) +#else #define pfn_valid(pfn) \ (((pfn) >= ARCH_PFN_OFFSET) && (((pfn) - ARCH_PFN_OFFSET) < max_mapnr)) #endif +#endif #endif /* __ASSEMBLY__ */ diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 80e63a93e903..c2dc4f83eed8 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -64,6 +64,19 @@ #define FIXADDR_SIZE PGDIR_SIZE #endif #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) + +#ifdef CONFIG_XIP_KERNEL +#define XIP_OFFSET SZ_8M +#define XIP_FIXUP(addr) ({ \ + uintptr_t __a = (uintptr_t)(addr); \ + (__a >= CONFIG_XIP_PHYS_ADDR && __a < CONFIG_XIP_PHYS_ADDR + SZ_16M) ? \ + __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\ + __a; \ + }) +#else +#define XIP_FIXUP(addr) (addr) +#endif /* CONFIG_XIP_KERNEL */ + #endif #ifndef __ASSEMBLY__ @@ -499,8 +512,16 @@ static inline int ptep_clear_flush_young(struct vm_area_struct *vma, #define kern_addr_valid(addr) (1) /* FIXME */ extern char _start[]; -extern void *dtb_early_va; -extern uintptr_t dtb_early_pa; +extern void *_dtb_early_va; +extern uintptr_t _dtb_early_pa; +#if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU) +#define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va)) +#define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa)) +#else +#define dtb_early_va _dtb_early_va +#define dtb_early_pa _dtb_early_pa +#endif /* CONFIG_XIP_KERNEL */ + void setup_bootmem(void); void paging_init(void); void misc_mem_init(void); diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 6cb05f22e52a..89cc58ab52b4 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -9,11 +9,23 @@ #include #include #include +#include #include #include #include #include "efi-header.S" +#ifdef CONFIG_XIP_KERNEL +.macro XIP_FIXUP_OFFSET reg + REG_L t0, _xip_fixup + add \reg, \reg, t0 +.endm +_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET +#else +.macro XIP_FIXUP_OFFSET reg +.endm +#endif /* CONFIG_XIP_KERNEL */ + __HEAD ENTRY(_start) /* @@ -70,6 +82,7 @@ pe_head_start: relocate: /* Relocate return address */ la a1, kernel_virt_addr + XIP_FIXUP_OFFSET a1 REG_L a1, 0(a1) la a2, _start sub a1, a1, a2 @@ -92,6 +105,7 @@ relocate: * to ensure the new translations are in use. */ la a0, trampoline_pg_dir + XIP_FIXUP_OFFSET a0 srl a0, a0, PAGE_SHIFT or a0, a0, a1 sfence.vma @@ -145,7 +159,9 @@ secondary_start_sbi: slli a3, a0, LGREG la a4, __cpu_up_stack_pointer + XIP_FIXUP_OFFSET a4 la a5, __cpu_up_task_pointer + XIP_FIXUP_OFFSET a5 add a4, a3, a4 add a5, a3, a5 REG_L sp, (a4) @@ -157,6 +173,7 @@ secondary_start_common: #ifdef CONFIG_MMU /* Enable virtual memory and relocate to virtual address */ la a0, swapper_pg_dir + XIP_FIXUP_OFFSET a0 call relocate #endif call setup_trap_vector @@ -237,12 +254,33 @@ pmp_done: .Lgood_cores: #endif +#ifndef CONFIG_XIP_KERNEL /* Pick one hart to run the main boot sequence */ la a3, hart_lottery li a2, 1 amoadd.w a3, a2, (a3) bnez a3, .Lsecondary_start +#else + /* hart_lottery in flash contains a magic number */ + la a3, hart_lottery + mv a2, a3 + XIP_FIXUP_OFFSET a2 + lw t1, (a3) + amoswap.w t0, t1, (a2) + /* first time here if hart_lottery in RAM is not set */ + beq t0, t1, .Lsecondary_start + + la sp, _end + THREAD_SIZE + XIP_FIXUP_OFFSET sp + mv s0, a0 + call __copy_data + + /* Restore a0 copy */ + mv a0, s0 +#endif + +#ifndef CONFIG_XIP_KERNEL /* Clear BSS for flat non-ELF images */ la a3, __bss_start la a4, __bss_stop @@ -252,15 +290,18 @@ clear_bss: add a3, a3, RISCV_SZPTR blt a3, a4, clear_bss clear_bss_done: - +#endif /* Save hart ID and DTB physical address */ mv s0, a0 mv s1, a1 + la a2, boot_cpu_hartid + XIP_FIXUP_OFFSET a2 REG_S a0, (a2) /* Initialize page tables and relocate to virtual addresses */ la sp, init_thread_union + THREAD_SIZE + XIP_FIXUP_OFFSET sp #ifdef CONFIG_BUILTIN_DTB la a0, __dtb_start #else @@ -269,6 +310,7 @@ clear_bss_done: call setup_vm #ifdef CONFIG_MMU la a0, early_pg_dir + XIP_FIXUP_OFFSET a0 call relocate #endif /* CONFIG_MMU */ @@ -293,7 +335,9 @@ clear_bss_done: slli a3, a0, LGREG la a1, __cpu_up_stack_pointer + XIP_FIXUP_OFFSET a1 la a2, __cpu_up_task_pointer + XIP_FIXUP_OFFSET a2 add a1, a3, a1 add a2, a3, a2 diff --git a/arch/riscv/kernel/head.h b/arch/riscv/kernel/head.h index b48dda3d04f6..aabbc3ac3e48 100644 --- a/arch/riscv/kernel/head.h +++ b/arch/riscv/kernel/head.h @@ -12,6 +12,9 @@ extern atomic_t hart_lottery; asmlinkage void do_page_fault(struct pt_regs *regs); asmlinkage void __init setup_vm(uintptr_t dtb_pa); +#ifdef CONFIG_XIP_KERNEL +asmlinkage void __init __copy_data(void); +#endif extern void *__cpu_up_stack_pointer[]; extern void *__cpu_up_task_pointer[]; diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 30e4af0fd50c..2ddf654c72bb 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -50,7 +50,11 @@ struct screen_info screen_info __section(".data") = { * This is used before the kernel initializes the BSS so it can't be in the * BSS. */ -atomic_t hart_lottery __section(".sdata"); +atomic_t hart_lottery __section(".sdata") +#ifdef CONFIG_XIP_KERNEL += ATOMIC_INIT(0xC001BEEF) +#endif +; unsigned long boot_cpu_hartid; static DEFINE_PER_CPU(struct cpu, cpu_devices); @@ -254,7 +258,7 @@ void __init setup_arch(char **cmdline_p) #if IS_ENABLED(CONFIG_BUILTIN_DTB) unflatten_and_copy_device_tree(); #else - if (early_init_dt_verify(__va(dtb_early_pa))) + if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa)))) unflatten_device_tree(); else pr_err("No DTB found in kernel mappings\n"); @@ -266,7 +270,7 @@ void __init setup_arch(char **cmdline_p) if (IS_ENABLED(CONFIG_STRICT_KERNEL_RWX)) protect_kernel_text_data(); -#if defined(CONFIG_64BIT) && defined(CONFIG_MMU) +#if defined(CONFIG_64BIT) && defined(CONFIG_MMU) && !defined(CONFIG_XIP_KERNEL) protect_kernel_linear_mapping_text_rodata(); #endif diff --git a/arch/riscv/kernel/vmlinux-xip.lds.S b/arch/riscv/kernel/vmlinux-xip.lds.S new file mode 100644 index 000000000000..4b29b9917f99 --- /dev/null +++ b/arch/riscv/kernel/vmlinux-xip.lds.S @@ -0,0 +1,133 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2012 Regents of the University of California + * Copyright (C) 2017 SiFive + * Copyright (C) 2020 Vitaly Wool, Konsulko AB + */ + +#include +#define LOAD_OFFSET KERNEL_LINK_ADDR +/* No __ro_after_init data in the .rodata section - which will always be ro */ +#define RO_AFTER_INIT_DATA + +#include +#include +#include +#include +#include + +OUTPUT_ARCH(riscv) +ENTRY(_start) + +jiffies = jiffies_64; + +SECTIONS +{ + /* Beginning of code and text segment */ + . = LOAD_OFFSET; + _xiprom = .; + _start = .; + HEAD_TEXT_SECTION + INIT_TEXT_SECTION(PAGE_SIZE) + /* we have to discard exit text and such at runtime, not link time */ + .exit.text : + { + EXIT_TEXT + } + + .text : { + _text = .; + _stext = .; + TEXT_TEXT + SCHED_TEXT + CPUIDLE_TEXT + LOCK_TEXT + KPROBES_TEXT + ENTRY_TEXT + IRQENTRY_TEXT + SOFTIRQENTRY_TEXT + *(.fixup) + _etext = .; + } + RO_DATA(L1_CACHE_BYTES) + .srodata : { + *(.srodata*) + } + .init.rodata : { + INIT_SETUP(16) + INIT_CALLS + CON_INITCALL + INIT_RAM_FS + } + _exiprom = .; /* End of XIP ROM area */ + + +/* + * From this point, stuff is considered writable and will be copied to RAM + */ + __data_loc = ALIGN(16); /* location in file */ + . = LOAD_OFFSET + XIP_OFFSET; /* location in memory */ + + _sdata = .; /* Start of data section */ + _data = .; + RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) + _edata = .; + __start_ro_after_init = .; + .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) { + *(.data..ro_after_init) + } + __end_ro_after_init = .; + + . = ALIGN(PAGE_SIZE); + __init_begin = .; + .init.data : { + INIT_DATA + } + .exit.data : { + EXIT_DATA + } + . = ALIGN(8); + __soc_early_init_table : { + __soc_early_init_table_start = .; + KEEP(*(__soc_early_init_table)) + __soc_early_init_table_end = .; + } + __soc_builtin_dtb_table : { + __soc_builtin_dtb_table_start = .; + KEEP(*(__soc_builtin_dtb_table)) + __soc_builtin_dtb_table_end = .; + } + PERCPU_SECTION(L1_CACHE_BYTES) + + . = ALIGN(PAGE_SIZE); + __init_end = .; + + .sdata : { + __global_pointer$ = . + 0x800; + *(.sdata*) + *(.sbss*) + } + + BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0) + EXCEPTION_TABLE(0x10) + + .rel.dyn : AT(ADDR(.rel.dyn) - LOAD_OFFSET) { + *(.rel.dyn*) + } + + /* + * End of copied data. We need a dummy section to get its LMA. + * Also located before final ALIGN() as trailing padding is not stored + * in the resulting binary file and useless to copy. + */ + .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { } + _edata_loc = LOADADDR(.data.endmark); + + . = ALIGN(PAGE_SIZE); + _end = .; + + STABS_DEBUG + DWARF_DEBUG + + DISCARDS +} diff --git a/arch/riscv/kernel/vmlinux.lds.S b/arch/riscv/kernel/vmlinux.lds.S index 0726c05e0336..0a59b65cf789 100644 --- a/arch/riscv/kernel/vmlinux.lds.S +++ b/arch/riscv/kernel/vmlinux.lds.S @@ -4,8 +4,13 @@ * Copyright (C) 2017 SiFive */ +#ifdef CONFIG_XIP_KERNEL +#include "vmlinux-xip.lds.S" +#else + #include #define LOAD_OFFSET KERNEL_LINK_ADDR + #include #include #include @@ -133,3 +138,4 @@ SECTIONS DISCARDS } +#endif /* CONFIG_XIP_KERNEL */ diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 093f3a96ecfc..9961573f9a55 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -27,6 +27,9 @@ unsigned long kernel_virt_addr = KERNEL_LINK_ADDR; EXPORT_SYMBOL(kernel_virt_addr); +#ifdef CONFIG_XIP_KERNEL +#define kernel_virt_addr (*((unsigned long *)XIP_FIXUP(&kernel_virt_addr))) +#endif unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; @@ -34,8 +37,8 @@ EXPORT_SYMBOL(empty_zero_page); extern char _start[]; #define DTB_EARLY_BASE_VA PGDIR_SIZE -void *dtb_early_va __initdata; -uintptr_t dtb_early_pa __initdata; +void *_dtb_early_va __initdata; +uintptr_t _dtb_early_pa __initdata; struct pt_alloc_ops { pte_t *(*get_pte_virt)(phys_addr_t pa); @@ -118,6 +121,10 @@ void __init setup_bootmem(void) phys_addr_t dram_end = memblock_end_of_DRAM(); phys_addr_t max_mapped_addr = __pa(~(ulong)0); +#ifdef CONFIG_XIP_KERNEL + vmlinux_start = __pa_symbol(&_sdata); +#endif + /* The maximal physical memory size is -PAGE_OFFSET. */ memblock_enforce_memory_limit(-PAGE_OFFSET); @@ -159,17 +166,44 @@ void __init setup_bootmem(void) memblock_allow_resize(); } +#ifdef CONFIG_XIP_KERNEL + +extern char _xiprom[], _exiprom[]; +extern char _sdata[], _edata[]; + +#endif /* CONFIG_XIP_KERNEL */ + #ifdef CONFIG_MMU -static struct pt_alloc_ops pt_ops; +static struct pt_alloc_ops _pt_ops; + +#ifdef CONFIG_XIP_KERNEL +#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&_pt_ops)) +#else +#define pt_ops _pt_ops +#endif /* Offset between linear mapping virtual address and kernel load address */ unsigned long va_pa_offset; EXPORT_SYMBOL(va_pa_offset); +#ifdef CONFIG_XIP_KERNEL +#define va_pa_offset (*((unsigned long *)XIP_FIXUP(&va_pa_offset))) +#endif /* Offset between kernel mapping virtual address and kernel load address */ unsigned long va_kernel_pa_offset; EXPORT_SYMBOL(va_kernel_pa_offset); +#ifdef CONFIG_XIP_KERNEL +#define va_kernel_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_pa_offset))) +#endif +unsigned long va_kernel_xip_pa_offset; +EXPORT_SYMBOL(va_kernel_xip_pa_offset); +#ifdef CONFIG_XIP_KERNEL +#define va_kernel_xip_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_xip_pa_offset))) +#endif unsigned long pfn_base; EXPORT_SYMBOL(pfn_base); +#ifdef CONFIG_XIP_KERNEL +#define pfn_base (*((unsigned long *)XIP_FIXUP(&pfn_base))) +#endif pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; @@ -177,6 +211,12 @@ pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); +#ifdef CONFIG_XIP_KERNEL +#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir)) +#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte)) +#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir)) +#endif /* CONFIG_XIP_KERNEL */ + void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot) { unsigned long addr = __fix_to_virt(idx); @@ -252,6 +292,12 @@ pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss; pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); +#ifdef CONFIG_XIP_KERNEL +#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd)) +#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd)) +#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd)) +#endif /* CONFIG_XIP_KERNEL */ + static pmd_t *__init get_pmd_virt_early(phys_addr_t pa) { /* Before MMU is enabled */ @@ -368,6 +414,19 @@ static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) return PMD_SIZE; } +#ifdef CONFIG_XIP_KERNEL +/* called from head.S with MMU off */ +asmlinkage void __init __copy_data(void) +{ + void *from = (void *)(&_sdata); + void *end = (void *)(&_end); + void *to = (void *)CONFIG_PHYS_RAM_BASE; + size_t sz = (size_t)(end - from + 1); + + memcpy(to, from, sz); +} +#endif + /* * setup_vm() is called from head.S with MMU-off. * @@ -387,7 +446,35 @@ static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) #endif uintptr_t load_pa, load_sz; +#ifdef CONFIG_XIP_KERNEL +#define load_pa (*((uintptr_t *)XIP_FIXUP(&load_pa))) +#define load_sz (*((uintptr_t *)XIP_FIXUP(&load_sz))) +#endif + +#ifdef CONFIG_XIP_KERNEL +uintptr_t xiprom, xiprom_sz; +#define xiprom_sz (*((uintptr_t *)XIP_FIXUP(&xiprom_sz))) +#define xiprom (*((uintptr_t *)XIP_FIXUP(&xiprom))) +static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size) +{ + uintptr_t va, end_va; + + /* Map the flash resident part */ + end_va = kernel_virt_addr + xiprom_sz; + for (va = kernel_virt_addr; va < end_va; va += map_size) + create_pgd_mapping(pgdir, va, + xiprom + (va - kernel_virt_addr), + map_size, PAGE_KERNEL_EXEC); + + /* Map the data in RAM */ + end_va = kernel_virt_addr + XIP_OFFSET + load_sz; + for (va = kernel_virt_addr + XIP_OFFSET; va < end_va; va += map_size) + create_pgd_mapping(pgdir, va, + load_pa + (va - (kernel_virt_addr + XIP_OFFSET)), + map_size, PAGE_KERNEL); +} +#else static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size) { uintptr_t va, end_va; @@ -398,16 +485,28 @@ static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size) load_pa + (va - kernel_virt_addr), map_size, PAGE_KERNEL_EXEC); } +#endif asmlinkage void __init setup_vm(uintptr_t dtb_pa) { - uintptr_t pa; + uintptr_t __maybe_unused pa; uintptr_t map_size; #ifndef __PAGETABLE_PMD_FOLDED pmd_t fix_bmap_spmd, fix_bmap_epmd; #endif + +#ifdef CONFIG_XIP_KERNEL + xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR; + xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom); + + load_pa = (uintptr_t)CONFIG_PHYS_RAM_BASE; + load_sz = (uintptr_t)(&_end) - (uintptr_t)(&_sdata); + + va_kernel_xip_pa_offset = kernel_virt_addr - xiprom; +#else load_pa = (uintptr_t)(&_start); load_sz = (uintptr_t)(&_end) - load_pa; +#endif va_pa_offset = PAGE_OFFSET - load_pa; va_kernel_pa_offset = kernel_virt_addr - load_pa; @@ -441,8 +540,13 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) /* Setup trampoline PGD and PMD */ create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr, (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE); +#ifdef CONFIG_XIP_KERNEL + create_pmd_mapping(trampoline_pmd, kernel_virt_addr, + xiprom, PMD_SIZE, PAGE_KERNEL_EXEC); +#else create_pmd_mapping(trampoline_pmd, kernel_virt_addr, load_pa, PMD_SIZE, PAGE_KERNEL_EXEC); +#endif #else /* Setup trampoline PGD */ create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr, @@ -474,7 +578,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) * whereas dtb_early_va will be used before setup_vm_final installs * the linear mapping. */ - dtb_early_va = kernel_mapping_pa_to_va(dtb_pa); + dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa)); #endif /* CONFIG_BUILTIN_DTB */ #else #ifndef CONFIG_BUILTIN_DTB @@ -486,7 +590,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL); dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1)); #else /* CONFIG_BUILTIN_DTB */ - dtb_early_va = kernel_mapping_pa_to_va(dtb_pa); + dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa)); #endif /* CONFIG_BUILTIN_DTB */ #endif dtb_early_pa = dtb_pa; @@ -522,7 +626,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) #endif } -#ifdef CONFIG_64BIT +#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL) void protect_kernel_linear_mapping_text_rodata(void) { unsigned long text_start = (unsigned long)lm_alias(_start); -- 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D450C433ED for ; Fri, 9 Apr 2021 08:13:41 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(Authenticated sender: alex@ghiti.fr) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id E01E42000D; Fri, 9 Apr 2021 06:51:26 +0000 (UTC) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org Cc: Vitaly Wool , Alexandre Ghiti Subject: [PATCH v7] RISC-V: enable XIP Date: Fri, 9 Apr 2021 02:51:15 -0400 Message-Id: <20210409065115.11054-1-alex@ghiti.fr> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210409_075131_997432_6825C15F X-CRM114-Status: GOOD ( 31.53 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RnJvbTogVml0YWx5IFdvb2wgPHZpdGFseS53b29sQGtvbnN1bGtvLmNvbT4KCkludHJvZHVjZSBY SVAgKGVYZWN1dGUgSW4gUGxhY2UpIHN1cHBvcnQgZm9yIFJJU0MtViBwbGF0Zm9ybXMuCkl0IGFs bG93cyBjb2RlIHRvIGJlIGV4ZWN1dGVkIGRpcmVjdGx5IGZyb20gbm9uLXZvbGF0aWxlIHN0b3Jh Z2UKZGlyZWN0bHkgYWRkcmVzc2FibGUgYnkgdGhlIENQVSwgc3VjaCBhcyBRU1BJIE5PUiBmbGFz aCB3aGljaCBjYW4KYmUgZm91bmQgb24gbWFueSBSSVNDLVYgcGxhdGZvcm1zLiBUaGlzIG1ha2Vz IHdheSBmb3Igc2lnbmlmaWNhbnQKb3B0aW1pemF0aW9uIG9mIFJBTSBmb290cHJpbnQuIFRoZSBY SVAga2VybmVsIGlzIG5vdCBjb21wcmVzc2VkCnNpbmNlIGl0IGhhcyB0byBydW4gZGlyZWN0bHkg ZnJvbSBmbGFzaCwgc28gaXQgd2lsbCBvY2N1cHkgbW9yZQpzcGFjZSBvbiB0aGUgbm9uLXZvbGF0 aWxlIHN0b3JhZ2UuIFRoZSBwaHlzaWNhbCBmbGFzaCBhZGRyZXNzIHVzZWQKdG8gbGluayB0aGUg a2VybmVsIG9iamVjdCBmaWxlcyBhbmQgZm9yIHN0b3JpbmcgaXQgaGFzIHRvIGJlIGtub3duCmF0 IGNvbXBpbGUgdGltZSBhbmQgaXMgcmVwcmVzZW50ZWQgYnkgYSBLY29uZmlnIG9wdGlvbi4KClhJ UCBvbiBSSVNDLVYgd2lsbCBmb3IgdGhlIHRpbWUgYmVpbmcgb25seSB3b3JrIG9uIE1NVS1lbmFi bGVkCmtlcm5lbHMuCgpTaWduZWQtb2ZmLWJ5OiBBbGV4YW5kcmUgR2hpdGkgPGFsZXhAZ2hpdGku ZnI+IFsgUmViYXNlIG9uIHRvcCBvZiAiTW92ZQprZXJuZWwgbWFwcGluZyBvdXRzaWRlIHRoZSBs aW5lYXIgbWFwcGluZ8KgXQpTaWduZWQtb2ZmLWJ5OiBWaXRhbHkgV29vbCA8dml0YWx5Lndvb2xA a29uc3Vsa28uY29tPgotLS0KCkNoYW5nZXMgaW4gdjI6Ci0gZGVkaWNhdGVkIG1hY3JvIGZvciBY SVAgYWRkcmVzcyBmaXh1cCB3aGVuIE1NVSBpcyBub3QgZW5hYmxlZCB5ZXQKICBvIGJvdGggZm9y IDMyLWJpdCBhbmQgNjQtYml0IFJJU0MtVgotIFNQIGlzIGV4cGxpY2l0bHkgc2V0IHRvIGEgc2Fm ZSBwbGFjZSBpbiBSQU0gYmVmb3JlIF9fY29weV9kYXRhIGNhbGwKLSByZW1vdmVkIHJlZHVuZGFu dCBhbGlnbm1lbnQgcmVxdWlyZW1lbnRzIGluIHZtbGludXgteGlwLmxkcy5TCi0gY2hhbmdlZCBs b25nIC0+IHVpbnRwdHJfdCB0eXBlY2FzdCBpbiBfX1hJUF9GSVhVUCBtYWNyby4KQ2hhbmdlcyBp biB2MzoKLSByZWJhc2VkIGFnYWluc3QgbGF0ZXN0IGZvci1uZXh0Ci0gWElQIGFkZHJlc3MgZml4 dXAgbWFjcm8gbm93IHRha2VzIGFuIGFyZ3VtZW50Ci0gU01QIHJlbGF0ZWQgZml4ZXMKQ2hhbmdl cyBpbiB2NDoKLSByZWJhc2VkIGFnYWluc3QgdGhlIGN1cnJlbnQgZm9yLW5leHQKLSBsZXNzICNp ZmRlZidzIGluIEMvQVNNIGNvZGUKLSBkZWRpY2F0ZWQgWElQX0ZJWFVQX09GRlNFVCBhc3NlbWJs ZXIgbWFjcm8gaW4gaGVhZC5TCi0gQy1zcGVjaWZpYyBkZWZpbml0aW9ucyBtb3ZlZCBpbnRvICNp Zm5kZWYgX19BU1NFTUJMWV9fCi0gRml4ZWQgbXVsdGktY29yZSBib290CkNoYW5nZXMgaW4gdjU6 Ci0gZml4ZWQgYnVpbGQgZXJyb3IgZm9yIG5vbi1YSVAga2VybmVscwpDaGFuZ2VzIGluIHY2Ogot IFhJUF9QSFlTX1JBTV9CQVNFIGNvbmZpZyBvcHRpb24gcmVuYW1lZCB0byBQSFlTX1JBTV9CQVNF Ci0gYWRkZWQgUEhZU19SQU1fQkFTRV9GSVhFRCBjb25maWcgZmxhZyB0byBhbGxvdyB1c2FnZSBv ZgogIFBIWVNfUkFNX0JBU0UgaW4gbm9uLVhJUCBjb25maWd1cmF0aW9ucyBpZiBuZWVkZWQKLSBY SVBfRklYVVAgbWFjcm8gcmV3cml0dGVuIHdpdGggYSB0ZW1wb2FyYXJ5IHZhcmlhYmxlIHRvIGF2 b2lkIHNpZGUKICBlZmZlY3RzCi0gZml4ZWQgY3Jhc2ggZm9yIG5vbi1YSVAga2VybmVscyB0aGF0 IGRvbid0IHVzZSBidWlsdC1pbiBEVEIKQ2hhbmdlcyBpbiB2NzoKLSBGaXggcGZuX2Jhc2UgdGhh dCByZXF1aXJlZCBGSVhVUAotIEZpeCBjb3B5X2RhdGEgd2hpY2ggbGFja2VkICsgMSBpbiBzaXpl IHRvIGNvcHkKLSBGaXggcGZuX3ZhbGlkIGZvciBGTEFUTUVNCi0gUmViYXNlZCBvbiB0b3Agb2Yg Ik1vdmUga2VybmVsIG1hcHBpbmcgb3V0c2lkZSB0aGUgbGluZWFyIG1hcHBpbmciOgogIHRoaXMg aXMgdGhlIGJpZ2dlc3QgY2hhbmdlIGFuZCBhZmZlY3RlZCBtbS9pbml0LmMsCiAga2VybmVsL3Zt bGludXgteGlwLmxkcy5TIGFuZCBpbmNsdWRlL2FzbS9wZ3RhYmxlLmg6IFhJUCBrZXJuZWwgaXMg bm93CiAgbWFwcGVkIGxpa2UgJ25vcm1hbCcga2VybmVsIGF0IHRoZSBlbmQgb2YgdGhlIGFkZHJl c3Mgc3BhY2UuCgogYXJjaC9yaXNjdi9LY29uZmlnICAgICAgICAgICAgICAgICAgfCAgNTEgKysr KysrKysrKy0KIGFyY2gvcmlzY3YvTWFrZWZpbGUgICAgICAgICAgICAgICAgIHwgICA4ICstCiBh cmNoL3Jpc2N2L2Jvb3QvTWFrZWZpbGUgICAgICAgICAgICB8ICAxMyArKysKIGFyY2gvcmlzY3Yv aW5jbHVkZS9hc20vcGFnZS5oICAgICAgIHwgIDI4ICsrKysrKwogYXJjaC9yaXNjdi9pbmNsdWRl L2FzbS9wZ3RhYmxlLmggICAgfCAgMjUgKysrKystCiBhcmNoL3Jpc2N2L2tlcm5lbC9oZWFkLlMg ICAgICAgICAgICB8ICA0NiArKysrKysrKystCiBhcmNoL3Jpc2N2L2tlcm5lbC9oZWFkLmggICAg ICAgICAgICB8ICAgMyArCiBhcmNoL3Jpc2N2L2tlcm5lbC9zZXR1cC5jICAgICAgICAgICB8ICAx MCArKy0KIGFyY2gvcmlzY3Yva2VybmVsL3ZtbGludXgteGlwLmxkcy5TIHwgMTMzICsrKysrKysr KysrKysrKysrKysrKysrKysrKysKIGFyY2gvcmlzY3Yva2VybmVsL3ZtbGludXgubGRzLlMgICAg IHwgICA2ICsrCiBhcmNoL3Jpc2N2L21tL2luaXQuYyAgICAgICAgICAgICAgICB8IDExOCArKysr KysrKysrKysrKysrKysrKysrLS0KIDExIGZpbGVzIGNoYW5nZWQsIDQyNCBpbnNlcnRpb25zKCsp LCAxNyBkZWxldGlvbnMoLSkKIGNyZWF0ZSBtb2RlIDEwMDY0NCBhcmNoL3Jpc2N2L2tlcm5lbC92 bWxpbnV4LXhpcC5sZHMuUwoKZGlmZiAtLWdpdCBhL2FyY2gvcmlzY3YvS2NvbmZpZyBiL2FyY2gv cmlzY3YvS2NvbmZpZwppbmRleCA4ZWE2MGEwYTE5YWUuLjRkMDE1MzgwNTkyNyAxMDA2NDQKLS0t IGEvYXJjaC9yaXNjdi9LY29uZmlnCisrKyBiL2FyY2gvcmlzY3YvS2NvbmZpZwpAQCAtMjgsNyAr MjgsNyBAQCBjb25maWcgUklTQ1YKIAlzZWxlY3QgQVJDSF9IQVNfUFRFX1NQRUNJQUwKIAlzZWxl Y3QgQVJDSF9IQVNfU0VUX0RJUkVDVF9NQVAKIAlzZWxlY3QgQVJDSF9IQVNfU0VUX01FTU9SWQot CXNlbGVjdCBBUkNIX0hBU19TVFJJQ1RfS0VSTkVMX1JXWCBpZiBNTVUKKwlzZWxlY3QgQVJDSF9I QVNfU1RSSUNUX0tFUk5FTF9SV1ggaWYgTU1VICYmICFYSVBfS0VSTkVMCiAJc2VsZWN0IEFSQ0hf SEFTX1RJQ0tfQlJPQURDQVNUIGlmIEdFTkVSSUNfQ0xPQ0tFVkVOVFNfQlJPQURDQVNUCiAJc2Vs ZWN0IEFSQ0hfT1BUSU9OQUxfS0VSTkVMX1JXWCBpZiBBUkNIX0hBU19TVFJJQ1RfS0VSTkVMX1JX WAogCXNlbGVjdCBBUkNIX09QVElPTkFMX0tFUk5FTF9SV1hfREVGQVVMVApAQCAtNDQxLDcgKzQ0 MSw3IEBAIGNvbmZpZyBFRklfU1RVQgogCiBjb25maWcgRUZJCiAJYm9vbCAiVUVGSSBydW50aW1l IHN1cHBvcnQiCi0JZGVwZW5kcyBvbiBPRgorCWRlcGVuZHMgb24gT0YgJiYgIVhJUF9LRVJORUwK IAlzZWxlY3QgTElCRkRUCiAJc2VsZWN0IFVDUzJfU1RSSU5HCiAJc2VsZWN0IEVGSV9QQVJBTVNf RlJPTV9GRFQKQEAgLTQ2NSwxMSArNDY1LDU2IEBAIGNvbmZpZyBTVEFDS1BST1RFQ1RPUl9QRVJf VEFTSwogCWRlZl9ib29sIHkKIAlkZXBlbmRzIG9uIFNUQUNLUFJPVEVDVE9SICYmIENDX0hBVkVf U1RBQ0tQUk9URUNUT1JfVExTCiAKK2NvbmZpZyBQSFlTX1JBTV9CQVNFX0ZJWEVECisJYm9vbCAi RXhwbGljaXRseSBzcGVjaWZpZWQgcGh5c2ljYWwgUkFNIGFkZHJlc3MiCisJZGVmYXVsdCBuCisK K2NvbmZpZyBQSFlTX1JBTV9CQVNFCisJaGV4ICJQbGF0Zm9ybSBQaHlzaWNhbCBSQU0gYWRkcmVz cyIKKwlkZXBlbmRzIG9uIFBIWVNfUkFNX0JBU0VfRklYRUQKKwlkZWZhdWx0ICIweDgwMDAwMDAw IgorCWhlbHAKKwkgIFRoaXMgaXMgdGhlIHBoeXNpY2FsIGFkZHJlc3Mgb2YgUkFNIGluIHRoZSBz eXN0ZW0uIEl0IGhhcyB0byBiZQorCSAgZXhwbGljaXRseSBzcGVjaWZpZWQgdG8gcnVuIGVhcmx5 IHJlbG9jYXRpb25zIG9mIHJlYWQtd3JpdGUgZGF0YQorCSAgZnJvbSBmbGFzaCB0byBSQU0uCisK K2NvbmZpZyBYSVBfS0VSTkVMCisJYm9vbCAiS2VybmVsIEV4ZWN1dGUtSW4tUGxhY2UgZnJvbSBS T00iCisJZGVwZW5kcyBvbiBNTVUKKwlzZWxlY3QgUEhZU19SQU1fQkFTRV9GSVhFRAorCWhlbHAK KwkgIEV4ZWN1dGUtSW4tUGxhY2UgYWxsb3dzIHRoZSBrZXJuZWwgdG8gcnVuIGZyb20gbm9uLXZv bGF0aWxlIHN0b3JhZ2UKKwkgIGRpcmVjdGx5IGFkZHJlc3NhYmxlIGJ5IHRoZSBDUFUsIHN1Y2gg YXMgTk9SIGZsYXNoLiBUaGlzIHNhdmVzIFJBTQorCSAgc3BhY2Ugc2luY2UgdGhlIHRleHQgc2Vj dGlvbiBvZiB0aGUga2VybmVsIGlzIG5vdCBsb2FkZWQgZnJvbSBmbGFzaAorCSAgdG8gUkFNLiAg UmVhZC13cml0ZSBzZWN0aW9ucywgc3VjaCBhcyB0aGUgZGF0YSBzZWN0aW9uIGFuZCBzdGFjaywK KwkgIGFyZSBzdGlsbCBjb3BpZWQgdG8gUkFNLiAgVGhlIFhJUCBrZXJuZWwgaXMgbm90IGNvbXBy ZXNzZWQgc2luY2UKKwkgIGl0IGhhcyB0byBydW4gZGlyZWN0bHkgZnJvbSBmbGFzaCwgc28gaXQg d2lsbCB0YWtlIG1vcmUgc3BhY2UgdG8KKwkgIHN0b3JlIGl0LiAgVGhlIGZsYXNoIGFkZHJlc3Mg dXNlZCB0byBsaW5rIHRoZSBrZXJuZWwgb2JqZWN0IGZpbGVzLAorCSAgYW5kIGZvciBzdG9yaW5n IGl0LCBpcyBjb25maWd1cmF0aW9uIGRlcGVuZGVudC4gVGhlcmVmb3JlLCBpZiB5b3UKKwkgIHNh eSBZIGhlcmUsIHlvdSBtdXN0IGtub3cgdGhlIHByb3BlciBwaHlzaWNhbCBhZGRyZXNzIHdoZXJl IHRvCisJICBzdG9yZSB0aGUga2VybmVsIGltYWdlIGRlcGVuZGluZyBvbiB5b3VyIG93biBmbGFz aCBtZW1vcnkgdXNhZ2UuCisKKwkgIEFsc28gbm90ZSB0aGF0IHRoZSBtYWtlIHRhcmdldCBiZWNv bWVzICJtYWtlIHhpcEltYWdlIiByYXRoZXIgdGhhbgorCSAgIm1ha2UgekltYWdlIiBvciAibWFr ZSBJbWFnZSIuICBUaGUgZmluYWwga2VybmVsIGJpbmFyeSB0byBwdXQgaW4KKwkgIFJPTSBtZW1v cnkgd2lsbCBiZSBhcmNoL3Jpc2N2L2Jvb3QveGlwSW1hZ2UuCisKKwkgIElmIHVuc3VyZSwgc2F5 IE4uCisKK2NvbmZpZyBYSVBfUEhZU19BRERSCisJaGV4ICJYSVAgS2VybmVsIFBoeXNpY2FsIExv Y2F0aW9uIgorCWRlcGVuZHMgb24gWElQX0tFUk5FTAorCWRlZmF1bHQgIjB4MjEwMDAwMDAiCisJ aGVscAorCSAgVGhpcyBpcyB0aGUgcGh5c2ljYWwgYWRkcmVzcyBpbiB5b3VyIGZsYXNoIG1lbW9y eSB0aGUga2VybmVsIHdpbGwKKwkgIGJlIGxpbmtlZCBmb3IgYW5kIHN0b3JlZCB0by4gIFRoaXMg YWRkcmVzcyBpcyBkZXBlbmRlbnQgb24geW91cgorCSAgb3duIGZsYXNoIHVzYWdlLgorCiBlbmRt ZW51CiAKIGNvbmZpZyBCVUlMVElOX0RUQgotCWRlZl9ib29sIG4KKwlib29sCiAJZGVwZW5kcyBv biBPRgorCWRlZmF1bHQgeSBpZiBYSVBfS0VSTkVMCiAKIG1lbnUgIlBvd2VyIG1hbmFnZW1lbnQg b3B0aW9ucyIKIApkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9NYWtlZmlsZSBiL2FyY2gvcmlzY3Yv TWFrZWZpbGUKaW5kZXggMTM2OGQ5NDNmMWYzLi44ZmNiZWMwMzk3NGQgMTAwNjQ0Ci0tLSBhL2Fy Y2gvcmlzY3YvTWFrZWZpbGUKKysrIGIvYXJjaC9yaXNjdi9NYWtlZmlsZQpAQCAtODIsNyArODIs MTEgQEAgQ0hFQ0tGTEFHUyArPSAtRF9fcmlzY3YgLURfX3Jpc2N2X3hsZW49JChCSVRTKQogCiAj IERlZmF1bHQgdGFyZ2V0IHdoZW4gZXhlY3V0aW5nIHBsYWluIG1ha2UKIGJvb3QJCTo9IGFyY2gv cmlzY3YvYm9vdAoraWZlcSAoJChDT05GSUdfWElQX0tFUk5FTCkseSkKK0tCVUlMRF9JTUFHRSA6 PSAkKGJvb3QpL3hpcEltYWdlCitlbHNlCiBLQlVJTERfSU1BR0UJOj0gJChib290KS9JbWFnZS5n egorZW5kaWYKIAogaGVhZC15IDo9IGFyY2gvcmlzY3Yva2VybmVsL2hlYWQubwogCkBAIC05NSwx MiArOTksMTQgQEAgUEhPTlkgKz0gdmRzb19pbnN0YWxsCiB2ZHNvX2luc3RhbGw6CiAJJChRKSQo TUFLRSkgJChidWlsZCk9YXJjaC9yaXNjdi9rZXJuZWwvdmRzbyAkQAogCitpZm5lcSAoJChDT05G SUdfWElQX0tFUk5FTCkseSkKIGlmZXEgKCQoQ09ORklHX1JJU0NWX01fTU9ERSkkKENPTkZJR19T T0NfQ0FOQUFOKSx5eSkKIEtCVUlMRF9JTUFHRSA6PSAkKGJvb3QpL2xvYWRlci5iaW4KIGVsc2UK IEtCVUlMRF9JTUFHRSA6PSAkKGJvb3QpL0ltYWdlLmd6CiBlbmRpZgotQk9PVF9UQVJHRVRTIDo9 IEltYWdlIEltYWdlLmd6IGxvYWRlciBsb2FkZXIuYmluCitlbmRpZgorQk9PVF9UQVJHRVRTIDo9 IEltYWdlIEltYWdlLmd6IGxvYWRlciBsb2FkZXIuYmluIHhpcEltYWdlCiAKIGFsbDoJJChub3Rk aXIgJChLQlVJTERfSU1BR0UpKQogCmRpZmYgLS1naXQgYS9hcmNoL3Jpc2N2L2Jvb3QvTWFrZWZp bGUgYi9hcmNoL3Jpc2N2L2Jvb3QvTWFrZWZpbGUKaW5kZXggMDM0MDRjODRmOTcxLi42YmYyOTlm NzBjMjcgMTAwNjQ0Ci0tLSBhL2FyY2gvcmlzY3YvYm9vdC9NYWtlZmlsZQorKysgYi9hcmNoL3Jp c2N2L2Jvb3QvTWFrZWZpbGUKQEAgLTE3LDggKzE3LDIxIEBACiBLQ09WX0lOU1RSVU1FTlQgOj0g bgogCiBPQkpDT1BZRkxBR1NfSW1hZ2UgOj0tTyBiaW5hcnkgLVIgLm5vdGUgLVIgLm5vdGUuZ251 LmJ1aWxkLWlkIC1SIC5jb21tZW50IC1TCitPQkpDT1BZRkxBR1NfeGlwSW1hZ2UgOj0tTyBiaW5h cnkgLVIgLm5vdGUgLVIgLm5vdGUuZ251LmJ1aWxkLWlkIC1SIC5jb21tZW50IC1TCiAKIHRhcmdl dHMgOj0gSW1hZ2UgSW1hZ2UuKiBsb2FkZXIgbG9hZGVyLm8gbG9hZGVyLmxkcyBsb2FkZXIuYmlu Cit0YXJnZXRzIDo9IEltYWdlIEltYWdlLiogbG9hZGVyIGxvYWRlci5vIGxvYWRlci5sZHMgbG9h ZGVyLmJpbiB4aXBJbWFnZQorCitpZmVxICgkKENPTkZJR19YSVBfS0VSTkVMKSx5KQorCitxdWll dF9jbWRfbWt4aXAgPSAkKHF1aWV0X2NtZF9vYmpjb3B5KQorY21kX21reGlwID0gJChjbWRfb2Jq Y29weSkKKworJChvYmopL3hpcEltYWdlOiB2bWxpbnV4IEZPUkNFCisJJChjYWxsIGlmX2NoYW5n ZWQsbWt4aXApCisJQCQoa2VjaG8pICcgIFBoeXNpY2FsIEFkZHJlc3Mgb2YgeGlwSW1hZ2U6ICQo Q09ORklHX1hJUF9QSFlTX0FERFIpJworCitlbmRpZgogCiAkKG9iaikvSW1hZ2U6IHZtbGludXgg Rk9SQ0UKIAkkKGNhbGwgaWZfY2hhbmdlZCxvYmpjb3B5KQpkaWZmIC0tZ2l0IGEvYXJjaC9yaXNj di9pbmNsdWRlL2FzbS9wYWdlLmggYi9hcmNoL3Jpc2N2L2luY2x1ZGUvYXNtL3BhZ2UuaAppbmRl eCAyMmNmYjJiZTYwZGMuLjZmZTBmZjhjOGZhOSAxMDA2NDQKLS0tIGEvYXJjaC9yaXNjdi9pbmNs dWRlL2FzbS9wYWdlLmgKKysrIGIvYXJjaC9yaXNjdi9pbmNsdWRlL2FzbS9wYWdlLmgKQEAgLTkx LDYgKzkxLDkgQEAgdHlwZWRlZiBzdHJ1Y3QgcGFnZSAqcGd0YWJsZV90OwogI2lmZGVmIENPTkZJ R19NTVUKIGV4dGVybiB1bnNpZ25lZCBsb25nIHZhX3BhX29mZnNldDsKIGV4dGVybiB1bnNpZ25l ZCBsb25nIHZhX2tlcm5lbF9wYV9vZmZzZXQ7CisjaWZkZWYgQ09ORklHX1hJUF9LRVJORUwKK2V4 dGVybiB1bnNpZ25lZCBsb25nIHZhX2tlcm5lbF94aXBfcGFfb2Zmc2V0OworI2VuZGlmCiBleHRl cm4gdW5zaWduZWQgbG9uZyBwZm5fYmFzZTsKICNkZWZpbmUgQVJDSF9QRk5fT0ZGU0VUCQkocGZu X2Jhc2UpCiAjZWxzZQpAQCAtMTAyLDExICsxMDUsMjkgQEAgZXh0ZXJuIHVuc2lnbmVkIGxvbmcg cGZuX2Jhc2U7CiBleHRlcm4gdW5zaWduZWQgbG9uZyBrZXJuZWxfdmlydF9hZGRyOwogCiAjZGVm aW5lIGxpbmVhcl9tYXBwaW5nX3BhX3RvX3ZhKHgpCSgodm9pZCAqKSgodW5zaWduZWQgbG9uZyko eCkgKyB2YV9wYV9vZmZzZXQpKQorI2lmZGVmIENPTkZJR19YSVBfS0VSTkVMCisjZGVmaW5lIGtl cm5lbF9tYXBwaW5nX3BhX3RvX3ZhKHkpCSh7CQkJCQkJXAorCXVuc2lnbmVkIGxvbmcgX3kgPSB5 OwkJCQkJCQkJXAorCShfeSA+PSBDT05GSUdfUEhZU19SQU1fQkFTRSkgPwkJCQkJCQlcCisJCSh2 b2lkICopKCh1bnNpZ25lZCBsb25nKShfeSkgKyB2YV9rZXJuZWxfcGFfb2Zmc2V0ICsgWElQX09G RlNFVCkgOglcCisJCSh2b2lkICopKCh1bnNpZ25lZCBsb25nKShfeSkgKyB2YV9rZXJuZWxfeGlw X3BhX29mZnNldCk7CQlcCisJfSkKKyNlbHNlCiAjZGVmaW5lIGtlcm5lbF9tYXBwaW5nX3BhX3Rv X3ZhKHgpCSgodm9pZCAqKSgodW5zaWduZWQgbG9uZykoeCkgKyB2YV9rZXJuZWxfcGFfb2Zmc2V0 KSkKKyNlbmRpZgogI2RlZmluZSBfX3BhX3RvX3ZhX25vZGVidWcoeCkJCWxpbmVhcl9tYXBwaW5n X3BhX3RvX3ZhKHgpCiAKICNkZWZpbmUgbGluZWFyX21hcHBpbmdfdmFfdG9fcGEoeCkJKCh1bnNp Z25lZCBsb25nKSh4KSAtIHZhX3BhX29mZnNldCkKKyNpZmRlZiBDT05GSUdfWElQX0tFUk5FTAor I2RlZmluZSBrZXJuZWxfbWFwcGluZ192YV90b19wYSh5KSAoewkJCQkJCVwKKwl1bnNpZ25lZCBs b25nIF95ID0geTsJCQkJCQkJXAorCShfeSA8IGtlcm5lbF92aXJ0X2FkZHIgKyBYSVBfT0ZGU0VU KSA/CQkJCQlcCisJCSgodW5zaWduZWQgbG9uZykoX3kpIC0gdmFfa2VybmVsX3hpcF9wYV9vZmZz ZXQpIDoJCVwKKwkJKCh1bnNpZ25lZCBsb25nKShfeSkgLSB2YV9rZXJuZWxfcGFfb2Zmc2V0IC0g WElQX09GRlNFVCk7CVwKKwl9KQorI2Vsc2UKICNkZWZpbmUga2VybmVsX21hcHBpbmdfdmFfdG9f cGEoeCkJKCh1bnNpZ25lZCBsb25nKSh4KSAtIHZhX2tlcm5lbF9wYV9vZmZzZXQpCisjZW5kaWYK ICNkZWZpbmUgX192YV90b19wYV9ub2RlYnVnKHgpCSh7CQkJCQkJXAogCXVuc2lnbmVkIGxvbmcg X3ggPSB4OwkJCQkJCQlcCiAJKF94IDwga2VybmVsX3ZpcnRfYWRkcikgPwkJCQkJCVwKQEAgLTEz OSw5ICsxNjAsMTYgQEAgZXh0ZXJuIHBoeXNfYWRkcl90IF9fcGh5c19hZGRyX3N5bWJvbCh1bnNp Z25lZCBsb25nIHgpOwogI2RlZmluZSBwaHlzX3RvX3BhZ2UocGFkZHIpCShwZm5fdG9fcGFnZShw aHlzX3RvX3BmbihwYWRkcikpKQogCiAjaWZkZWYgQ09ORklHX0ZMQVRNRU0KKyNpZmRlZiBDT05G SUdfWElQX0tFUk5FTAorI2RlZmluZSBwZm5fdmFsaWQocGZuKSBcCisJKCgoKHBmbikgPj0gQVJD SF9QRk5fT0ZGU0VUKSAmJiAoKChwZm4pIC0gQVJDSF9QRk5fT0ZGU0VUKSA8IG1heF9tYXBucikp IHx8CVwKKwkJKChwZm4pID49IFBGTl9ET1dOKENPTkZJR19YSVBfUEhZU19BRERSKSAmJgkJCQlc CisJCSgoKHBmbikgLSBQRk5fRE9XTihDT05GSUdfWElQX1BIWVNfQUREUikpIDwgWElQX09GRlNF VCkpKQorI2Vsc2UKICNkZWZpbmUgcGZuX3ZhbGlkKHBmbikgXAogCSgoKHBmbikgPj0gQVJDSF9Q Rk5fT0ZGU0VUKSAmJiAoKChwZm4pIC0gQVJDSF9QRk5fT0ZGU0VUKSA8IG1heF9tYXBucikpCiAj ZW5kaWYKKyNlbmRpZgogCiAjZW5kaWYgLyogX19BU1NFTUJMWV9fICovCiAKZGlmZiAtLWdpdCBh L2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vcGd0YWJsZS5oIGIvYXJjaC9yaXNjdi9pbmNsdWRlL2Fz bS9wZ3RhYmxlLmgKaW5kZXggODBlNjNhOTNlOTAzLi5jMmRjNGY4M2VlZDggMTAwNjQ0Ci0tLSBh L2FyY2gvcmlzY3YvaW5jbHVkZS9hc20vcGd0YWJsZS5oCisrKyBiL2FyY2gvcmlzY3YvaW5jbHVk ZS9hc20vcGd0YWJsZS5oCkBAIC02NCw2ICs2NCwxOSBAQAogI2RlZmluZSBGSVhBRERSX1NJWkUg ICAgIFBHRElSX1NJWkUKICNlbmRpZgogI2RlZmluZSBGSVhBRERSX1NUQVJUICAgIChGSVhBRERS X1RPUCAtIEZJWEFERFJfU0laRSkKKworI2lmZGVmIENPTkZJR19YSVBfS0VSTkVMCisjZGVmaW5l IFhJUF9PRkZTRVQJCVNaXzhNCisjZGVmaW5lIFhJUF9GSVhVUChhZGRyKSAoewkJCQkJCQlcCisJ dWludHB0cl90IF9fYSA9ICh1aW50cHRyX3QpKGFkZHIpOwkJCQkJXAorCShfX2EgPj0gQ09ORklH X1hJUF9QSFlTX0FERFIgJiYgX19hIDwgQ09ORklHX1hJUF9QSFlTX0FERFIgKyBTWl8xNk0pID8J XAorCQlfX2EgLSBDT05GSUdfWElQX1BIWVNfQUREUiArIENPTkZJR19QSFlTX1JBTV9CQVNFIC0g WElQX09GRlNFVCA6XAorCQlfX2E7CQkJCQkJCQlcCisJfSkKKyNlbHNlCisjZGVmaW5lIFhJUF9G SVhVUChhZGRyKQkJKGFkZHIpCisjZW5kaWYgLyogQ09ORklHX1hJUF9LRVJORUwgKi8KKwogI2Vu ZGlmCiAKICNpZm5kZWYgX19BU1NFTUJMWV9fCkBAIC00OTksOCArNTEyLDE2IEBAIHN0YXRpYyBp bmxpbmUgaW50IHB0ZXBfY2xlYXJfZmx1c2hfeW91bmcoc3RydWN0IHZtX2FyZWFfc3RydWN0ICp2 bWEsCiAjZGVmaW5lIGtlcm5fYWRkcl92YWxpZChhZGRyKSAgICgxKSAvKiBGSVhNRSAqLwogCiBl eHRlcm4gY2hhciBfc3RhcnRbXTsKLWV4dGVybiB2b2lkICpkdGJfZWFybHlfdmE7Ci1leHRlcm4g dWludHB0cl90IGR0Yl9lYXJseV9wYTsKK2V4dGVybiB2b2lkICpfZHRiX2Vhcmx5X3ZhOworZXh0 ZXJuIHVpbnRwdHJfdCBfZHRiX2Vhcmx5X3BhOworI2lmIGRlZmluZWQoQ09ORklHX1hJUF9LRVJO RUwpICYmIGRlZmluZWQoQ09ORklHX01NVSkKKyNkZWZpbmUgZHRiX2Vhcmx5X3ZhCSgqKHZvaWQg KiopWElQX0ZJWFVQKCZfZHRiX2Vhcmx5X3ZhKSkKKyNkZWZpbmUgZHRiX2Vhcmx5X3BhCSgqKHVp bnRwdHJfdCAqKVhJUF9GSVhVUCgmX2R0Yl9lYXJseV9wYSkpCisjZWxzZQorI2RlZmluZSBkdGJf ZWFybHlfdmEJX2R0Yl9lYXJseV92YQorI2RlZmluZSBkdGJfZWFybHlfcGEJX2R0Yl9lYXJseV9w YQorI2VuZGlmIC8qIENPTkZJR19YSVBfS0VSTkVMICovCisKIHZvaWQgc2V0dXBfYm9vdG1lbSh2 b2lkKTsKIHZvaWQgcGFnaW5nX2luaXQodm9pZCk7CiB2b2lkIG1pc2NfbWVtX2luaXQodm9pZCk7 CmRpZmYgLS1naXQgYS9hcmNoL3Jpc2N2L2tlcm5lbC9oZWFkLlMgYi9hcmNoL3Jpc2N2L2tlcm5l bC9oZWFkLlMKaW5kZXggNmNiMDVmMjJlNTJhLi44OWNjNThhYjUyYjQgMTAwNjQ0Ci0tLSBhL2Fy Y2gvcmlzY3Yva2VybmVsL2hlYWQuUworKysgYi9hcmNoL3Jpc2N2L2tlcm5lbC9oZWFkLlMKQEAg LTksMTEgKzksMjMgQEAKICNpbmNsdWRlIDxsaW51eC9saW5rYWdlLmg+CiAjaW5jbHVkZSA8YXNt L3RocmVhZF9pbmZvLmg+CiAjaW5jbHVkZSA8YXNtL3BhZ2UuaD4KKyNpbmNsdWRlIDxhc20vcGd0 YWJsZS5oPgogI2luY2x1ZGUgPGFzbS9jc3IuaD4KICNpbmNsdWRlIDxhc20vaHdjYXAuaD4KICNp bmNsdWRlIDxhc20vaW1hZ2UuaD4KICNpbmNsdWRlICJlZmktaGVhZGVyLlMiCiAKKyNpZmRlZiBD T05GSUdfWElQX0tFUk5FTAorLm1hY3JvIFhJUF9GSVhVUF9PRkZTRVQgcmVnCisJUkVHX0wgdDAs IF94aXBfZml4dXAKKwlhZGQgXHJlZywgXHJlZywgdDAKKy5lbmRtCitfeGlwX2ZpeHVwOiAuZHdv cmQgQ09ORklHX1BIWVNfUkFNX0JBU0UgLSBDT05GSUdfWElQX1BIWVNfQUREUiAtIFhJUF9PRkZT RVQKKyNlbHNlCisubWFjcm8gWElQX0ZJWFVQX09GRlNFVCByZWcKKy5lbmRtCisjZW5kaWYgLyog Q09ORklHX1hJUF9LRVJORUwgKi8KKwogX19IRUFECiBFTlRSWShfc3RhcnQpCiAJLyoKQEAgLTcw LDYgKzgyLDcgQEAgcGVfaGVhZF9zdGFydDoKIHJlbG9jYXRlOgogCS8qIFJlbG9jYXRlIHJldHVy biBhZGRyZXNzICovCiAJbGEgYTEsIGtlcm5lbF92aXJ0X2FkZHIKKwlYSVBfRklYVVBfT0ZGU0VU IGExCiAJUkVHX0wgYTEsIDAoYTEpCiAJbGEgYTIsIF9zdGFydAogCXN1YiBhMSwgYTEsIGEyCkBA IC05Miw2ICsxMDUsNyBAQCByZWxvY2F0ZToKIAkgKiB0byBlbnN1cmUgdGhlIG5ldyB0cmFuc2xh dGlvbnMgYXJlIGluIHVzZS4KIAkgKi8KIAlsYSBhMCwgdHJhbXBvbGluZV9wZ19kaXIKKwlYSVBf RklYVVBfT0ZGU0VUIGEwCiAJc3JsIGEwLCBhMCwgUEFHRV9TSElGVAogCW9yIGEwLCBhMCwgYTEK IAlzZmVuY2Uudm1hCkBAIC0xNDUsNyArMTU5LDkgQEAgc2Vjb25kYXJ5X3N0YXJ0X3NiaToKIAog CXNsbGkgYTMsIGEwLCBMR1JFRwogCWxhIGE0LCBfX2NwdV91cF9zdGFja19wb2ludGVyCisJWElQ X0ZJWFVQX09GRlNFVCBhNAogCWxhIGE1LCBfX2NwdV91cF90YXNrX3BvaW50ZXIKKwlYSVBfRklY VVBfT0ZGU0VUIGE1CiAJYWRkIGE0LCBhMywgYTQKIAlhZGQgYTUsIGEzLCBhNQogCVJFR19MIHNw LCAoYTQpCkBAIC0xNTcsNiArMTczLDcgQEAgc2Vjb25kYXJ5X3N0YXJ0X2NvbW1vbjoKICNpZmRl ZiBDT05GSUdfTU1VCiAJLyogRW5hYmxlIHZpcnR1YWwgbWVtb3J5IGFuZCByZWxvY2F0ZSB0byB2 aXJ0dWFsIGFkZHJlc3MgKi8KIAlsYSBhMCwgc3dhcHBlcl9wZ19kaXIKKwlYSVBfRklYVVBfT0ZG U0VUIGEwCiAJY2FsbCByZWxvY2F0ZQogI2VuZGlmCiAJY2FsbCBzZXR1cF90cmFwX3ZlY3RvcgpA QCAtMjM3LDEyICsyNTQsMzMgQEAgcG1wX2RvbmU6CiAuTGdvb2RfY29yZXM6CiAjZW5kaWYKIAor I2lmbmRlZiBDT05GSUdfWElQX0tFUk5FTAogCS8qIFBpY2sgb25lIGhhcnQgdG8gcnVuIHRoZSBt YWluIGJvb3Qgc2VxdWVuY2UgKi8KIAlsYSBhMywgaGFydF9sb3R0ZXJ5CiAJbGkgYTIsIDEKIAlh bW9hZGQudyBhMywgYTIsIChhMykKIAlibmV6IGEzLCAuTHNlY29uZGFyeV9zdGFydAogCisjZWxz ZQorCS8qIGhhcnRfbG90dGVyeSBpbiBmbGFzaCBjb250YWlucyBhIG1hZ2ljIG51bWJlciAqLwor CWxhIGEzLCBoYXJ0X2xvdHRlcnkKKwltdiBhMiwgYTMKKwlYSVBfRklYVVBfT0ZGU0VUIGEyCisJ bHcgdDEsIChhMykKKwlhbW9zd2FwLncgdDAsIHQxLCAoYTIpCisJLyogZmlyc3QgdGltZSBoZXJl IGlmIGhhcnRfbG90dGVyeSBpbiBSQU0gaXMgbm90IHNldCAqLworCWJlcSB0MCwgdDEsIC5Mc2Vj b25kYXJ5X3N0YXJ0CisKKwlsYSBzcCwgX2VuZCArIFRIUkVBRF9TSVpFCisJWElQX0ZJWFVQX09G RlNFVCBzcAorCW12IHMwLCBhMAorCWNhbGwgX19jb3B5X2RhdGEKKworCS8qIFJlc3RvcmUgYTAg Y29weSAqLworCW12IGEwLCBzMAorI2VuZGlmCisKKyNpZm5kZWYgQ09ORklHX1hJUF9LRVJORUwK IAkvKiBDbGVhciBCU1MgZm9yIGZsYXQgbm9uLUVMRiBpbWFnZXMgKi8KIAlsYSBhMywgX19ic3Nf c3RhcnQKIAlsYSBhNCwgX19ic3Nfc3RvcApAQCAtMjUyLDE1ICsyOTAsMTggQEAgY2xlYXJfYnNz OgogCWFkZCBhMywgYTMsIFJJU0NWX1NaUFRSCiAJYmx0IGEzLCBhNCwgY2xlYXJfYnNzCiBjbGVh cl9ic3NfZG9uZToKLQorI2VuZGlmCiAJLyogU2F2ZSBoYXJ0IElEIGFuZCBEVEIgcGh5c2ljYWwg YWRkcmVzcyAqLwogCW12IHMwLCBhMAogCW12IHMxLCBhMQorCiAJbGEgYTIsIGJvb3RfY3B1X2hh cnRpZAorCVhJUF9GSVhVUF9PRkZTRVQgYTIKIAlSRUdfUyBhMCwgKGEyKQogCiAJLyogSW5pdGlh bGl6ZSBwYWdlIHRhYmxlcyBhbmQgcmVsb2NhdGUgdG8gdmlydHVhbCBhZGRyZXNzZXMgKi8KIAls YSBzcCwgaW5pdF90aHJlYWRfdW5pb24gKyBUSFJFQURfU0laRQorCVhJUF9GSVhVUF9PRkZTRVQg c3AKICNpZmRlZiBDT05GSUdfQlVJTFRJTl9EVEIKIAlsYSBhMCwgX19kdGJfc3RhcnQKICNlbHNl CkBAIC0yNjksNiArMzEwLDcgQEAgY2xlYXJfYnNzX2RvbmU6CiAJY2FsbCBzZXR1cF92bQogI2lm ZGVmIENPTkZJR19NTVUKIAlsYSBhMCwgZWFybHlfcGdfZGlyCisJWElQX0ZJWFVQX09GRlNFVCBh MAogCWNhbGwgcmVsb2NhdGUKICNlbmRpZiAvKiBDT05GSUdfTU1VICovCiAKQEAgLTI5Myw3ICsz MzUsOSBAQCBjbGVhcl9ic3NfZG9uZToKIAogCXNsbGkgYTMsIGEwLCBMR1JFRwogCWxhIGExLCBf X2NwdV91cF9zdGFja19wb2ludGVyCisJWElQX0ZJWFVQX09GRlNFVCBhMQogCWxhIGEyLCBfX2Nw dV91cF90YXNrX3BvaW50ZXIKKwlYSVBfRklYVVBfT0ZGU0VUIGEyCiAJYWRkIGExLCBhMywgYTEK IAlhZGQgYTIsIGEzLCBhMgogCmRpZmYgLS1naXQgYS9hcmNoL3Jpc2N2L2tlcm5lbC9oZWFkLmgg Yi9hcmNoL3Jpc2N2L2tlcm5lbC9oZWFkLmgKaW5kZXggYjQ4ZGRhM2QwNGY2Li5hYWJiYzNhYzNl NDggMTAwNjQ0Ci0tLSBhL2FyY2gvcmlzY3Yva2VybmVsL2hlYWQuaAorKysgYi9hcmNoL3Jpc2N2 L2tlcm5lbC9oZWFkLmgKQEAgLTEyLDYgKzEyLDkgQEAgZXh0ZXJuIGF0b21pY190IGhhcnRfbG90 dGVyeTsKIAogYXNtbGlua2FnZSB2b2lkIGRvX3BhZ2VfZmF1bHQoc3RydWN0IHB0X3JlZ3MgKnJl Z3MpOwogYXNtbGlua2FnZSB2b2lkIF9faW5pdCBzZXR1cF92bSh1aW50cHRyX3QgZHRiX3BhKTsK KyNpZmRlZiBDT05GSUdfWElQX0tFUk5FTAorYXNtbGlua2FnZSB2b2lkIF9faW5pdCBfX2NvcHlf ZGF0YSh2b2lkKTsKKyNlbmRpZgogCiBleHRlcm4gdm9pZCAqX19jcHVfdXBfc3RhY2tfcG9pbnRl cltdOwogZXh0ZXJuIHZvaWQgKl9fY3B1X3VwX3Rhc2tfcG9pbnRlcltdOwpkaWZmIC0tZ2l0IGEv YXJjaC9yaXNjdi9rZXJuZWwvc2V0dXAuYyBiL2FyY2gvcmlzY3Yva2VybmVsL3NldHVwLmMKaW5k ZXggMzBlNGFmMGZkNTBjLi4yZGRmNjU0YzcyYmIgMTAwNjQ0Ci0tLSBhL2FyY2gvcmlzY3Yva2Vy bmVsL3NldHVwLmMKKysrIGIvYXJjaC9yaXNjdi9rZXJuZWwvc2V0dXAuYwpAQCAtNTAsNyArNTAs MTEgQEAgc3RydWN0IHNjcmVlbl9pbmZvIHNjcmVlbl9pbmZvIF9fc2VjdGlvbigiLmRhdGEiKSA9 IHsKICAqIFRoaXMgaXMgdXNlZCBiZWZvcmUgdGhlIGtlcm5lbCBpbml0aWFsaXplcyB0aGUgQlNT IHNvIGl0IGNhbid0IGJlIGluIHRoZQogICogQlNTLgogICovCi1hdG9taWNfdCBoYXJ0X2xvdHRl cnkgX19zZWN0aW9uKCIuc2RhdGEiKTsKK2F0b21pY190IGhhcnRfbG90dGVyeSBfX3NlY3Rpb24o Ii5zZGF0YSIpCisjaWZkZWYgQ09ORklHX1hJUF9LRVJORUwKKz0gQVRPTUlDX0lOSVQoMHhDMDAx QkVFRikKKyNlbmRpZgorOwogdW5zaWduZWQgbG9uZyBib290X2NwdV9oYXJ0aWQ7CiBzdGF0aWMg REVGSU5FX1BFUl9DUFUoc3RydWN0IGNwdSwgY3B1X2RldmljZXMpOwogCkBAIC0yNTQsNyArMjU4 LDcgQEAgdm9pZCBfX2luaXQgc2V0dXBfYXJjaChjaGFyICoqY21kbGluZV9wKQogI2lmIElTX0VO QUJMRUQoQ09ORklHX0JVSUxUSU5fRFRCKQogCXVuZmxhdHRlbl9hbmRfY29weV9kZXZpY2VfdHJl ZSgpOwogI2Vsc2UKLQlpZiAoZWFybHlfaW5pdF9kdF92ZXJpZnkoX192YShkdGJfZWFybHlfcGEp KSkKKwlpZiAoZWFybHlfaW5pdF9kdF92ZXJpZnkoX192YShYSVBfRklYVVAoZHRiX2Vhcmx5X3Bh KSkpKQogCQl1bmZsYXR0ZW5fZGV2aWNlX3RyZWUoKTsKIAllbHNlCiAJCXByX2VycigiTm8gRFRC IGZvdW5kIGluIGtlcm5lbCBtYXBwaW5nc1xuIik7CkBAIC0yNjYsNyArMjcwLDcgQEAgdm9pZCBf X2luaXQgc2V0dXBfYXJjaChjaGFyICoqY21kbGluZV9wKQogCWlmIChJU19FTkFCTEVEKENPTkZJ R19TVFJJQ1RfS0VSTkVMX1JXWCkpCiAJCXByb3RlY3Rfa2VybmVsX3RleHRfZGF0YSgpOwogCi0j aWYgZGVmaW5lZChDT05GSUdfNjRCSVQpICYmIGRlZmluZWQoQ09ORklHX01NVSkKKyNpZiBkZWZp bmVkKENPTkZJR182NEJJVCkgJiYgZGVmaW5lZChDT05GSUdfTU1VKSAmJiAhZGVmaW5lZChDT05G SUdfWElQX0tFUk5FTCkKIAlwcm90ZWN0X2tlcm5lbF9saW5lYXJfbWFwcGluZ190ZXh0X3JvZGF0 YSgpOwogI2VuZGlmCiAKZGlmZiAtLWdpdCBhL2FyY2gvcmlzY3Yva2VybmVsL3ZtbGludXgteGlw Lmxkcy5TIGIvYXJjaC9yaXNjdi9rZXJuZWwvdm1saW51eC14aXAubGRzLlMKbmV3IGZpbGUgbW9k ZSAxMDA2NDQKaW5kZXggMDAwMDAwMDAwMDAwLi40YjI5Yjk5MTdmOTkKLS0tIC9kZXYvbnVsbAor KysgYi9hcmNoL3Jpc2N2L2tlcm5lbC92bWxpbnV4LXhpcC5sZHMuUwpAQCAtMCwwICsxLDEzMyBA QAorLyogU1BEWC1MaWNlbnNlLUlkZW50aWZpZXI6IEdQTC0yLjAtb25seSAqLworLyoKKyAqIENv cHlyaWdodCAoQykgMjAxMiBSZWdlbnRzIG9mIHRoZSBVbml2ZXJzaXR5IG9mIENhbGlmb3JuaWEK KyAqIENvcHlyaWdodCAoQykgMjAxNyBTaUZpdmUKKyAqIENvcHlyaWdodCAoQykgMjAyMCBWaXRh bHkgV29vbCwgS29uc3Vsa28gQUIKKyAqLworCisjaW5jbHVkZSA8YXNtL3BndGFibGUuaD4KKyNk ZWZpbmUgTE9BRF9PRkZTRVQgS0VSTkVMX0xJTktfQUREUgorLyogTm8gX19yb19hZnRlcl9pbml0 IGRhdGEgaW4gdGhlIC5yb2RhdGEgc2VjdGlvbiAtIHdoaWNoIHdpbGwgYWx3YXlzIGJlIHJvICov CisjZGVmaW5lIFJPX0FGVEVSX0lOSVRfREFUQQorCisjaW5jbHVkZSA8YXNtL3ZtbGludXgubGRz Lmg+CisjaW5jbHVkZSA8YXNtL3BhZ2UuaD4KKyNpbmNsdWRlIDxhc20vcGd0YWJsZS5oPgorI2lu Y2x1ZGUgPGFzbS9jYWNoZS5oPgorI2luY2x1ZGUgPGFzbS90aHJlYWRfaW5mby5oPgorCitPVVRQ VVRfQVJDSChyaXNjdikKK0VOVFJZKF9zdGFydCkKKworamlmZmllcyA9IGppZmZpZXNfNjQ7CisK K1NFQ1RJT05TCit7CisJLyogQmVnaW5uaW5nIG9mIGNvZGUgYW5kIHRleHQgc2VnbWVudCAqLwor CS4gPSBMT0FEX09GRlNFVDsKKwlfeGlwcm9tID0gLjsKKwlfc3RhcnQgPSAuOworCUhFQURfVEVY VF9TRUNUSU9OCisJSU5JVF9URVhUX1NFQ1RJT04oUEFHRV9TSVpFKQorCS8qIHdlIGhhdmUgdG8g ZGlzY2FyZCBleGl0IHRleHQgYW5kIHN1Y2ggYXQgcnVudGltZSwgbm90IGxpbmsgdGltZSAqLwor CS5leGl0LnRleHQgOgorCXsKKwkJRVhJVF9URVhUCisJfQorCisJLnRleHQgOiB7CisJCV90ZXh0 ID0gLjsKKwkJX3N0ZXh0ID0gLjsKKwkJVEVYVF9URVhUCisJCVNDSEVEX1RFWFQKKwkJQ1BVSURM RV9URVhUCisJCUxPQ0tfVEVYVAorCQlLUFJPQkVTX1RFWFQKKwkJRU5UUllfVEVYVAorCQlJUlFF TlRSWV9URVhUCisJCVNPRlRJUlFFTlRSWV9URVhUCisJCSooLmZpeHVwKQorCQlfZXRleHQgPSAu OworCX0KKwlST19EQVRBKEwxX0NBQ0hFX0JZVEVTKQorCS5zcm9kYXRhIDogeworCQkqKC5zcm9k YXRhKikKKwl9CisJLmluaXQucm9kYXRhIDogeworCQlJTklUX1NFVFVQKDE2KQorCQlJTklUX0NB TExTCisJCUNPTl9JTklUQ0FMTAorCQlJTklUX1JBTV9GUworCX0KKwlfZXhpcHJvbSA9IC47CQkJ LyogRW5kIG9mIFhJUCBST00gYXJlYSAqLworCisKKy8qCisgKiBGcm9tIHRoaXMgcG9pbnQsIHN0 dWZmIGlzIGNvbnNpZGVyZWQgd3JpdGFibGUgYW5kIHdpbGwgYmUgY29waWVkIHRvIFJBTQorICov CisJX19kYXRhX2xvYyA9IEFMSUdOKDE2KTsJCS8qIGxvY2F0aW9uIGluIGZpbGUgKi8KKwkuID0g TE9BRF9PRkZTRVQgKyBYSVBfT0ZGU0VUOwkvKiBsb2NhdGlvbiBpbiBtZW1vcnkgKi8KKworCV9z ZGF0YSA9IC47CQkJLyogU3RhcnQgb2YgZGF0YSBzZWN0aW9uICovCisJX2RhdGEgPSAuOworCVJX X0RBVEEoTDFfQ0FDSEVfQllURVMsIFBBR0VfU0laRSwgVEhSRUFEX1NJWkUpCisJX2VkYXRhID0g LjsKKwlfX3N0YXJ0X3JvX2FmdGVyX2luaXQgPSAuOworCS5kYXRhLnJvX2FmdGVyX2luaXQgOiBB VChBRERSKC5kYXRhLnJvX2FmdGVyX2luaXQpIC0gTE9BRF9PRkZTRVQpIHsKKwkJKiguZGF0YS4u cm9fYWZ0ZXJfaW5pdCkKKwl9CisJX19lbmRfcm9fYWZ0ZXJfaW5pdCA9IC47CisKKwkuID0gQUxJ R04oUEFHRV9TSVpFKTsKKwlfX2luaXRfYmVnaW4gPSAuOworCS5pbml0LmRhdGEgOiB7CisJCUlO SVRfREFUQQorCX0KKwkuZXhpdC5kYXRhIDogeworCQlFWElUX0RBVEEKKwl9CisJLiA9IEFMSUdO KDgpOworCV9fc29jX2Vhcmx5X2luaXRfdGFibGUgOiB7CisJCV9fc29jX2Vhcmx5X2luaXRfdGFi bGVfc3RhcnQgPSAuOworCQlLRUVQKCooX19zb2NfZWFybHlfaW5pdF90YWJsZSkpCisJCV9fc29j X2Vhcmx5X2luaXRfdGFibGVfZW5kID0gLjsKKwl9CisJX19zb2NfYnVpbHRpbl9kdGJfdGFibGUg OiB7CisJCV9fc29jX2J1aWx0aW5fZHRiX3RhYmxlX3N0YXJ0ID0gLjsKKwkJS0VFUCgqKF9fc29j X2J1aWx0aW5fZHRiX3RhYmxlKSkKKwkJX19zb2NfYnVpbHRpbl9kdGJfdGFibGVfZW5kID0gLjsK Kwl9CisJUEVSQ1BVX1NFQ1RJT04oTDFfQ0FDSEVfQllURVMpCisKKwkuID0gQUxJR04oUEFHRV9T SVpFKTsKKwlfX2luaXRfZW5kID0gLjsKKworCS5zZGF0YSA6IHsKKwkJX19nbG9iYWxfcG9pbnRl ciQgPSAuICsgMHg4MDA7CisJCSooLnNkYXRhKikKKwkJKiguc2JzcyopCisJfQorCisJQlNTX1NF Q1RJT04oUEFHRV9TSVpFLCBQQUdFX1NJWkUsIDApCisJRVhDRVBUSU9OX1RBQkxFKDB4MTApCisK KwkucmVsLmR5biA6IEFUKEFERFIoLnJlbC5keW4pIC0gTE9BRF9PRkZTRVQpIHsKKwkJKigucmVs LmR5biopCisJfQorCisJLyoKKwkgKiBFbmQgb2YgY29waWVkIGRhdGEuIFdlIG5lZWQgYSBkdW1t eSBzZWN0aW9uIHRvIGdldCBpdHMgTE1BLgorCSAqIEFsc28gbG9jYXRlZCBiZWZvcmUgZmluYWwg QUxJR04oKSBhcyB0cmFpbGluZyBwYWRkaW5nIGlzIG5vdCBzdG9yZWQKKwkgKiBpbiB0aGUgcmVz dWx0aW5nIGJpbmFyeSBmaWxlIGFuZCB1c2VsZXNzIHRvIGNvcHkuCisJICovCisJLmRhdGEuZW5k bWFyayA6IEFUKEFERFIoLmRhdGEuZW5kbWFyaykgLSBMT0FEX09GRlNFVCkgeyB9CisJX2VkYXRh X2xvYyA9IExPQURBRERSKC5kYXRhLmVuZG1hcmspOworCisJLiA9IEFMSUdOKFBBR0VfU0laRSk7 CisJX2VuZCA9IC47CisKKwlTVEFCU19ERUJVRworCURXQVJGX0RFQlVHCisKKwlESVNDQVJEUwor fQpkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9rZXJuZWwvdm1saW51eC5sZHMuUyBiL2FyY2gvcmlz Y3Yva2VybmVsL3ZtbGludXgubGRzLlMKaW5kZXggMDcyNmMwNWUwMzM2Li4wYTU5YjY1Y2Y3ODkg MTAwNjQ0Ci0tLSBhL2FyY2gvcmlzY3Yva2VybmVsL3ZtbGludXgubGRzLlMKKysrIGIvYXJjaC9y aXNjdi9rZXJuZWwvdm1saW51eC5sZHMuUwpAQCAtNCw4ICs0LDEzIEBACiAgKiBDb3B5cmlnaHQg KEMpIDIwMTcgU2lGaXZlCiAgKi8KIAorI2lmZGVmIENPTkZJR19YSVBfS0VSTkVMCisjaW5jbHVk ZSAidm1saW51eC14aXAubGRzLlMiCisjZWxzZQorCiAjaW5jbHVkZSA8YXNtL3BndGFibGUuaD4K ICNkZWZpbmUgTE9BRF9PRkZTRVQgS0VSTkVMX0xJTktfQUREUgorCiAjaW5jbHVkZSA8YXNtL3Zt bGludXgubGRzLmg+CiAjaW5jbHVkZSA8YXNtL3BhZ2UuaD4KICNpbmNsdWRlIDxhc20vY2FjaGUu aD4KQEAgLTEzMywzICsxMzgsNCBAQCBTRUNUSU9OUwogCiAJRElTQ0FSRFMKIH0KKyNlbmRpZiAv KiBDT05GSUdfWElQX0tFUk5FTCAqLwpkaWZmIC0tZ2l0IGEvYXJjaC9yaXNjdi9tbS9pbml0LmMg Yi9hcmNoL3Jpc2N2L21tL2luaXQuYwppbmRleCAwOTNmM2E5NmVjZmMuLjk5NjE1NzNmOWE1NSAx MDA2NDQKLS0tIGEvYXJjaC9yaXNjdi9tbS9pbml0LmMKKysrIGIvYXJjaC9yaXNjdi9tbS9pbml0 LmMKQEAgLTI3LDYgKzI3LDkgQEAKIAogdW5zaWduZWQgbG9uZyBrZXJuZWxfdmlydF9hZGRyID0g S0VSTkVMX0xJTktfQUREUjsKIEVYUE9SVF9TWU1CT0woa2VybmVsX3ZpcnRfYWRkcik7CisjaWZk ZWYgQ09ORklHX1hJUF9LRVJORUwKKyNkZWZpbmUga2VybmVsX3ZpcnRfYWRkciAgICAgICAoKigo dW5zaWduZWQgbG9uZyAqKVhJUF9GSVhVUCgma2VybmVsX3ZpcnRfYWRkcikpKQorI2VuZGlmCiAK IHVuc2lnbmVkIGxvbmcgZW1wdHlfemVyb19wYWdlW1BBR0VfU0laRSAvIHNpemVvZih1bnNpZ25l ZCBsb25nKV0KIAkJCQkJCQlfX3BhZ2VfYWxpZ25lZF9ic3M7CkBAIC0zNCw4ICszNyw4IEBAIEVY UE9SVF9TWU1CT0woZW1wdHlfemVyb19wYWdlKTsKIAogZXh0ZXJuIGNoYXIgX3N0YXJ0W107CiAj ZGVmaW5lIERUQl9FQVJMWV9CQVNFX1ZBICAgICAgUEdESVJfU0laRQotdm9pZCAqZHRiX2Vhcmx5 X3ZhIF9faW5pdGRhdGE7Ci11aW50cHRyX3QgZHRiX2Vhcmx5X3BhIF9faW5pdGRhdGE7Cit2b2lk ICpfZHRiX2Vhcmx5X3ZhIF9faW5pdGRhdGE7Cit1aW50cHRyX3QgX2R0Yl9lYXJseV9wYSBfX2lu aXRkYXRhOwogCiBzdHJ1Y3QgcHRfYWxsb2Nfb3BzIHsKIAlwdGVfdCAqKCpnZXRfcHRlX3ZpcnQp KHBoeXNfYWRkcl90IHBhKTsKQEAgLTExOCw2ICsxMjEsMTAgQEAgdm9pZCBfX2luaXQgc2V0dXBf Ym9vdG1lbSh2b2lkKQogCXBoeXNfYWRkcl90IGRyYW1fZW5kID0gbWVtYmxvY2tfZW5kX29mX0RS QU0oKTsKIAlwaHlzX2FkZHJfdCBtYXhfbWFwcGVkX2FkZHIgPSBfX3BhKH4odWxvbmcpMCk7CiAK KyNpZmRlZiBDT05GSUdfWElQX0tFUk5FTAorCXZtbGludXhfc3RhcnQgPSBfX3BhX3N5bWJvbCgm X3NkYXRhKTsKKyNlbmRpZgorCiAJLyogVGhlIG1heGltYWwgcGh5c2ljYWwgbWVtb3J5IHNpemUg aXMgLVBBR0VfT0ZGU0VULiAqLwogCW1lbWJsb2NrX2VuZm9yY2VfbWVtb3J5X2xpbWl0KC1QQUdF X09GRlNFVCk7CiAKQEAgLTE1OSwxNyArMTY2LDQ0IEBAIHZvaWQgX19pbml0IHNldHVwX2Jvb3Rt ZW0odm9pZCkKIAltZW1ibG9ja19hbGxvd19yZXNpemUoKTsKIH0KIAorI2lmZGVmIENPTkZJR19Y SVBfS0VSTkVMCisKK2V4dGVybiBjaGFyIF94aXByb21bXSwgX2V4aXByb21bXTsKK2V4dGVybiBj aGFyIF9zZGF0YVtdLCBfZWRhdGFbXTsKKworI2VuZGlmIC8qIENPTkZJR19YSVBfS0VSTkVMICov CisKICNpZmRlZiBDT05GSUdfTU1VCi1zdGF0aWMgc3RydWN0IHB0X2FsbG9jX29wcyBwdF9vcHM7 CitzdGF0aWMgc3RydWN0IHB0X2FsbG9jX29wcyBfcHRfb3BzOworCisjaWZkZWYgQ09ORklHX1hJ UF9LRVJORUwKKyNkZWZpbmUgcHRfb3BzICgqKHN0cnVjdCBwdF9hbGxvY19vcHMgKilYSVBfRklY VVAoJl9wdF9vcHMpKQorI2Vsc2UKKyNkZWZpbmUgcHRfb3BzIF9wdF9vcHMKKyNlbmRpZgogCiAv KiBPZmZzZXQgYmV0d2VlbiBsaW5lYXIgbWFwcGluZyB2aXJ0dWFsIGFkZHJlc3MgYW5kIGtlcm5l bCBsb2FkIGFkZHJlc3MgKi8KIHVuc2lnbmVkIGxvbmcgdmFfcGFfb2Zmc2V0OwogRVhQT1JUX1NZ TUJPTCh2YV9wYV9vZmZzZXQpOworI2lmZGVmIENPTkZJR19YSVBfS0VSTkVMCisjZGVmaW5lIHZh X3BhX29mZnNldCAgICgqKCh1bnNpZ25lZCBsb25nICopWElQX0ZJWFVQKCZ2YV9wYV9vZmZzZXQp KSkKKyNlbmRpZgogLyogT2Zmc2V0IGJldHdlZW4ga2VybmVsIG1hcHBpbmcgdmlydHVhbCBhZGRy ZXNzIGFuZCBrZXJuZWwgbG9hZCBhZGRyZXNzICovCiB1bnNpZ25lZCBsb25nIHZhX2tlcm5lbF9w YV9vZmZzZXQ7CiBFWFBPUlRfU1lNQk9MKHZhX2tlcm5lbF9wYV9vZmZzZXQpOworI2lmZGVmIENP TkZJR19YSVBfS0VSTkVMCisjZGVmaW5lIHZhX2tlcm5lbF9wYV9vZmZzZXQgICAgKCooKHVuc2ln bmVkIGxvbmcgKilYSVBfRklYVVAoJnZhX2tlcm5lbF9wYV9vZmZzZXQpKSkKKyNlbmRpZgordW5z aWduZWQgbG9uZyB2YV9rZXJuZWxfeGlwX3BhX29mZnNldDsKK0VYUE9SVF9TWU1CT0wodmFfa2Vy bmVsX3hpcF9wYV9vZmZzZXQpOworI2lmZGVmIENPTkZJR19YSVBfS0VSTkVMCisjZGVmaW5lIHZh X2tlcm5lbF94aXBfcGFfb2Zmc2V0ICAgICAgICAoKigodW5zaWduZWQgbG9uZyAqKVhJUF9GSVhV UCgmdmFfa2VybmVsX3hpcF9wYV9vZmZzZXQpKSkKKyNlbmRpZgogdW5zaWduZWQgbG9uZyBwZm5f YmFzZTsKIEVYUE9SVF9TWU1CT0wocGZuX2Jhc2UpOworI2lmZGVmIENPTkZJR19YSVBfS0VSTkVM CisjZGVmaW5lIHBmbl9iYXNlICAgICAgICgqKCh1bnNpZ25lZCBsb25nICopWElQX0ZJWFVQKCZw Zm5fYmFzZSkpKQorI2VuZGlmCiAKIHBnZF90IHN3YXBwZXJfcGdfZGlyW1BUUlNfUEVSX1BHRF0g X19wYWdlX2FsaWduZWRfYnNzOwogcGdkX3QgdHJhbXBvbGluZV9wZ19kaXJbUFRSU19QRVJfUEdE XSBfX3BhZ2VfYWxpZ25lZF9ic3M7CkBAIC0xNzcsNiArMjExLDEyIEBAIHB0ZV90IGZpeG1hcF9w dGVbUFRSU19QRVJfUFRFXSBfX3BhZ2VfYWxpZ25lZF9ic3M7CiAKIHBnZF90IGVhcmx5X3BnX2Rp cltQVFJTX1BFUl9QR0RdIF9faW5pdGRhdGEgX19hbGlnbmVkKFBBR0VfU0laRSk7CiAKKyNpZmRl ZiBDT05GSUdfWElQX0tFUk5FTAorI2RlZmluZSB0cmFtcG9saW5lX3BnX2RpciAgICAgICgocGdk X3QgKilYSVBfRklYVVAodHJhbXBvbGluZV9wZ19kaXIpKQorI2RlZmluZSBmaXhtYXBfcHRlICAg ICAgICAgICAgICgocHRlX3QgKilYSVBfRklYVVAoZml4bWFwX3B0ZSkpCisjZGVmaW5lIGVhcmx5 X3BnX2RpciAgICAgICAgICAgKChwZ2RfdCAqKVhJUF9GSVhVUChlYXJseV9wZ19kaXIpKQorI2Vu ZGlmIC8qIENPTkZJR19YSVBfS0VSTkVMICovCisKIHZvaWQgX19zZXRfZml4bWFwKGVudW0gZml4 ZWRfYWRkcmVzc2VzIGlkeCwgcGh5c19hZGRyX3QgcGh5cywgcGdwcm90X3QgcHJvdCkKIHsKIAl1 bnNpZ25lZCBsb25nIGFkZHIgPSBfX2ZpeF90b192aXJ0KGlkeCk7CkBAIC0yNTIsNiArMjkyLDEy IEBAIHBtZF90IGZpeG1hcF9wbWRbUFRSU19QRVJfUE1EXSBfX3BhZ2VfYWxpZ25lZF9ic3M7CiBw bWRfdCBlYXJseV9wbWRbUFRSU19QRVJfUE1EXSBfX2luaXRkYXRhIF9fYWxpZ25lZChQQUdFX1NJ WkUpOwogcG1kX3QgZWFybHlfZHRiX3BtZFtQVFJTX1BFUl9QTURdIF9faW5pdGRhdGEgX19hbGln bmVkKFBBR0VfU0laRSk7CiAKKyNpZmRlZiBDT05GSUdfWElQX0tFUk5FTAorI2RlZmluZSB0cmFt cG9saW5lX3BtZCAoKHBtZF90ICopWElQX0ZJWFVQKHRyYW1wb2xpbmVfcG1kKSkKKyNkZWZpbmUg Zml4bWFwX3BtZCAgICAgKChwbWRfdCAqKVhJUF9GSVhVUChmaXhtYXBfcG1kKSkKKyNkZWZpbmUg ZWFybHlfcG1kICAgICAgKChwbWRfdCAqKVhJUF9GSVhVUChlYXJseV9wbWQpKQorI2VuZGlmIC8q IENPTkZJR19YSVBfS0VSTkVMICovCisKIHN0YXRpYyBwbWRfdCAqX19pbml0IGdldF9wbWRfdmly dF9lYXJseShwaHlzX2FkZHJfdCBwYSkKIHsKIAkvKiBCZWZvcmUgTU1VIGlzIGVuYWJsZWQgKi8K QEAgLTM2OCw2ICs0MTQsMTkgQEAgc3RhdGljIHVpbnRwdHJfdCBfX2luaXQgYmVzdF9tYXBfc2l6 ZShwaHlzX2FkZHJfdCBiYXNlLCBwaHlzX2FkZHJfdCBzaXplKQogCXJldHVybiBQTURfU0laRTsK IH0KIAorI2lmZGVmIENPTkZJR19YSVBfS0VSTkVMCisvKiBjYWxsZWQgZnJvbSBoZWFkLlMgd2l0 aCBNTVUgb2ZmICovCithc21saW5rYWdlIHZvaWQgX19pbml0IF9fY29weV9kYXRhKHZvaWQpCit7 CisJdm9pZCAqZnJvbSA9ICh2b2lkICopKCZfc2RhdGEpOworCXZvaWQgKmVuZCA9ICh2b2lkICop KCZfZW5kKTsKKwl2b2lkICp0byA9ICh2b2lkICopQ09ORklHX1BIWVNfUkFNX0JBU0U7CisJc2l6 ZV90IHN6ID0gKHNpemVfdCkoZW5kIC0gZnJvbSArIDEpOworCisJbWVtY3B5KHRvLCBmcm9tLCBz eik7Cit9CisjZW5kaWYKKwogLyoKICAqIHNldHVwX3ZtKCkgaXMgY2FsbGVkIGZyb20gaGVhZC5T IHdpdGggTU1VLW9mZi4KICAqCkBAIC0zODcsNyArNDQ2LDM1IEBAIHN0YXRpYyB1aW50cHRyX3Qg X19pbml0IGJlc3RfbWFwX3NpemUocGh5c19hZGRyX3QgYmFzZSwgcGh5c19hZGRyX3Qgc2l6ZSkK ICNlbmRpZgogCiB1aW50cHRyX3QgbG9hZF9wYSwgbG9hZF9zejsKKyNpZmRlZiBDT05GSUdfWElQ X0tFUk5FTAorI2RlZmluZSBsb2FkX3BhICAgICAgICAoKigodWludHB0cl90ICopWElQX0ZJWFVQ KCZsb2FkX3BhKSkpCisjZGVmaW5lIGxvYWRfc3ogICAgICAgICgqKCh1aW50cHRyX3QgKilYSVBf RklYVVAoJmxvYWRfc3opKSkKKyNlbmRpZgorCisjaWZkZWYgQ09ORklHX1hJUF9LRVJORUwKK3Vp bnRwdHJfdCB4aXByb20sIHhpcHJvbV9zejsKKyNkZWZpbmUgeGlwcm9tX3N6ICAgICAgKCooKHVp bnRwdHJfdCAqKVhJUF9GSVhVUCgmeGlwcm9tX3N6KSkpCisjZGVmaW5lIHhpcHJvbSAgICAgICAg ICgqKCh1aW50cHRyX3QgKilYSVBfRklYVVAoJnhpcHJvbSkpKQogCitzdGF0aWMgdm9pZCBfX2lu aXQgY3JlYXRlX2tlcm5lbF9wYWdlX3RhYmxlKHBnZF90ICpwZ2RpciwgdWludHB0cl90IG1hcF9z aXplKQoreworCXVpbnRwdHJfdCB2YSwgZW5kX3ZhOworCisJLyogTWFwIHRoZSBmbGFzaCByZXNp ZGVudCBwYXJ0ICovCisJZW5kX3ZhID0ga2VybmVsX3ZpcnRfYWRkciArIHhpcHJvbV9zejsKKwlm b3IgKHZhID0ga2VybmVsX3ZpcnRfYWRkcjsgdmEgPCBlbmRfdmE7IHZhICs9IG1hcF9zaXplKQor CQljcmVhdGVfcGdkX21hcHBpbmcocGdkaXIsIHZhLAorCQkJCSAgIHhpcHJvbSArICh2YSAtIGtl cm5lbF92aXJ0X2FkZHIpLAorCQkJCSAgIG1hcF9zaXplLCBQQUdFX0tFUk5FTF9FWEVDKTsKKwor CS8qIE1hcCB0aGUgZGF0YSBpbiBSQU0gKi8KKwllbmRfdmEgPSBrZXJuZWxfdmlydF9hZGRyICsg WElQX09GRlNFVCArIGxvYWRfc3o7CisJZm9yICh2YSA9IGtlcm5lbF92aXJ0X2FkZHIgKyBYSVBf T0ZGU0VUOyB2YSA8IGVuZF92YTsgdmEgKz0gbWFwX3NpemUpCisJCWNyZWF0ZV9wZ2RfbWFwcGlu ZyhwZ2RpciwgdmEsCisJCQkJICAgbG9hZF9wYSArICh2YSAtIChrZXJuZWxfdmlydF9hZGRyICsg WElQX09GRlNFVCkpLAorCQkJCSAgIG1hcF9zaXplLCBQQUdFX0tFUk5FTCk7Cit9CisjZWxzZQog c3RhdGljIHZvaWQgX19pbml0IGNyZWF0ZV9rZXJuZWxfcGFnZV90YWJsZShwZ2RfdCAqcGdkaXIs IHVpbnRwdHJfdCBtYXBfc2l6ZSkKIHsKIAl1aW50cHRyX3QgdmEsIGVuZF92YTsKQEAgLTM5OCwx NiArNDg1LDI4IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBjcmVhdGVfa2VybmVsX3BhZ2VfdGFibGUo cGdkX3QgKnBnZGlyLCB1aW50cHRyX3QgbWFwX3NpemUpCiAJCQkJICAgbG9hZF9wYSArICh2YSAt IGtlcm5lbF92aXJ0X2FkZHIpLAogCQkJCSAgIG1hcF9zaXplLCBQQUdFX0tFUk5FTF9FWEVDKTsK IH0KKyNlbmRpZgogCiBhc21saW5rYWdlIHZvaWQgX19pbml0IHNldHVwX3ZtKHVpbnRwdHJfdCBk dGJfcGEpCiB7Ci0JdWludHB0cl90IHBhOworCXVpbnRwdHJfdCBfX21heWJlX3VudXNlZCBwYTsK IAl1aW50cHRyX3QgbWFwX3NpemU7CiAjaWZuZGVmIF9fUEFHRVRBQkxFX1BNRF9GT0xERUQKIAlw bWRfdCBmaXhfYm1hcF9zcG1kLCBmaXhfYm1hcF9lcG1kOwogI2VuZGlmCisKKyNpZmRlZiBDT05G SUdfWElQX0tFUk5FTAorCXhpcHJvbSA9ICh1aW50cHRyX3QpQ09ORklHX1hJUF9QSFlTX0FERFI7 CisJeGlwcm9tX3N6ID0gKHVpbnRwdHJfdCkoJl9leGlwcm9tKSAtICh1aW50cHRyX3QpKCZfeGlw cm9tKTsKKworCWxvYWRfcGEgPSAodWludHB0cl90KUNPTkZJR19QSFlTX1JBTV9CQVNFOworCWxv YWRfc3ogPSAodWludHB0cl90KSgmX2VuZCkgLSAodWludHB0cl90KSgmX3NkYXRhKTsKKworCXZh X2tlcm5lbF94aXBfcGFfb2Zmc2V0ID0ga2VybmVsX3ZpcnRfYWRkciAtIHhpcHJvbTsKKyNlbHNl CiAJbG9hZF9wYSA9ICh1aW50cHRyX3QpKCZfc3RhcnQpOwogCWxvYWRfc3ogPSAodWludHB0cl90 KSgmX2VuZCkgLSBsb2FkX3BhOworI2VuZGlmCiAKIAl2YV9wYV9vZmZzZXQgPSBQQUdFX09GRlNF VCAtIGxvYWRfcGE7CiAJdmFfa2VybmVsX3BhX29mZnNldCA9IGtlcm5lbF92aXJ0X2FkZHIgLSBs b2FkX3BhOwpAQCAtNDQxLDggKzU0MCwxMyBAQCBhc21saW5rYWdlIHZvaWQgX19pbml0IHNldHVw X3ZtKHVpbnRwdHJfdCBkdGJfcGEpCiAJLyogU2V0dXAgdHJhbXBvbGluZSBQR0QgYW5kIFBNRCAq LwogCWNyZWF0ZV9wZ2RfbWFwcGluZyh0cmFtcG9saW5lX3BnX2Rpciwga2VybmVsX3ZpcnRfYWRk ciwKIAkJCSAgICh1aW50cHRyX3QpdHJhbXBvbGluZV9wbWQsIFBHRElSX1NJWkUsIFBBR0VfVEFC TEUpOworI2lmZGVmIENPTkZJR19YSVBfS0VSTkVMCisJY3JlYXRlX3BtZF9tYXBwaW5nKHRyYW1w b2xpbmVfcG1kLCBrZXJuZWxfdmlydF9hZGRyLAorCQkJICAgeGlwcm9tLCBQTURfU0laRSwgUEFH RV9LRVJORUxfRVhFQyk7CisjZWxzZQogCWNyZWF0ZV9wbWRfbWFwcGluZyh0cmFtcG9saW5lX3Bt ZCwga2VybmVsX3ZpcnRfYWRkciwKIAkJCSAgIGxvYWRfcGEsIFBNRF9TSVpFLCBQQUdFX0tFUk5F TF9FWEVDKTsKKyNlbmRpZgogI2Vsc2UKIAkvKiBTZXR1cCB0cmFtcG9saW5lIFBHRCAqLwogCWNy ZWF0ZV9wZ2RfbWFwcGluZyh0cmFtcG9saW5lX3BnX2Rpciwga2VybmVsX3ZpcnRfYWRkciwKQEAg LTQ3NCw3ICs1NzgsNyBAQCBhc21saW5rYWdlIHZvaWQgX19pbml0IHNldHVwX3ZtKHVpbnRwdHJf dCBkdGJfcGEpCiAJICogd2hlcmVhcyBkdGJfZWFybHlfdmEgd2lsbCBiZSB1c2VkIGJlZm9yZSBz ZXR1cF92bV9maW5hbCBpbnN0YWxscwogCSAqIHRoZSBsaW5lYXIgbWFwcGluZy4KIAkgKi8KLQlk dGJfZWFybHlfdmEgPSBrZXJuZWxfbWFwcGluZ19wYV90b192YShkdGJfcGEpOworCWR0Yl9lYXJs eV92YSA9IGtlcm5lbF9tYXBwaW5nX3BhX3RvX3ZhKFhJUF9GSVhVUChkdGJfcGEpKTsKICNlbmRp ZiAvKiBDT05GSUdfQlVJTFRJTl9EVEIgKi8KICNlbHNlCiAjaWZuZGVmIENPTkZJR19CVUlMVElO X0RUQgpAQCAtNDg2LDcgKzU5MCw3IEBAIGFzbWxpbmthZ2Ugdm9pZCBfX2luaXQgc2V0dXBfdm0o dWludHB0cl90IGR0Yl9wYSkKIAkJCSAgIHBhICsgUEdESVJfU0laRSwgUEdESVJfU0laRSwgUEFH RV9LRVJORUwpOwogCWR0Yl9lYXJseV92YSA9ICh2b2lkICopRFRCX0VBUkxZX0JBU0VfVkEgKyAo ZHRiX3BhICYgKFBHRElSX1NJWkUgLSAxKSk7CiAjZWxzZSAvKiBDT05GSUdfQlVJTFRJTl9EVEIg Ki8KLQlkdGJfZWFybHlfdmEgPSBrZXJuZWxfbWFwcGluZ19wYV90b192YShkdGJfcGEpOworCWR0 Yl9lYXJseV92YSA9IGtlcm5lbF9tYXBwaW5nX3BhX3RvX3ZhKFhJUF9GSVhVUChkdGJfcGEpKTsK ICNlbmRpZiAvKiBDT05GSUdfQlVJTFRJTl9EVEIgKi8KICNlbmRpZgogCWR0Yl9lYXJseV9wYSA9 IGR0Yl9wYTsKQEAgLTUyMiw3ICs2MjYsNyBAQCBhc21saW5rYWdlIHZvaWQgX19pbml0IHNldHVw X3ZtKHVpbnRwdHJfdCBkdGJfcGEpCiAjZW5kaWYKIH0KIAotI2lmZGVmIENPTkZJR182NEJJVAor I2lmIGRlZmluZWQoQ09ORklHXzY0QklUKSAmJiAhZGVmaW5lZChDT05GSUdfWElQX0tFUk5FTCkK IHZvaWQgcHJvdGVjdF9rZXJuZWxfbGluZWFyX21hcHBpbmdfdGV4dF9yb2RhdGEodm9pZCkKIHsK IAl1bnNpZ25lZCBsb25nIHRleHRfc3RhcnQgPSAodW5zaWduZWQgbG9uZylsbV9hbGlhcyhfc3Rh cnQpOwotLSAKMi4yMC4xCgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX18KbGludXgtcmlzY3YgbWFpbGluZyBsaXN0CmxpbnV4LXJpc2N2QGxpc3RzLmluZnJh ZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51 eC1yaXNjdgo=