From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DF03C43616 for ; Thu, 15 Apr 2021 10:11:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DB11161074 for ; Thu, 15 Apr 2021 10:11:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232507AbhDOKLe (ORCPT ); Thu, 15 Apr 2021 06:11:34 -0400 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:23532 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232225AbhDOKLY (ORCPT ); Thu, 15 Apr 2021 06:11:24 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 13FA2Xai022813; Thu, 15 Apr 2021 12:10:42 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=jGSyQ2O25XbQbRpHZcSzRSzuGr9/V7ZwP2TUn/0b4tM=; b=GOakZ+29UJqe0WDHufwpGNNuofj2H6grP6CJTAvGFjfvP0uMom/e8XR2Mk2NQRULzOE9 kyQR7Kh+M48Slhfq24PW112IfgxvRo6g6xt9e9OWuyEICt3Vhw/BO0i/bEs9Wa9eL30L 1hy2m+4J0XgOtNGBC0fwiNwRknAepDBMJOJFxWQSGNCUBXabsIkHk/7AyIeYDxOggf7a UT4wKZtUavkDUVgK424D9EuQJqGFK6ur7F00l/WDl+/7xg44XSzlwJgOXEL/f2Be3+TW LlStJCetpxz6lwS0RqbgtSLSxnEtiYsKcaHJFthFBCUGl72LlI5WKJi/Ahjos+jL/Aw/ nA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 37xg6w1qa7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Apr 2021 12:10:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5AA22100034; Thu, 15 Apr 2021 12:10:42 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4C12A226377; Thu, 15 Apr 2021 12:10:42 +0200 (CEST) Received: from localhost (10.75.127.51) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 15 Apr 2021 12:10:41 +0200 From: Alexandre Torgue To: , , Marek Vasut , , Manivannan Sadhasivam , Marcin Sloniewski , Ahmad Fatoum CC: , , Alexandre Torgue , , , Lee Jones , Subject: [PATCH 03/13] ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings Date: Thu, 15 Apr 2021 12:10:27 +0200 Message-ID: <20210415101037.1465-4-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210415101037.1465-1-alexandre.torgue@foss.st.com> References: <20210415101037.1465-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG3NODE2.st.com (10.75.127.8) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.761 definitions=2021-04-15_03:2021-04-15,2021-04-15 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Prevent warning seen with "make dtbs_check W=1" command: Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary address-cells/size-cells without "ranges" or child "reg" property Signed-off-by: Alexandre Torgue diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 41e0087bdbf9..8748d5850298 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -283,8 +283,6 @@ }; timers13: timers@40001c00 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40001C00 0x400>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>; @@ -299,8 +297,6 @@ }; timers14: timers@40002000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40002000 0x400>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>; @@ -633,8 +629,6 @@ }; timers10: timers@40014400 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014400 0x400>; clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>; @@ -649,8 +643,6 @@ }; timers11: timers@40014800 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014800 0x400>; clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>; diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index e1df603fc981..72c1b76684b6 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -265,8 +265,6 @@ }; timers13: timers@40001c00 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40001C00 0x400>; clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>; @@ -281,8 +279,6 @@ }; timers14: timers@40002000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40002000 0x400>; clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>; @@ -531,8 +527,6 @@ }; timers10: timers@40014400 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014400 0x400>; clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>; @@ -547,8 +541,6 @@ }; timers11: timers@40014800 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014800 0x400>; clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>; diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index 05ecdf9ff03a..6e42ca2dada2 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -485,8 +485,6 @@ }; lptimer4: timer@58002c00 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-lptimer"; reg = <0x58002c00 0x400>; clocks = <&rcc LPTIM4_CK>; @@ -501,8 +499,6 @@ }; lptimer5: timer@58003000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-lptimer"; reg = <0x58003000 0x400>; clocks = <&rcc LPTIM5_CK>; -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85E84C433B4 for ; Thu, 15 Apr 2021 10:13:06 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 074DB61074 for ; Thu, 15 Apr 2021 10:13:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 074DB61074 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=foss.st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qgh5STOY16p1YFYjgArD/p3d4Q+8ANuNE3WzOPXUwwo=; b=bvq3SaU62B6gUZ/jM1hUKQr2i xfaBguwWbCBuLyhg3zowK+WD+SCv6+oaAW/O+2uOs97tzXBmt8jnmyZZH4DSuJXO3ggkI8Ym8Wgce dve/1NRUoAq6tQieBoeoCuzMQU3rNQUR4V+Hx6/vU0WK7qqAsjcOVAXy93ZJShznGpudHhClNDqk5 MKgDSZPA4y2uNVa8ReT9OtDfCC3suiOMTQuLRgwqMiby9a6JI2LlbpJ7YOvrjdWfdUrYqpkyDH2GO tgho/5rsQXR2/d9+mngDqnTbGNOQcpX+WdmOVJ2/zWNp8403jeF5B1Cwmi5QT4isTc/MIayVl7iyl yp1LLVuhw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lWyxv-00Ff40-GC; Thu, 15 Apr 2021 10:11:15 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lWyxd-00Ff1R-DW for linux-arm-kernel@desiato.infradead.org; Thu, 15 Apr 2021 10:10:57 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=jGSyQ2O25XbQbRpHZcSzRSzuGr9/V7ZwP2TUn/0b4tM=; b=4jLm9ARZ1aGMb55chsWjHSDa7R SRTRO5iINb3NLgLd9L/hWoA+m6Qv0J7YcPx03uqyHgXGhvOsTGN0ZR448IjSXEzMervOyPdK/VUiG cWamCqmQEQ4HudSb1t5RDM2oowW3ZzSgrNNExSE8wIIxhTylJj3fMxQo+oEeDnTZWmXhEAdXSsXwS +LSInFUyLApXVHBL2argbFY8uzhgcJTDXkWfcq7zWKJNhY+URCchhg7SUz6RuRHeBjABK9GRkyQSC BTXZPlkgGVDFMHarbhOIH95qcorQc7zBX1PE8dPEZCfzs4ry44IRMKUsl49amBRLJZVKuEOPSHPuZ owGvFw/Q==; Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lWyxZ-008SZK-QM for linux-arm-kernel@lists.infradead.org; Thu, 15 Apr 2021 10:10:55 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 13FA2Xai022813; Thu, 15 Apr 2021 12:10:42 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=jGSyQ2O25XbQbRpHZcSzRSzuGr9/V7ZwP2TUn/0b4tM=; b=GOakZ+29UJqe0WDHufwpGNNuofj2H6grP6CJTAvGFjfvP0uMom/e8XR2Mk2NQRULzOE9 kyQR7Kh+M48Slhfq24PW112IfgxvRo6g6xt9e9OWuyEICt3Vhw/BO0i/bEs9Wa9eL30L 1hy2m+4J0XgOtNGBC0fwiNwRknAepDBMJOJFxWQSGNCUBXabsIkHk/7AyIeYDxOggf7a UT4wKZtUavkDUVgK424D9EuQJqGFK6ur7F00l/WDl+/7xg44XSzlwJgOXEL/f2Be3+TW LlStJCetpxz6lwS0RqbgtSLSxnEtiYsKcaHJFthFBCUGl72LlI5WKJi/Ahjos+jL/Aw/ nA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 37xg6w1qa7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 15 Apr 2021 12:10:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5AA22100034; Thu, 15 Apr 2021 12:10:42 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 4C12A226377; Thu, 15 Apr 2021 12:10:42 +0200 (CEST) Received: from localhost (10.75.127.51) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 15 Apr 2021 12:10:41 +0200 From: Alexandre Torgue To: , , Marek Vasut , , Manivannan Sadhasivam , Marcin Sloniewski , Ahmad Fatoum CC: , , Alexandre Torgue , , , Lee Jones , Subject: [PATCH 03/13] ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings Date: Thu, 15 Apr 2021 12:10:27 +0200 Message-ID: <20210415101037.1465-4-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210415101037.1465-1-alexandre.torgue@foss.st.com> References: <20210415101037.1465-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG3NODE2.st.com (10.75.127.8) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-15_03:2021-04-15, 2021-04-15 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210415_031054_175908_C9E8A49B X-CRM114-Status: GOOD ( 12.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Prevent warning seen with "make dtbs_check W=1" command: Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary address-cells/size-cells without "ranges" or child "reg" property Signed-off-by: Alexandre Torgue diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 41e0087bdbf9..8748d5850298 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -283,8 +283,6 @@ }; timers13: timers@40001c00 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40001C00 0x400>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>; @@ -299,8 +297,6 @@ }; timers14: timers@40002000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40002000 0x400>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>; @@ -633,8 +629,6 @@ }; timers10: timers@40014400 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014400 0x400>; clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>; @@ -649,8 +643,6 @@ }; timers11: timers@40014800 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014800 0x400>; clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>; diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi index e1df603fc981..72c1b76684b6 100644 --- a/arch/arm/boot/dts/stm32f746.dtsi +++ b/arch/arm/boot/dts/stm32f746.dtsi @@ -265,8 +265,6 @@ }; timers13: timers@40001c00 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40001C00 0x400>; clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>; @@ -281,8 +279,6 @@ }; timers14: timers@40002000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40002000 0x400>; clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>; @@ -531,8 +527,6 @@ }; timers10: timers@40014400 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014400 0x400>; clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>; @@ -547,8 +541,6 @@ }; timers11: timers@40014800 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014800 0x400>; clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>; diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index 05ecdf9ff03a..6e42ca2dada2 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -485,8 +485,6 @@ }; lptimer4: timer@58002c00 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-lptimer"; reg = <0x58002c00 0x400>; clocks = <&rcc LPTIM4_CK>; @@ -501,8 +499,6 @@ }; lptimer5: timer@58003000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "st,stm32-lptimer"; reg = <0x58003000 0x400>; clocks = <&rcc LPTIM5_CK>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel