From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH v1 09/10] net: mvpp2: allow MDIO registration for fixed links
Date: Tue, 27 Apr 2021 15:27:16 +0200 [thread overview]
Message-ID: <20210427152713.v1.9.I1200705b9d0838df3f79d1e9e9de4ddeda134ddb@changeid> (raw)
In-Reply-To: <20210427132718.645043-1-sr@denx.de>
From: Stefan Chulski <stefanc@marvell.com>
Currently, there are 2 valid cases for interface, PHY
and mdio relation:
- If an interface has PHY handler, it'll call
mdio_mii_bus_get_from_phy(), which will register
MDIO bus.
- If we want to use fixed-link for an interface,
PHY handle is not defined in the DTS, and no
MDIO is registered.
There is a third case, for some boards (with switch),
the MDIO is used for switch configuration, but the interface
itself uses fixed link. This patch allows this option by
checking if fixed-link subnode is defined, in this case,
MDIO bus is registers, but the PHY address is set to
PHY_MAX_ADDR for this interface, so this interface will
not try to access the PHY later on.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
---
drivers/net/mvpp2.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 3d920e85ffef..c5bfe41281d6 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4787,16 +4787,25 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
u32 id;
u32 phyaddr = 0;
int phy_mode = -1;
+ int fixed_link = 0;
int ret;
phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy");
+ fixed_link = fdt_subnode_offset(gd->fdt_blob, port_node, "fixed-link");
if (phy_node > 0) {
int parent;
- phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node, "reg", 0);
- if (phyaddr < 0) {
- dev_err(dev, "could not find phy address\n");
- return -1;
+
+ if (fixed_link != -FDT_ERR_NOTFOUND) {
+ /* phy_addr is set to invalid value for fixed links */
+ phyaddr = PHY_MAX_ADDR;
+ } else {
+ phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node,
+ "reg", 0);
+ if (phyaddr < 0) {
+ dev_err(dev, "could not find phy address\n");
+ return -1;
+ }
}
parent = fdt_parent_offset(gd->fdt_blob, phy_node);
ret = uclass_get_device_by_of_offset(UCLASS_MDIO, parent,
--
2.31.1
next prev parent reply other threads:[~2021-04-27 13:27 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-27 13:27 [PATCH v1 00/10] net: mvpp2: Sync Marvell mvpp2 driver with Marvell version Stefan Roese
2021-04-27 13:27 ` [PATCH v1 01/10] phy: introduce 1000BaseX and 2500BaseX modes Stefan Roese
2021-04-27 13:27 ` [PATCH v1 02/10] net: mvpp2: add CP115 port1 10G/5G SFI support Stefan Roese
2021-04-29 20:20 ` Ramon Fried
2021-04-27 13:27 ` [PATCH v1 03/10] net: mvpp2: add 1000BaseX and 2500BaseX ppv2 support Stefan Roese
2021-04-29 20:23 ` Ramon Fried
2021-04-27 13:27 ` [PATCH v1 04/10] net: mvpp2: remove redundant SMI address configuration Stefan Roese
2021-04-29 20:23 ` Ramon Fried
2021-04-27 13:27 ` [PATCH v1 05/10] net: mvpp2: Fix 2.5G GMII_SPEED configurations Stefan Roese
2021-04-27 13:48 ` [EXT] " Kostya Porotchkin
2021-04-27 13:58 ` Stefan Roese
2021-04-27 13:27 ` [PATCH v1 06/10] net: mvpp2: AN Bypass in 1000 and 2500 basex mode Stefan Roese
2021-04-27 13:27 ` [PATCH v1 07/10] net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REG Stefan Roese
2021-04-27 13:27 ` [PATCH v1 08/10] net: mvpp2: fix missing switch case break Stefan Roese
2021-04-29 20:24 ` Ramon Fried
2021-04-30 4:40 ` Stefan Roese
2021-04-30 14:18 ` Ramon Fried
2021-05-03 6:13 ` Stefan Roese
2021-05-03 19:42 ` Ramon Fried
2021-04-27 13:27 ` Stefan Roese [this message]
2021-04-29 20:26 ` [PATCH v1 09/10] net: mvpp2: allow MDIO registration for fixed links Ramon Fried
2021-04-27 13:27 ` [PATCH v1 10/10] net: mvpp2: add explicit sgmii-2500 support Stefan Roese
2021-04-29 20:25 ` Ramon Fried
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