On Sun, Apr 25, 2021 at 08:36:02PM +0800, Kevin Tang wrote:
> From: Kevin Tang <kevin.tang@unisoc.com>
> 
> The Unisoc DRM master device is a virtual device needed to list all
> DPU devices or other display interface nodes that comprise the
> graphics subsystem
> 
> Unisoc's display pipeline have several components as below
> description, multi display controllers and corresponding physical
> interfaces.
> For different display scenarios, dpu0 and dpu1 maybe binding to
> different encoder.
> 
> E.g:
>   dpu0 and dpu1 both binding to DSI for dual mipi-dsi display;
>   dpu0 binding to DSI for primary display, and dpu1 binding to DP for
>   external display;
> 
> Cc: Orson Zhai <orsonzhai@gmail.com>
> Cc: Chunyan Zhang <zhang.lyra@gmail.com>
> Signed-off-by: Kevin Tang <kevin.tang@unisoc.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  .../display/sprd/sprd,display-subsystem.yaml  | 64 +++++++++++++++++++
>  1 file changed, 64 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml
> new file mode 100644
> index 000000000..3d107e943
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/sprd/sprd,display-subsystem.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Unisoc DRM master device
> +
> +maintainers:
> +  - Kevin Tang <kevin.tang@unisoc.com>
> +
> +description: |
> +  The Unisoc DRM master device is a virtual device needed to list all
> +  DPU devices or other display interface nodes that comprise the
> +  graphics subsystem.
> +
> +  Unisoc's display pipeline have several components as below description,
> +  multi display controllers and corresponding physical interfaces.
> +  For different display scenarios, dpu0 and dpu1 maybe binding to different
> +  encoder.
> +
> +  E.g:
> +  dpu0 and dpu1 both binding to DSI for dual mipi-dsi display;
> +  dpu0 binding to DSI for primary display, and dpu1 binding to DP for external display;
> +
> +          +-----------------------------------------+
> +          |                                         |
> +          |                            +---------+  |
> +  +----+  |   +----+    +---------+    |DPHY/CPHY|  |   +------+
> +  |    +----->+dpu0+--->+MIPI|DSI +--->+Combo    +----->+Panel0|
> +  |AXI |  |   +----+    +---------+    +---------+  |   +------+
> +  |    |  |                  ^                      |
> +  |    |  |                  |                      |
> +  |    |  |      +-----------+                      |
> +  |    |  |      |                                  |
> +  |APB |  |   +--+-+    +-----------+    +---+      |   +------+
> +  |    +----->+dpu1+--->+DisplayPort+--->+PHY+--------->+Panel1|
> +  |    |  |   +----+    +-----------+    +---+      |   +------+
> +  +----+  |                                         |
> +          +-----------------------------------------+
> +
> +properties:
> +  compatible:
> +    const: sprd,display-subsystem
> +
> +  ports:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description:
> +      Should contain a list of phandles pointing to display interface port
> +      of DPU devices.
> +
> +required:
> +  - compatible
> +  - ports
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    display-subsystem {
> +        compatible = "sprd,display-subsystem";
> +        ports = <&dpu_out>;
> +    };

Given your diagram, I guess it should be the dpu input?

Maxime