From: Jason Ekstrand <jason@jlekstrand.net> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Jason Ekstrand <jason@jlekstrand.net> Subject: [PATCH 18/27] drm/i915/gem: Optionally set SSEU in intel_context_set_gem Date: Mon, 3 May 2021 10:57:39 -0500 [thread overview] Message-ID: <20210503155748.1961781-19-jason@jlekstrand.net> (raw) In-Reply-To: <20210503155748.1961781-1-jason@jlekstrand.net> For now this is a no-op because everyone passes in a null SSEU but it lets us get some of the error handling and selftest refactoring plumbed through. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 41 +++++++++++++++---- .../gpu/drm/i915/gem/selftests/mock_context.c | 6 ++- 2 files changed, 36 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index ce729e640bbf7..6dd50d669c5b9 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -320,9 +320,12 @@ context_get_vm_rcu(struct i915_gem_context *ctx) } while (1); } -static void intel_context_set_gem(struct intel_context *ce, - struct i915_gem_context *ctx) +static int intel_context_set_gem(struct intel_context *ce, + struct i915_gem_context *ctx, + struct intel_sseu sseu) { + int ret = 0; + GEM_BUG_ON(rcu_access_pointer(ce->gem_context)); RCU_INIT_POINTER(ce->gem_context, ctx); @@ -349,6 +352,12 @@ static void intel_context_set_gem(struct intel_context *ce, intel_context_set_watchdog_us(ce, (u64)timeout_ms * 1000); } + + /* A valid SSEU has no zero fields */ + if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS)) + ret = intel_context_reconfigure_sseu(ce, sseu); + + return ret; } static void __free_engines(struct i915_gem_engines *e, unsigned int count) @@ -416,7 +425,8 @@ static struct i915_gem_engines *alloc_engines(unsigned int count) return e; } -static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) +static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx, + struct intel_sseu rcs_sseu) { const struct intel_gt *gt = &ctx->i915->gt; struct intel_engine_cs *engine; @@ -429,6 +439,8 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) for_each_engine(engine, gt, id) { struct intel_context *ce; + struct intel_sseu sseu = {}; + int ret; if (engine->legacy_idx == INVALID_ENGINE) continue; @@ -442,10 +454,18 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) goto free_engines; } - intel_context_set_gem(ce, ctx); - e->engines[engine->legacy_idx] = ce; e->num_engines = max(e->num_engines, engine->legacy_idx + 1); + + if (engine->class == RENDER_CLASS) + sseu = rcs_sseu; + + ret = intel_context_set_gem(ce, ctx, sseu); + if (ret) { + err = ERR_PTR(ret); + goto free_engines; + } + } return e; @@ -759,6 +779,7 @@ __create_context(struct drm_i915_private *i915, { struct i915_gem_context *ctx; struct i915_gem_engines *e; + struct intel_sseu null_sseu = {}; int err; int i; @@ -776,7 +797,7 @@ __create_context(struct drm_i915_private *i915, INIT_LIST_HEAD(&ctx->stale.engines); mutex_init(&ctx->engines_mutex); - e = default_engines(ctx); + e = default_engines(ctx, null_sseu); if (IS_ERR(e)) { err = PTR_ERR(e); goto err_free; @@ -1544,6 +1565,7 @@ set_engines__load_balance(struct i915_user_extension __user *base, void *data) struct intel_engine_cs *stack[16]; struct intel_engine_cs **siblings; struct intel_context *ce; + struct intel_sseu null_sseu = {}; u16 num_siblings, idx; unsigned int n; int err; @@ -1616,7 +1638,7 @@ set_engines__load_balance(struct i915_user_extension __user *base, void *data) goto out_siblings; } - intel_context_set_gem(ce, set->ctx); + intel_context_set_gem(ce, set->ctx, null_sseu); if (cmpxchg(&set->engines->engines[idx], NULL, ce)) { intel_context_put(ce); @@ -1724,6 +1746,7 @@ set_engines(struct i915_gem_context *ctx, struct drm_i915_private *i915 = ctx->i915; struct i915_context_param_engines __user *user = u64_to_user_ptr(args->value); + struct intel_sseu null_sseu = {}; struct set_engines set = { .ctx = ctx }; unsigned int num_engines, n; u64 extensions; @@ -1733,7 +1756,7 @@ set_engines(struct i915_gem_context *ctx, if (!i915_gem_context_user_engines(ctx)) return 0; - set.engines = default_engines(ctx); + set.engines = default_engines(ctx, null_sseu); if (IS_ERR(set.engines)) return PTR_ERR(set.engines); @@ -1790,7 +1813,7 @@ set_engines(struct i915_gem_context *ctx, return PTR_ERR(ce); } - intel_context_set_gem(ce, ctx); + intel_context_set_gem(ce, ctx, null_sseu); set.engines->engines[n] = ce; } diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c b/drivers/gpu/drm/i915/gem/selftests/mock_context.c index e0f512ef7f3c6..cbeefd060e97b 100644 --- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c +++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c @@ -14,6 +14,7 @@ mock_context(struct drm_i915_private *i915, { struct i915_gem_context *ctx; struct i915_gem_engines *e; + struct intel_sseu null_sseu = {}; ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -31,7 +32,7 @@ mock_context(struct drm_i915_private *i915, i915_gem_context_set_persistence(ctx); mutex_init(&ctx->engines_mutex); - e = default_engines(ctx); + e = default_engines(ctx, null_sseu); if (IS_ERR(e)) goto err_free; RCU_INIT_POINTER(ctx->engines, e); @@ -112,6 +113,7 @@ live_context_for_engine(struct intel_engine_cs *engine, struct file *file) { struct i915_gem_engines *engines; struct i915_gem_context *ctx; + struct intel_sseu null_sseu = {}; struct intel_context *ce; engines = alloc_engines(1); @@ -130,7 +132,7 @@ live_context_for_engine(struct intel_engine_cs *engine, struct file *file) return ERR_CAST(ce); } - intel_context_set_gem(ce, ctx); + intel_context_set_gem(ce, ctx, null_sseu); engines->engines[0] = ce; engines->num_engines = 1; -- 2.31.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Jason Ekstrand <jason@jlekstrand.net> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 18/27] drm/i915/gem: Optionally set SSEU in intel_context_set_gem Date: Mon, 3 May 2021 10:57:39 -0500 [thread overview] Message-ID: <20210503155748.1961781-19-jason@jlekstrand.net> (raw) In-Reply-To: <20210503155748.1961781-1-jason@jlekstrand.net> For now this is a no-op because everyone passes in a null SSEU but it lets us get some of the error handling and selftest refactoring plumbed through. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 41 +++++++++++++++---- .../gpu/drm/i915/gem/selftests/mock_context.c | 6 ++- 2 files changed, 36 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index ce729e640bbf7..6dd50d669c5b9 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -320,9 +320,12 @@ context_get_vm_rcu(struct i915_gem_context *ctx) } while (1); } -static void intel_context_set_gem(struct intel_context *ce, - struct i915_gem_context *ctx) +static int intel_context_set_gem(struct intel_context *ce, + struct i915_gem_context *ctx, + struct intel_sseu sseu) { + int ret = 0; + GEM_BUG_ON(rcu_access_pointer(ce->gem_context)); RCU_INIT_POINTER(ce->gem_context, ctx); @@ -349,6 +352,12 @@ static void intel_context_set_gem(struct intel_context *ce, intel_context_set_watchdog_us(ce, (u64)timeout_ms * 1000); } + + /* A valid SSEU has no zero fields */ + if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS)) + ret = intel_context_reconfigure_sseu(ce, sseu); + + return ret; } static void __free_engines(struct i915_gem_engines *e, unsigned int count) @@ -416,7 +425,8 @@ static struct i915_gem_engines *alloc_engines(unsigned int count) return e; } -static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) +static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx, + struct intel_sseu rcs_sseu) { const struct intel_gt *gt = &ctx->i915->gt; struct intel_engine_cs *engine; @@ -429,6 +439,8 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) for_each_engine(engine, gt, id) { struct intel_context *ce; + struct intel_sseu sseu = {}; + int ret; if (engine->legacy_idx == INVALID_ENGINE) continue; @@ -442,10 +454,18 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) goto free_engines; } - intel_context_set_gem(ce, ctx); - e->engines[engine->legacy_idx] = ce; e->num_engines = max(e->num_engines, engine->legacy_idx + 1); + + if (engine->class == RENDER_CLASS) + sseu = rcs_sseu; + + ret = intel_context_set_gem(ce, ctx, sseu); + if (ret) { + err = ERR_PTR(ret); + goto free_engines; + } + } return e; @@ -759,6 +779,7 @@ __create_context(struct drm_i915_private *i915, { struct i915_gem_context *ctx; struct i915_gem_engines *e; + struct intel_sseu null_sseu = {}; int err; int i; @@ -776,7 +797,7 @@ __create_context(struct drm_i915_private *i915, INIT_LIST_HEAD(&ctx->stale.engines); mutex_init(&ctx->engines_mutex); - e = default_engines(ctx); + e = default_engines(ctx, null_sseu); if (IS_ERR(e)) { err = PTR_ERR(e); goto err_free; @@ -1544,6 +1565,7 @@ set_engines__load_balance(struct i915_user_extension __user *base, void *data) struct intel_engine_cs *stack[16]; struct intel_engine_cs **siblings; struct intel_context *ce; + struct intel_sseu null_sseu = {}; u16 num_siblings, idx; unsigned int n; int err; @@ -1616,7 +1638,7 @@ set_engines__load_balance(struct i915_user_extension __user *base, void *data) goto out_siblings; } - intel_context_set_gem(ce, set->ctx); + intel_context_set_gem(ce, set->ctx, null_sseu); if (cmpxchg(&set->engines->engines[idx], NULL, ce)) { intel_context_put(ce); @@ -1724,6 +1746,7 @@ set_engines(struct i915_gem_context *ctx, struct drm_i915_private *i915 = ctx->i915; struct i915_context_param_engines __user *user = u64_to_user_ptr(args->value); + struct intel_sseu null_sseu = {}; struct set_engines set = { .ctx = ctx }; unsigned int num_engines, n; u64 extensions; @@ -1733,7 +1756,7 @@ set_engines(struct i915_gem_context *ctx, if (!i915_gem_context_user_engines(ctx)) return 0; - set.engines = default_engines(ctx); + set.engines = default_engines(ctx, null_sseu); if (IS_ERR(set.engines)) return PTR_ERR(set.engines); @@ -1790,7 +1813,7 @@ set_engines(struct i915_gem_context *ctx, return PTR_ERR(ce); } - intel_context_set_gem(ce, ctx); + intel_context_set_gem(ce, ctx, null_sseu); set.engines->engines[n] = ce; } diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c b/drivers/gpu/drm/i915/gem/selftests/mock_context.c index e0f512ef7f3c6..cbeefd060e97b 100644 --- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c +++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c @@ -14,6 +14,7 @@ mock_context(struct drm_i915_private *i915, { struct i915_gem_context *ctx; struct i915_gem_engines *e; + struct intel_sseu null_sseu = {}; ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -31,7 +32,7 @@ mock_context(struct drm_i915_private *i915, i915_gem_context_set_persistence(ctx); mutex_init(&ctx->engines_mutex); - e = default_engines(ctx); + e = default_engines(ctx, null_sseu); if (IS_ERR(e)) goto err_free; RCU_INIT_POINTER(ctx->engines, e); @@ -112,6 +113,7 @@ live_context_for_engine(struct intel_engine_cs *engine, struct file *file) { struct i915_gem_engines *engines; struct i915_gem_context *ctx; + struct intel_sseu null_sseu = {}; struct intel_context *ce; engines = alloc_engines(1); @@ -130,7 +132,7 @@ live_context_for_engine(struct intel_engine_cs *engine, struct file *file) return ERR_CAST(ce); } - intel_context_set_gem(ce, ctx); + intel_context_set_gem(ce, ctx, null_sseu); engines->engines[0] = ce; engines->num_engines = 1; -- 2.31.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-03 15:58 UTC|newest] Thread overview: 135+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-03 15:57 [PATCH 00/27] drm/i915/gem: ioctl clean-ups (v5) Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 01/27] drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 02/27] drm/i915: Stop storing the ring size in the ring pointer Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 8:47 ` Daniel Vetter 2021-05-04 8:47 ` [Intel-gfx] " Daniel Vetter 2021-05-14 18:06 ` Jason Ekstrand 2021-05-14 18:06 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 03/27] drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 8:48 ` Daniel Vetter 2021-05-04 8:48 ` Daniel Vetter 2021-05-03 15:57 ` [PATCH 04/27] drm/i915/gem: Set the watchdog timeout directly in intel_context_set_gem (v2) Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 05/27] drm/i915/gem: Return void from context_apply_all Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 06/27] drm/i915: Drop the CONTEXT_CLONE API Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 8:50 ` Daniel Vetter 2021-05-04 8:50 ` Daniel Vetter 2021-05-14 18:07 ` Jason Ekstrand 2021-05-14 18:07 ` Jason Ekstrand 2021-05-03 15:57 ` [PATCH 07/27] drm/i915: Implement SINGLE_TIMELINE with a syncobj (v4) Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 08/27] drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 09/27] drm/i915/gem: Disallow bonding of virtual engines (v3) Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 10/27] drm/i915/gem: Remove engine auto-magic with FENCE_SUBMIT Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 8:56 ` Daniel Vetter 2021-05-04 8:56 ` [Intel-gfx] " Daniel Vetter 2021-05-14 18:19 ` Jason Ekstrand 2021-05-14 18:19 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 11/27] drm/i915/request: Remove the hook from await_execution Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 8:55 ` Daniel Vetter 2021-05-04 8:55 ` [Intel-gfx] " Daniel Vetter 2021-05-03 15:57 ` [PATCH 12/27] drm/i915/gem: Disallow creating contexts with too many engines Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-05 9:56 ` Tvrtko Ursulin 2021-05-05 9:56 ` Tvrtko Ursulin 2021-05-03 15:57 ` [PATCH 13/27] drm/i915: Stop manually RCU banging in reset_stats_ioctl (v2) Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 14/27] drm/i915/gem: Add a separate validate_priority helper Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 15/27] drm/i915: Add gem/i915_gem_context.h to the docs Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 9:11 ` Daniel Vetter 2021-05-04 9:11 ` [Intel-gfx] " Daniel Vetter 2021-05-03 15:57 ` [PATCH 16/27] drm/i915/gem: Add an intermediate proto_context struct Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 16:13 ` Daniel Vetter 2021-05-04 16:13 ` [Intel-gfx] " Daniel Vetter 2021-06-02 21:53 ` Jason Ekstrand 2021-06-02 21:53 ` [Intel-gfx] " Jason Ekstrand 2021-06-03 7:07 ` Daniel Vetter 2021-06-03 7:07 ` [Intel-gfx] " Daniel Vetter 2021-05-05 10:09 ` Tvrtko Ursulin 2021-05-05 10:09 ` Tvrtko Ursulin 2021-05-03 15:57 ` [PATCH 17/27] drm/i915/gem: Rework error handling in default_engines Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 16:17 ` Daniel Vetter 2021-05-04 16:17 ` Daniel Vetter 2021-05-14 18:21 ` Jason Ekstrand 2021-05-14 18:21 ` Jason Ekstrand 2021-05-03 15:57 ` Jason Ekstrand [this message] 2021-05-03 15:57 ` [Intel-gfx] [PATCH 18/27] drm/i915/gem: Optionally set SSEU in intel_context_set_gem Jason Ekstrand 2021-05-04 19:00 ` Daniel Vetter 2021-05-04 19:00 ` Daniel Vetter 2021-05-05 9:28 ` Tvrtko Ursulin 2021-05-05 9:28 ` Tvrtko Ursulin 2021-05-05 9:47 ` Daniel Vetter 2021-05-05 9:47 ` Daniel Vetter 2021-05-05 9:52 ` Tvrtko Ursulin 2021-05-05 9:52 ` Tvrtko Ursulin 2021-05-03 15:57 ` [PATCH 19/27] drm/i915/gem: Use the proto-context to handle create parameters Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-04 20:33 ` Daniel Vetter 2021-05-04 20:33 ` [Intel-gfx] " Daniel Vetter 2021-05-14 19:13 ` Jason Ekstrand 2021-05-14 19:13 ` [Intel-gfx] " Jason Ekstrand 2021-05-17 13:40 ` Daniel Vetter 2021-05-17 13:40 ` [Intel-gfx] " Daniel Vetter 2021-05-17 17:04 ` Jason Ekstrand 2021-05-17 17:04 ` [Intel-gfx] " Jason Ekstrand 2021-05-17 18:44 ` Daniel Vetter 2021-05-17 18:44 ` [Intel-gfx] " Daniel Vetter 2021-05-18 10:51 ` Jani Nikula 2021-05-18 10:51 ` [Intel-gfx] " Jani Nikula 2021-05-03 15:57 ` [PATCH 20/27] drm/i915/gem: Return an error ptr from context_lookup Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 21/27] drm/i915/gt: Drop i915_address_space::file (v2) Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 15:57 ` [PATCH 22/27] drm/i915/gem: Delay context creation Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 19:38 ` kernel test robot 2021-05-03 19:38 ` kernel test robot 2021-05-03 19:38 ` kernel test robot 2021-05-04 20:53 ` Daniel Vetter 2021-05-04 20:53 ` Daniel Vetter 2021-05-04 20:53 ` Daniel Vetter 2021-05-04 20:53 ` Daniel Vetter 2021-05-04 20:53 ` Daniel Vetter 2021-05-03 15:57 ` [PATCH 23/27] drm/i915/gem: Don't allow changing the VM on running contexts Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-03 18:52 ` kernel test robot 2021-05-03 18:52 ` kernel test robot 2021-05-03 18:52 ` kernel test robot 2021-05-04 21:00 ` Daniel Vetter 2021-05-04 21:00 ` Daniel Vetter 2021-05-04 21:00 ` Daniel Vetter 2021-05-04 21:17 ` Daniel Vetter 2021-05-04 21:17 ` Daniel Vetter 2021-05-03 15:57 ` [PATCH 24/27] drm/i915/gem: Don't allow changing the engine set " Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-05 9:49 ` Daniel Vetter 2021-05-05 9:49 ` Daniel Vetter 2021-05-03 15:57 ` [PATCH 25/27] drm/i915/selftests: Take a VM in kernel_context() Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-05 9:50 ` Daniel Vetter 2021-05-05 9:50 ` [Intel-gfx] " Daniel Vetter 2021-05-03 15:57 ` [PATCH 26/27] i915/gem/selftests: Assign the VM at context creation in igt_shared_ctx_exec Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-05 9:53 ` Daniel Vetter 2021-05-05 9:53 ` Daniel Vetter 2021-05-03 15:57 ` [PATCH 27/27] drm/i915/gem: Roll all of context creation together Jason Ekstrand 2021-05-03 15:57 ` [Intel-gfx] " Jason Ekstrand 2021-05-05 10:05 ` Daniel Vetter 2021-05-05 10:05 ` Daniel Vetter 2021-05-03 20:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: ioctl clean-ups (rev4) Patchwork 2021-05-03 20:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-05-03 20:38 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
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