* [PATCH v3 3/3] ARM: imx7: add support for IoTmaxx GW4100
2021-05-06 8:31 [PATCH v3 1/3] dt-bindings: Add DS2482 as trivial device Steffen Trumtrar
2021-05-06 8:31 ` [PATCH v3 2/3] dt-bindings: Add vendor prefix for IoTmaxx GmbH Steffen Trumtrar
@ 2021-05-06 8:31 ` Steffen Trumtrar
1 sibling, 0 replies; 3+ messages in thread
From: Steffen Trumtrar @ 2021-05-06 8:31 UTC (permalink / raw)
To: Shawn Guo, Rob Herring; +Cc: linux-arm-kernel, Fabio Estevam, linux-imx
The GW4100 is an i.MX7D based board from IoTmaxx GmbH.
The support is almost complete apart from the pmic setup.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
Changes since v2:
- remove memory node
- fixup node names to generic versions
- fix phy-reset bindings
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx7d-iotmaxx-gw4100.dts | 776 +++++++++++++++++++++
2 files changed, 777 insertions(+)
create mode 100644 arch/arm/boot/dts/imx7d-iotmaxx-gw4100.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8e5d4ab4e75e..3bc142407004 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -653,6 +653,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-colibri-eval-v3.dtb \
imx7d-flex-concentrator.dtb \
imx7d-flex-concentrator-mfg.dtb \
+ imx7d-iotmaxx-gw4100.dtb \
imx7d-mba7.dtb \
imx7d-meerkat96.dtb \
imx7d-nitrogen7.dtb \
diff --git a/arch/arm/boot/dts/imx7d-iotmaxx-gw4100.dts b/arch/arm/boot/dts/imx7d-iotmaxx-gw4100.dts
new file mode 100644
index 000000000000..70b27e942f81
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-iotmaxx-gw4100.dts
@@ -0,0 +1,776 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+* Copyright (C) 2020 Steffen Trumtrar, Pengutronix
+* Copyright (C) 2020 Jürgen Borleis, Pengutronix
+*/
+
+/dts-v1/;
+#include "imx7d.dtsi"
+
+/ {
+ model = "IoTmaxx i.MX7D GW4100 Gateway";
+ compatible = "iotmaxx,imx7d-gw4100", "fsl,imx7d";
+
+ chosen {
+ stdout-path = &uart3;
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
+ <&adc2 0>, <&adc2 1>, <&adc2 2>;
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pinctrl_leds_usr>;
+ pinctrl-names = "default";
+
+ usr1 {
+ label = "iotmaxx:green:usr1";
+ gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ usr2 {
+ label = "iotmaxx:green:usr2";
+ gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ /* Main power supply at J1303 */
+ main_input: main-input-power-24v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "24v0";
+ regulator-min-microvolt = <24000000>;
+ regulator-max-microvolt = <24000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ main_power: regulator-main-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&main_input>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_ldo_emmc_3v3: regulator-ldo-emmc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "ldo_emmc_v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_ldo_misc_3v3: regulator-ldo-misc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "ldo_misc_v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_dcdc_1v8: regulator-ldo-dcdc-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "ldo_dcdc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reg_vadc_1v8: regulator-vadc-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vadc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ /* Power for the serial converter. Needs to be enabled on boot */
+ reg_5v_periph: regulator-5v-periph {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_5v_reg>;
+ compatible = "regulator-fixed";
+ regulator-name = "5v_periph";
+ vin-supply = <&main_power>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ /*
+ * There is no consumer for the GSM modem yet. Power needs to be
+ * enabled before &usb_hub is probed. Otherwise the Modem is never
+ * enumerated.
+ */
+ reg_gsm_pwr_en_3v3: regulator-gsm-pwr-en-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gsm_pwr_en_3v3";
+ pinctrl-names = "default";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_otg2_vbus";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&adc1 {
+ vref-supply = <®_vadc_1v8>;
+ status = "okay";
+};
+
+&adc2 {
+ vref-supply = <®_vadc_1v8>;
+ status = "okay";
+};
+
+&ecspi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ cs-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ flash: spi-flash@0 {
+ compatible = "sst,sst25vf512", "m25p80", "jedec,spi-nor";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@1 {
+ reg = <0x0 0x10000>;
+ };
+ };
+};
+
+/* Expansion slot */
+&ecspi3 {
+ /* disabled by default, changed by a DTS overlay */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi3>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>,
+ <&pinctrl_mdio>,
+ <&pinctrl_rmii_phy>;
+ /* set the enet_ref_clk and enet_out with a 50MHz clock */
+ assigned-clocks = <&clks IMX7D_ENET_PHY_REF_ROOT_DIV>;
+ assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+ assigned-clock-rates = <50000000>;
+ clocks = <&clks IMX7D_ENET2_IPG_ROOT_CLK>,
+ <&clks IMX7D_ENET_AXI_ROOT_CLK>,
+ <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
+ <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>,
+ <&clks IMX7D_ENET2_REF_ROOT_DIV>;
+ clock-names = "ipg", "ahb", "ptp",
+ "enet_clk_ref", "enet_out";
+ phy-handle = <ðphy1>;
+ phy-mode = "rmii";
+ fsl,magic-packet;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@1 {
+ interrupt-parent = <&gpio2>;
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clks IMX7D_ENET2_REF_ROOT_DIV>;
+ clock-names = "rmii-ref";
+ reset-names = "phy";
+ reset-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
+ reg = <1>;
+ };
+ };
+};
+
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ xceiver-supply = <®_5v_periph>;
+ status = "okay";
+};
+
+&gpio1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio1>;
+
+ gpio-line-names = "gpio1_highside",
+ "gpio1_lowside", "gpio1_pullup", "n_gpio1_in", "gpio2_highside", "gpio2_lowside",
+ "n_usb_ext_oc", "usb_ext_pwr", "", "", "",
+ "", "", "", "", "",
+ "", "", "", "", "",
+ "", "", "", "", "",
+ "", "", "", "", "",
+ "";
+};
+
+&gpio2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio2>;
+ status = "okay";
+
+ gpio-line-names = "",
+ "", "5v_periph_en", "", "sim_cd1", "sim_cd2",
+ "", "", "", "", "",
+ "", "", "", "", "gsm_pwr_en_3v3",
+ "", "", "n_usbhub_int", "usbhub_connect", "",
+ "", "", "", "", "",
+ "", "", "", "", "n_usbhub_rst",
+ "";
+};
+
+&gpio3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio3>;
+ status = "okay";
+
+ gpio-line-names = "",
+ "", "", "", "vusb_gsm_en", "",
+ "", "", "", "", "",
+ "", "", "", "", "",
+ "", "", "", "", "",
+ "", "", "", "", "sim_enable",
+ "", "", "", "", "",
+ "";
+};
+
+&gpio4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio4>,
+ <&pinctrl_gpio4_hog>;
+ status = "okay";
+
+ gpio-line-names = "",
+ "", "", "", "", "",
+ "", "", "", "", "",
+ "", "n_can_term_en", "", "led_usr2", "led_usr1",
+ "sim_sel", "gsm_reset", "", "n_gsm_pwr_ind", "",
+ "", "", "", "", "",
+ "", "", "", "", "",
+ "";
+
+ gsm-pwr-on-off {
+ gpio-hog;
+ gpios = <18 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "gsm_power_on_off";
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ 1wiremaster@18 {
+ compatible = "maxim,ds2482";
+ reg = <0x18>;
+ };
+};
+
+/* CTRL_I2C */
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+
+ usb_hub: usb-hub@8 {
+ compatible = "smsc,usb3503";
+ reg = <0x8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ initial-mode = <1>; /* HUB mode */
+ reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
+ intn-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
+ connect-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ clocks = <&clks IMX7D_OSC_24M_CLK>;
+ clock-names = "refclk";
+ };
+
+ tpm: tpm@20 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tpm_irq>;
+ compatible = "infineon,slb9645tt";
+ interrupts-extended = <&gpio2 0 IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x20>;
+ };
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c64";
+ vcc-supply = <®_ldo_misc_3v3>;
+ pagesize = <32>;
+ reg = <0x50>;
+ };
+
+ pcf85363: rtc@51 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcf_irq>;
+ compatible = "nxp,pcf85363";
+ interrupts-extended = <&gpio2 29 IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x51>;
+ };
+
+ ACT8847: pmic@5a {
+ /* PMIC */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_act_irg>;
+ compatible = "activa,act8847";
+ interrupts-extended = <&gpio3 26 IRQ_TYPE_LEVEL_LOW>;
+ reg = <0x5A>;
+ };
+};
+
+/* EXP_I2C */
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ clock-frequency = <100000>;
+ status = "okay";
+ /*
+ * This EEPROM is part of an expansion board. And thus, it might not
+ * be present, if no expansion board is attached.
+ * But in order to be able to detect it, we must list it here a dummy.
+ * Due to the nature of an optional expansion board, we cannot define
+ * the EEPROM's power supply here, as it can be 5V (regulator-5v-periph)
+ * or * 3.3 V (regulator-ldo-misc-3v3)
+ */
+ exp_eeprom: eeprom@50 {
+ compatible = "atmel,24cs64";
+ pagesize = <32>;
+ reg = <0x50>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hook>;
+
+ pinctrl_hook: hookgrp {
+ /*
+ * The following pads correspond to the UART6 connected to
+ * the modem. As long the modem is not powered, the signals
+ * should be forced to low level. It isn't possible for RxD,
+ * since it has an external PU.
+ * This block can be removed, when dealing with the modem is implemented.
+ */
+ fsl,pins = <
+ /* 1.8 V power domain */
+ MX7D_PAD_SD1_CLK__GPIO5_IO3 0x14 /* 100 k PD */
+ MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x04 /* external PU */
+ MX7D_PAD_SD1_WP__UART6_DCE_TX 0x14 /* 100 k PD */
+ MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* 100 k PD */
+ MX7D_PAD_SD1_CMD__GPIO5_IO4 0x14 /* RI input, 100 k PD */
+ /* 3.3 V power domain */
+ MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x04 /* DTR out, external PD and level shifter */
+ MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x14 /* DCD in, 100 k PD, external level shifter */
+ >;
+ };
+
+ pinctrl_act_irg: act1grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x58 /* 47 k PU + Hys */
+ >;
+ };
+
+ pinctrl_ecspi2: ecspi2grp {
+ fsl,pins = <
+ MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c /* 100 k PU */
+ MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74 /* 100 k PU */
+ MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x00 /* fast slew rate */
+ MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x00 /* fast slew rate */
+ >;
+ };
+
+ pinctrl_ecspi3: ecspi3grp {
+ fsl,pins = <
+ MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO 0x7c /* EXP_SPI_MISO */
+ MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI 0x74 /* EXP_SPI_MOSI */
+ MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK 0x00 /* EXP_SPI_CLK */
+ MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 0x00 /* EXP_SPI_CS, fast slew rate */
+ >;
+ };
+
+ pinctrl_pcf_irq: pcf1grp{
+ fsl,pins = <
+ MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x58 /* 47 k PU + Hys */
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x5 /* ENET2_CRS_DV */
+ MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER 0x5 /* ENET2_RXER */
+ MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x5 /* ENET2_TXD0 */
+ MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x5 /* ENET2_TXD1 */
+ MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x5 /* ENET2_RXD0 */
+ MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x5 /* ENET2_RXD1 */
+ MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x5 /* ENET2_B-CAST_OFF */
+ MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x5 /* ENET2_TXEN */
+ MX7D_PAD_EPDC_BDR0__CCM_ENET_REF_CLK2 0x40000001 /* ENET2_TX_CLK */
+ >;
+ };
+
+ pinctrl_tpm_irq: tpm1grp {
+ fsl,pins = <
+ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x58 /* 47 k PU + Hys */
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a
+ MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52
+ >;
+ };
+
+ pinctrl_5v_reg: reg5v1grp {
+ fsl,pins = <
+ MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x04 /* 5V_PERIPH_EN */
+ >;
+ };
+
+ pinctrl_gpio2: gpio2grp {
+ fsl,pins = <
+ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x14 /* GSM_PWR_EN_3V3 */
+ MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x14 /* SIM_CD1 */
+ MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14 /* SIM_CD2 */
+ >;
+ };
+
+ pinctrl_gpio3: gpio3grp {
+ fsl,pins = <
+ MX7D_PAD_LCD_RESET__GPIO3_IO4 0x79 /* VUSB_GSM_EN */
+ MX7D_PAD_LCD_DATA20__GPIO3_IO25 0x14 /* SIM_ENABLE */
+ >;
+ };
+
+ pinctrl_gpio4: gpio4grp {
+ fsl,pins = <
+ MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x59 /* !GSM_PWR_IND */
+ MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59 /* SIM_SEL */
+ MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x59 /* !CAN_TERM_EN */
+ MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x03 /* GSM_RST */
+ >;
+ };
+
+ pinctrl_gpio4_hog: gpio4hoggrp {
+ fsl,pins = <
+ MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x73 /* GSM_POWER_ON_OFF */
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x40000078
+ MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x40000078
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA 0x40000078
+ MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL 0x40000078
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ /* external 4.7 k PU */
+ MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000000C
+ /* external 4.7 k PU */
+ MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000000C
+ >;
+ };
+
+ pinctrl_leds_usr: ledsusrgrp {
+ fsl,pins = <
+ MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x51 /* LED USR1 */
+ MX7D_PAD_I2C4_SCL__GPIO4_IO14 0x51 /* LED USR2 */
+ >;
+ };
+
+ pinctrl_mdio: mdiogrp {
+ fsl,pins = <
+ MX7D_PAD_UART2_RX_DATA__ENET2_MDIO 0x3 /* ENET_MDIO */
+ MX7D_PAD_UART2_TX_DATA__ENET2_MDC 0x3 /* ENET_MDC */
+ >;
+ };
+
+ pinctrl_rmii_phy: phygrp {
+ fsl,pins = <
+ MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x59 /* !ENET2_RST */
+ MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x59 /* !ENET2_INT */
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x79
+ MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x79
+ MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x79
+ MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x79
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x79 /* RS485_DE */
+ MX7D_PAD_I2C2_SCL__UART4_DCE_RX 0x79 /* RS485_R */
+ MX7D_PAD_I2C2_SDA__UART4_DCE_TX 0x79 /* RS458_D */
+ >;
+ };
+
+ pinctrl_uart6: uart6grp {
+ fsl,pins = <
+ /* 1.8 V power domain */
+ MX7D_PAD_SD1_CLK__UART6_DCE_CTS 0x04 /* input */
+ MX7D_PAD_SD1_CD_B__UART6_DCE_RX 0x04 /* input, external PU */
+ MX7D_PAD_SD1_WP__UART6_DCE_TX 0x00
+ MX7D_PAD_SD1_RESET_B__UART6_DCE_RTS 0x00
+ MX7D_PAD_SD1_CMD__GPIO5_IO4 0x04 /* RI input */
+ /* 3.3 V power domain */
+ MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x00 /* DTR out, external level shifter */
+ MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x54 /* DCD in, 47 k PU, external level shifter */
+ >;
+ };
+
+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <
+ MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x59 /* !USBHUB_RST */
+ MX7D_PAD_EPDC_SDOE__GPIO2_IO18 0x59 /* !USBHUB_INT */
+ MX7D_PAD_EPDC_SDSHR__GPIO2_IO19 0x59 /* USBHUB_CONNECT */
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX7D_PAD_SD2_CMD__SD2_CMD 0x59
+ MX7D_PAD_SD2_CLK__SD2_CLK 0x19
+ MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
+ MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
+ MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
+ MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
+ MX7D_PAD_SD2_CD_B__SD2_CD_B 0x59
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x59
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x19
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
+ MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
+ MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
+ MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
+ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
+ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
+ MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
+ MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
+ MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
+ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
+ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
+ MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
+ MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
+ MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
+ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
+ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
+ >;
+ };
+
+ pinctrl_wdog1: wdog1grp {
+ fsl,pins = <
+ MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY 0x51
+ >;
+ };
+};
+
+&iomuxc_lpsr {
+ pinctrl_gpio1: gpio1grp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x00 /* GPIO1_HIGHSIDE */
+ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x00 /* GPIO1_LOWSIDE */
+ MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x00 /* GPIO1_PULLUP */
+ MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x00 /* GPIO1_IN */
+ MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x00 /* GPIO2_HIGHSIDE */
+ MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x00 /* GPIO2_LOWSIDE */
+ MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x00 /* !USB_EXT_OC */
+ >;
+ };
+
+ pinctrl_usb_otg2_vbus_reg: usbotg2vbusreggrp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* USB_EXT_PWR */
+ >;
+ };
+};
+
+&uart2 {
+ /* TODO spare serial at J1300 */
+ uart-has-rtscts;
+};
+
+&uart3 {
+ /* Serial Console at J1305 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+/* Maxlinear SP483 RS-485 transceiver */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+ linux,rs485-enabled-at-boot-time;
+ status = "okay";
+};
+
+&uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart6>;
+ /* TODO used for GSM communication */
+ uart-has-rtscts;
+};
+
+&uart7 {
+ /* spare serial at J500 */
+};
+
+&usbphynop3 {
+ vcc-supply = <®_ldo_misc_3v3>;
+};
+
+&usbh {
+ disable-over-current;
+ status = "okay";
+};
+
+&usbphynop1 {
+ vcc-supply = <®_usb_otg1_vbus>;
+};
+
+&usbotg1 {
+ vbus-supply = <®_ldo_misc_3v3>;
+ dr_mode = "otg";
+ disable-over-current;
+ status = "okay";
+};
+
+&usbphynop2 {
+ vcc-supply = <®_usb_otg2_vbus>;
+};
+
+&usbotg2 {
+ vbus-supply = <®_usb_otg2_vbus>;
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ status = "okay";
+};
+
+&usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
+ assigned-clock-rates = <400000000>;
+ bus-width = <8>;
+ no-sd;
+ no-sdio;
+ disable-wp;
+ fsl,tuning-step = <2>;
+ non-removable;
+ vmmc-supply = <®_ldo_emmc_3v3>;
+ vqmmc-supply = <®_dcdc_1v8>;
+ status = "okay";
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog1>;
+ fsl,ext-reset-output;
+};
+
+/* These watchdogs are unused, *BUT* as the ext-reset-output on wdog1 is
+ * muxed to the WDOG_ANY pin, any watchdog that triggers also triggers the
+ * WDOG_ANY pin. The i.MX2 watchdog has an internal power-down counter of
+ * 16s. This counter is set after every POR and then runs and triggers if it
+ * is not disabled. When wdog2/3/4 are not probed on startup, they will therefore
+ * trigger the WDOG_ANY pin after 16s. Set the status to okay, so the driver will
+ * disable the power-down counter.
+ */
+
+&wdog2 {
+ status = "okay";
+};
+
+&wdog3 {
+ status = "okay";
+};
+
+&wdog4 {
+ status = "okay";
+};
--
2.29.2
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