From: Will Deacon <will@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Will Deacon <will@kernel.org>, Christoph Hellwig <hch@lst.de>,
Catalin Marinas <catalin.marinas@arm.com>,
Ard Biesheuvel <ardb@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Subject: [PATCH 3/3] arm64: mm: Remove unused support for Normal-WT memory type
Date: Thu, 6 May 2021 10:50:34 +0100 [thread overview]
Message-ID: <20210506095034.15246-4-will@kernel.org> (raw)
In-Reply-To: <20210506095034.15246-1-will@kernel.org>
The Normal-WT memory type is unused, so remove it and reclaim a MAIR.
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 5 ++---
arch/arm64/include/asm/pgtable-prot.h | 1 -
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/mm/proc.S | 1 -
4 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index ea268be37ea2..865fa2ab51b2 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -135,9 +135,8 @@
#define MT_NORMAL 0
#define MT_NORMAL_TAGGED 1
#define MT_NORMAL_NC 2
-#define MT_NORMAL_WT 3
-#define MT_DEVICE_nGnRnE 4
-#define MT_DEVICE_nGnRE 5
+#define MT_DEVICE_nGnRnE 3
+#define MT_DEVICE_nGnRE 4
/*
* Memory types for Stage-2 translation
diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
index fab2f573f7a4..8923c9b119ae 100644
--- a/arch/arm64/include/asm/pgtable-prot.h
+++ b/arch/arm64/include/asm/pgtable-prot.h
@@ -55,7 +55,6 @@ extern bool arm64_use_ng_mappings;
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
-#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
#define PROT_NORMAL_TAGGED (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_TAGGED))
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index aa8e53dd8686..ec27455d2a44 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -652,7 +652,6 @@
#define MAIR_ATTR_DEVICE_nGnRnE UL(0x00)
#define MAIR_ATTR_DEVICE_nGnRE UL(0x04)
#define MAIR_ATTR_NORMAL_NC UL(0x44)
-#define MAIR_ATTR_NORMAL_WT UL(0xbb)
#define MAIR_ATTR_NORMAL_TAGGED UL(0xf0)
#define MAIR_ATTR_NORMAL UL(0xff)
#define MAIR_ATTR_MASK UL(0xff)
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index be6e5d1e3673..c2d57eb0e671 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -60,7 +60,6 @@
MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
- MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) | \
MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL_TAGGED))
#ifdef CONFIG_CPU_PM
--
2.31.1.607.g51e8a6a459-goog
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next prev parent reply other threads:[~2021-05-06 9:53 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-06 9:50 [PATCH 0/3] Free up a couple of MAIRs Will Deacon
2021-05-06 9:50 ` [PATCH 1/3] arm64: mm: Remove unused support for Device-GRE memory type Will Deacon
2021-05-06 13:25 ` Catalin Marinas
2021-05-06 9:50 ` [PATCH 2/3] arm64: acpi: Map EFI_MEMORY_WT memory as Normal-NC Will Deacon
2021-05-06 10:14 ` Ard Biesheuvel
2021-05-06 13:25 ` Catalin Marinas
2021-05-06 17:45 ` Ard Biesheuvel
2021-05-06 10:20 ` Mark Rutland
2021-05-06 10:46 ` Will Deacon
2021-05-06 11:00 ` Mark Rutland
2021-05-06 11:30 ` Ard Biesheuvel
2021-05-06 9:50 ` Will Deacon [this message]
2021-05-06 13:26 ` [PATCH 3/3] arm64: mm: Remove unused support for Normal-WT memory type Catalin Marinas
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