From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6825C43461 for ; Sat, 8 May 2021 12:26:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BF46860FE9 for ; Sat, 8 May 2021 12:26:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230508AbhEHM1k (ORCPT ); Sat, 8 May 2021 08:27:40 -0400 Received: from ns.lynxeye.de ([87.118.118.114]:59873 "EHLO lynxeye.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230419AbhEHM1k (ORCPT ); Sat, 8 May 2021 08:27:40 -0400 Received: by lynxeye.de (Postfix, from userid 501) id 56DDEE74251; Sat, 8 May 2021 14:17:05 +0200 (CEST) Received: from astat.fritz.box (a89-183-71-68.net-htp.de [89.183.71.68]) by lynxeye.de (Postfix) with ESMTPA id 78830E74251; Sat, 8 May 2021 14:17:01 +0200 (CEST) From: Lucas Stach To: Shawn Guo , Rob Herring , "Lukas F . Hartmann" Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] arm64: dts: imx8mq: add support for MNT Reform2 Date: Sat, 8 May 2021 14:16:50 +0200 Message-Id: <20210508121650.105864-3-dev@lynxeye.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210508121650.105864-1-dev@lynxeye.de> References: <20210508121650.105864-1-dev@lynxeye.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds a basic devicetree for the MNT Reform2 DIY laptop. Not all of the board periperals are enabled yet, as some of them still require kernel patches to work properly. The nodes for those peripherals will be added as soon as the required patches are upstream. The following has been tested to work: - UART console - SD card - eMMC - Gigabit Ethernet - USB (internal Keyboard, Mouse, external ports) - M.2 PCIe port Co-developed-by: Lukas F. Hartmann Signed-off-by: Lucas Stach --- .../devicetree/bindings/arm/fsl.yaml | 1 + arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mq-mnt-reform2.dts | 164 ++++++++++++++++++ 3 files changed, 166 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 15519cc2d2c0..fd208c7e49ae 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -737,6 +737,7 @@ properties: - purism,librem5-devkit # Purism Librem5 devkit - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk + - mntre,reform2 # MNT Reform2 Laptop - const: fsl,imx8mq - description: Purism Librem5 phones diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 44890d56c194..e45c8f9c8912 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r4.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mq-mnt-reform2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-phanbell.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts new file mode 100644 index 000000000000..8a7a483fa4d1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/* + * Copyright 2019-2021 MNT Research GmbH + * Copyright 2021 Lucas Stach +*/ + +/dts-v1/; + +#include "imx8mq-nitrogen-som.dtsi" + +/ { + model = "MNT Reform 2"; + compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq"; + + pcie1_refclk: clock-pcie1-refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + reg_main_5v: regulator-main-5v { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_main_3v3: regulator-main-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_main_usb: regulator-main-usb { + compatible = "regulator-fixed"; + regulator-name = "USB_PWR"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_main_5v>; + }; +}; + +&fec1 { + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + pcf8523: pcf8523@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + }; +}; + +&pcie1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie1>; + reset-gpio = <&gpio3 23 GPIO_ACTIVE_LOW>; + clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, + <&clk IMX8MQ_CLK_PCIE2_AUX>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&pcie1_refclk>; + clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + status = "okay"; +}; + +®_1p8v { + vin-supply = <®_main_5v>; +}; + +®_snvs { + vin-supply = <®_main_5v>; +}; + +®_arm_dram { + vin-supply = <®_main_5v>; +}; + +®_dram_1p1v { + vin-supply = <®_main_5v>; +}; + +®_soc_gpu_vpu { + vin-supply = <®_main_5v>; +}; + +&snvs_rtc { + status = "disabled"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usb3_phy0 { + vbus-supply = <®_main_usb>; + status = "okay"; +}; + +&usb3_phy1 { + vbus-supply = <®_main_usb>; + status = "okay"; +}; + +&usb_dwc3_0 { + status = "okay"; + dr_mode = "host"; +}; + +&usb_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&usdhc2 { + assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; + assigned-clock-rates = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + vqmmc-supply = <®_main_3v3>; + vmmc-supply = <®_main_3v3>; + bus-width = <4>; + status = "okay"; +}; + +&iomuxc { + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f + MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f + >; + }; + + pinctrl_pcie1: pcie1grp { + fsl,pins = < + MX8MQ_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x16 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x45 + MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x45 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 + MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 + MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 + MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 + MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 + MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 + >; + }; +}; -- 2.31.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F27BC433ED for ; Sat, 8 May 2021 12:29:08 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D5CE61414 for ; Sat, 8 May 2021 12:29:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0D5CE61414 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lynxeye.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=v035Lg4ohhfjdfuY7VOFzAYQsz+zMVje6kNTG3Kpufo=; b=WOQXza16CGB8YuS/Y5M7HbDEu hWvLMavrEraJVO9J4rFef71pTPYAGH/WsfyzjnD1NSmyuAzuBlMrsByv9eWZj5Mr6ba7Fgwou3Txg IkVKOxUTVTLjl5EoyrBbWBwQek3qgZ6WVNwrrCbl6USfFAwyYGtfmyu7MgoWUuoN+P+G5d6xWnhMv NMsOa7ZDMUxa4KOlnQEF5BjaMU193fqTBJTZn9HTmOEjWu25diCvzUgz+DtKrsk/xWZiyMDmHzRoj jlHIE5DZC94vkZBnAHj76inDJ5FP0hpXon3RspeQnVOhAF0Ev6rTwpFlxFoeBMq01w0+2sZRcbGt+ AvW0rvRAQ==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lfM31-009WIE-CE; Sat, 08 May 2021 12:27:07 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lfM2d-009WFC-Iy for linux-arm-kernel@desiato.infradead.org; Sat, 08 May 2021 12:26:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender :Reply-To:Content-Type:Content-ID:Content-Description; bh=yTjEYejzdoVGttkMX+A2PF5YROEm4/nSTQ2St1jJ1Hs=; b=cFxV8XW0ywYM+agw3bwR5MScR4 j/9vFzR23btly+MulIZZB2MEn04ITTEKzp0PsdJ3YL+FBLoxhuO/gIauN7dmCufwQO7Lu/pIi8QNU oaiFN3nWfP/J6F1yv7E50mGm6aTegtjQ58te3Ur7sO5/rWIrcT4i3+saVAeHJwGdd68ng3QYESV8s g8viPEc6RcBzOIQXVwfQfTAXtbF+z4OxEy8iUaG1BN3Q/3JAGFW2J0FDBJHAfuYDBFcWG3PYusffH TvYTS2KfvefZsObd9zJqaygoLIbnoU5MyvzCDo0pLq1OQtuAv6adI0t1QEQlVcBMroXfxUB6qHEDK kj413n+w==; Received: from ns.lynxeye.de ([87.118.118.114] helo=lynxeye.de) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lfM2Z-007XHq-HT for linux-arm-kernel@lists.infradead.org; Sat, 08 May 2021 12:26:42 +0000 Received: by lynxeye.de (Postfix, from userid 501) id 56DDEE74251; Sat, 8 May 2021 14:17:05 +0200 (CEST) Received: from astat.fritz.box (a89-183-71-68.net-htp.de [89.183.71.68]) by lynxeye.de (Postfix) with ESMTPA id 78830E74251; Sat, 8 May 2021 14:17:01 +0200 (CEST) From: Lucas Stach To: Shawn Guo , Rob Herring , "Lukas F . Hartmann" Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] arm64: dts: imx8mq: add support for MNT Reform2 Date: Sat, 8 May 2021 14:16:50 +0200 Message-Id: <20210508121650.105864-3-dev@lynxeye.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210508121650.105864-1-dev@lynxeye.de> References: <20210508121650.105864-1-dev@lynxeye.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210508_052639_893032_468B6571 X-CRM114-Status: GOOD ( 17.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds a basic devicetree for the MNT Reform2 DIY laptop. Not all of the board periperals are enabled yet, as some of them still require kernel patches to work properly. The nodes for those peripherals will be added as soon as the required patches are upstream. The following has been tested to work: - UART console - SD card - eMMC - Gigabit Ethernet - USB (internal Keyboard, Mouse, external ports) - M.2 PCIe port Co-developed-by: Lukas F. Hartmann Signed-off-by: Lucas Stach --- .../devicetree/bindings/arm/fsl.yaml | 1 + arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mq-mnt-reform2.dts | 164 ++++++++++++++++++ 3 files changed, 166 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 15519cc2d2c0..fd208c7e49ae 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -737,6 +737,7 @@ properties: - purism,librem5-devkit # Purism Librem5 devkit - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk + - mntre,reform2 # MNT Reform2 Laptop - const: fsl,imx8mq - description: Purism Librem5 phones diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 44890d56c194..e45c8f9c8912 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -54,6 +54,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r4.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mq-mnt-reform2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-phanbell.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts new file mode 100644 index 000000000000..8a7a483fa4d1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/* + * Copyright 2019-2021 MNT Research GmbH + * Copyright 2021 Lucas Stach +*/ + +/dts-v1/; + +#include "imx8mq-nitrogen-som.dtsi" + +/ { + model = "MNT Reform 2"; + compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq"; + + pcie1_refclk: clock-pcie1-refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + reg_main_5v: regulator-main-5v { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_main_3v3: regulator-main-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_main_usb: regulator-main-usb { + compatible = "regulator-fixed"; + regulator-name = "USB_PWR"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_main_5v>; + }; +}; + +&fec1 { + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + pcf8523: pcf8523@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + }; +}; + +&pcie1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie1>; + reset-gpio = <&gpio3 23 GPIO_ACTIVE_LOW>; + clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>, + <&clk IMX8MQ_CLK_PCIE2_AUX>, + <&clk IMX8MQ_CLK_PCIE2_PHY>, + <&pcie1_refclk>; + clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus"; + status = "okay"; +}; + +®_1p8v { + vin-supply = <®_main_5v>; +}; + +®_snvs { + vin-supply = <®_main_5v>; +}; + +®_arm_dram { + vin-supply = <®_main_5v>; +}; + +®_dram_1p1v { + vin-supply = <®_main_5v>; +}; + +®_soc_gpu_vpu { + vin-supply = <®_main_5v>; +}; + +&snvs_rtc { + status = "disabled"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usb3_phy0 { + vbus-supply = <®_main_usb>; + status = "okay"; +}; + +&usb3_phy1 { + vbus-supply = <®_main_usb>; + status = "okay"; +}; + +&usb_dwc3_0 { + status = "okay"; + dr_mode = "host"; +}; + +&usb_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&usdhc2 { + assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; + assigned-clock-rates = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + vqmmc-supply = <®_main_3v3>; + vmmc-supply = <®_main_3v3>; + bus-width = <4>; + status = "okay"; +}; + +&iomuxc { + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f + MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f + >; + }; + + pinctrl_pcie1: pcie1grp { + fsl,pins = < + MX8MQ_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x16 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x45 + MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x45 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 + MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 + MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 + MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 + MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 + MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 + >; + }; +}; -- 2.31.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel