From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81927C433ED for ; Mon, 10 May 2021 15:59:55 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 33A596161C for ; Mon, 10 May 2021 15:59:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 33A596161C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:MIME-Version:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:Cc:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=UqEaVDIzje3InoWLYFBseCIaaa6HiS/q+4qJcfi9BXc=; b=km+YjXsTvypgNB5NZVzUE3IHzw /wTZNd0xNno7mbXsfvkNaDQx0U0Ly2/VANbKkCYWcCNXn9AnNkDeSeiIAG0JrYWTLsO4z1Cu2W3rp e5iNPESYoKQSHx/1AW6ayd0KUuTBp47w1zJDycQ+OltwUk6Nrn12UYEKT9rydli1S5jRzpeHF1Fu9 im6+m3WQPS6LKXKzPqJCbWHUGemwsgHe3BBsWFwpkxy0Yn48mBhuLM/PXCeFjFKRD3o+SqCaI/Iv4 ICUob+/2jmHqUK8NRuxtmI35M5cdaP06wDKbfLkMwSHLA1K37yGzMCQ+svkQI9GXoetaky8zq19Qx T4kenG/g==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lg8I9-00Eqj6-O0; Mon, 10 May 2021 15:57:57 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lg8HH-00EqRU-Pg for linux-arm-kernel@desiato.infradead.org; Mon, 10 May 2021 15:57:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=References:In-Reply-To:Message-Id: Date:Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description; bh=+psv8Ofgdst1QY1yXYTRfTx96O07fCxWWDty7kcHZX8=; b=DJ7avxry4m1LMzIHvtBk3Fd1Nt FpWGTMCeJ/F0pOvn4xfJ3DkwHyhZE29MYcCXCIocgu9cxAXvzWXsgVltWU3/Zmv0TW14I52dVx9JR 6kOojVi82sLiGNSEnEHfmmWPWy+HHv7T4w5QrAwiGpxv2uhD9hTVrk7NqXIKyv9fyHb9JiAcnt/pD pgd9865ug53XLimukq4UV19R3l4r9svXJILrXnUGctbq7UB9HJY5beyAsZm2cDydid0+MqJN1iLD2 0SrRWRQsQaeyEDHVGAOqBNtInU4T3tOpVcESUTRsGoZow7WyOWezbhppjxF9R1+y8JdUyDFpvO17J aIA/vhqA==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lg8HF-008tN1-1l for linux-arm-kernel@lists.infradead.org; Mon, 10 May 2021 15:57:02 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C3B7168F; Mon, 10 May 2021 08:57:00 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 566053F73B; Mon, 10 May 2021 08:56:59 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com Cc: james.morse@arm.com, mark.rutland@arm.com, maz@kernel.org Subject: [PATCH 05/14] arm64: entry: move preempt logic to C Date: Mon, 10 May 2021 16:56:12 +0100 Message-Id: <20210510155621.52811-6-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210510155621.52811-1-mark.rutland@arm.com> References: <20210510155621.52811-1-mark.rutland@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210510_085701_156734_64E3BEC2 X-CRM114-Status: GOOD ( 15.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently portions of our preempt logic are written in C while other parts are written in assembly. There's no reason any of this needs to live in assembly, so let's move the rest of the lgoic to C. At the same time, let's make the comment a bit clearer. Other than the increased lockdep coverage there should be no functional change as a result of this patch. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: James Morse Cc: Marc Zyngier Cc: Will Deacon --- arch/arm64/kernel/entry-common.c | 12 ++++++++++++ arch/arm64/kernel/entry.S | 13 ------------- 2 files changed, 12 insertions(+), 13 deletions(-) diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index 33b3660beea3..87997a4a0936 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -121,6 +121,18 @@ asmlinkage void __sched arm64_preempt_schedule_irq(void) { lockdep_assert_irqs_disabled(); + if (preempt_count() != 0) + return; + + /* + * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC + * priority masking is used the GIC irqchip driver will clear DAIF.IF + * using gic_arch_enable_irqs() for normal IRQs. If anything is set in + * DAIF we must have handled an NMI, so skip preemption. + */ + if (system_uses_irq_prio_masking() && read_sysreg(daif)) + return; + /* * Preempting a task from an IRQ means we leave copies of PSTATE * on the stack. cpufeature's enable calls may modify PSTATE, but diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 656f3129bfef..8c7ddd651756 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -561,20 +561,7 @@ tsk .req x28 // current thread_info irq_handler \handler #ifdef CONFIG_PREEMPTION - ldr x24, [tsk, #TSK_TI_PREEMPT] // get preempt count -alternative_if ARM64_HAS_IRQ_PRIO_MASKING - /* - * DA were cleared at start of handling, and IF are cleared by - * the GIC irqchip driver using gic_arch_enable_irqs() for - * normal IRQs. If anything is set, it means we come back from - * an NMI instead of a normal IRQ, so skip preemption - */ - mrs x0, daif - orr x24, x24, x0 -alternative_else_nop_endif - cbnz x24, 1f // preempt count != 0 || NMI return path bl arm64_preempt_schedule_irq // irq en/disable is done inside -1: #endif mov x0, sp -- 2.11.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel