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From: Rob Herring <robh@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: devicetree@vger.kernel.org, Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	linux-mtd@lists.infradead.org,
	Naga Sureshkumar Relli <nagasure@xilinx.com>,
	Michal Simek <monstr@monstr.eu>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v2 1/5] dt-binding: mtd: nand: Document gpio-cs property
Date: Mon, 10 May 2021 11:51:25 -0500	[thread overview]
Message-ID: <20210510165125.GA261277@robh.at.kernel.org> (raw)
In-Reply-To: <20210510104051.9701-2-miquel.raynal@bootlin.com>

On Mon, May 10, 2021 at 12:40:47PM +0200, Miquel Raynal wrote:
> To reach higher capacities, arrays of chips are now pretty common.
> Unfortunately, most of the controllers have been designed a decade ago
> and did not all anticipate the need for several chip-selects. The new
> cs-gpios property allows to workaround this limitation by adding as many
> GPIO chip-select as needed.

Subject and example have wrong property name.

> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  .../devicetree/bindings/mtd/nand-controller.yaml | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index 678b39952502..70a400e385b2 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -38,6 +38,15 @@ properties:
>  
>    ranges: true
>  
> +  cs-gpios:
> +    description:
> +      Array of chip-select available to the controller. The first
> +      entries are a 1:1 mapping of the available chip-select on the
> +      NAND controller (even if they are not used). As many additional
> +      chip-select as needed may follow and should be phandles of GPIO
> +      lines. 'reg' entries of the NAND chip subnodes become indexes of
> +      this array when this property is present.

Can we put some 'maxItems' value here. I want to make the meta-schema 
enforce that. I realize there's not really one here, but a 'should be 
enough' value is fine. We can bump it up if needed.

> +
>  patternProperties:
>    "^nand@[a-f0-9]$":
>      type: object
> @@ -164,14 +173,19 @@ examples:
>      nand-controller {
>        #address-cells = <1>;
>        #size-cells = <0>;
> +      gpio-cs = <0>, <&gpioA 1>; /* A single native CS is available */
>  
>        /* controller specific properties */
>  
>        nand@0 {
> -        reg = <0>;
> +        reg = <0>; /* Native CS */
>          nand-use-soft-ecc-engine;
>          nand-ecc-algo = "bch";
>  
>          /* controller specific properties */
>        };
> +
> +      nand@1 {
> +        reg = <1>; /* GPIO CS */
> +      };
>      };
> -- 
> 2.27.0
> 

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: devicetree@vger.kernel.org, Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	linux-mtd@lists.infradead.org,
	Naga Sureshkumar Relli <nagasure@xilinx.com>,
	Michal Simek <monstr@monstr.eu>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v2 1/5] dt-binding: mtd: nand: Document gpio-cs property
Date: Mon, 10 May 2021 11:51:25 -0500	[thread overview]
Message-ID: <20210510165125.GA261277@robh.at.kernel.org> (raw)
In-Reply-To: <20210510104051.9701-2-miquel.raynal@bootlin.com>

On Mon, May 10, 2021 at 12:40:47PM +0200, Miquel Raynal wrote:
> To reach higher capacities, arrays of chips are now pretty common.
> Unfortunately, most of the controllers have been designed a decade ago
> and did not all anticipate the need for several chip-selects. The new
> cs-gpios property allows to workaround this limitation by adding as many
> GPIO chip-select as needed.

Subject and example have wrong property name.

> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  .../devicetree/bindings/mtd/nand-controller.yaml | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index 678b39952502..70a400e385b2 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -38,6 +38,15 @@ properties:
>  
>    ranges: true
>  
> +  cs-gpios:
> +    description:
> +      Array of chip-select available to the controller. The first
> +      entries are a 1:1 mapping of the available chip-select on the
> +      NAND controller (even if they are not used). As many additional
> +      chip-select as needed may follow and should be phandles of GPIO
> +      lines. 'reg' entries of the NAND chip subnodes become indexes of
> +      this array when this property is present.

Can we put some 'maxItems' value here. I want to make the meta-schema 
enforce that. I realize there's not really one here, but a 'should be 
enough' value is fine. We can bump it up if needed.

> +
>  patternProperties:
>    "^nand@[a-f0-9]$":
>      type: object
> @@ -164,14 +173,19 @@ examples:
>      nand-controller {
>        #address-cells = <1>;
>        #size-cells = <0>;
> +      gpio-cs = <0>, <&gpioA 1>; /* A single native CS is available */
>  
>        /* controller specific properties */
>  
>        nand@0 {
> -        reg = <0>;
> +        reg = <0>; /* Native CS */
>          nand-use-soft-ecc-engine;
>          nand-ecc-algo = "bch";
>  
>          /* controller specific properties */
>        };
> +
> +      nand@1 {
> +        reg = <1>; /* GPIO CS */
> +      };
>      };
> -- 
> 2.27.0
> 

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2021-05-10 16:51 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-10 10:40 [PATCH v2 0/5] Bring GPIO CS support to the Arasan controller driver Miquel Raynal
2021-05-10 10:40 ` Miquel Raynal
2021-05-10 10:40 ` [PATCH v2 1/5] dt-binding: mtd: nand: Document gpio-cs property Miquel Raynal
2021-05-10 10:40   ` Miquel Raynal
2021-05-10 16:51   ` Rob Herring [this message]
2021-05-10 16:51     ` Rob Herring
2021-05-10 17:00     ` Miquel Raynal
2021-05-10 17:00       ` Miquel Raynal
2021-05-10 10:40 ` [PATCH v2 2/5] mtd: rawnand: Move struct gpio_desc declaration to the top Miquel Raynal
2021-05-10 10:40   ` Miquel Raynal
2021-05-26  9:03   ` Miquel Raynal
2021-05-26  9:03     ` Miquel Raynal
2021-05-26  9:34     ` Miquel Raynal
2021-05-26  9:34       ` Miquel Raynal
2021-05-10 10:40 ` [PATCH v2 3/5] mtd: rawnand: Add a helper to parse the gpio-cs DT property Miquel Raynal
2021-05-10 10:40   ` Miquel Raynal
2021-05-26  9:03   ` Miquel Raynal
2021-05-26  9:03     ` Miquel Raynal
2021-05-10 10:40 ` [PATCH v2 4/5] mtd: rawnand: arasan: Ensure proper configuration for the asserted target Miquel Raynal
2021-05-10 10:40   ` Miquel Raynal
2021-05-26  9:03   ` Miquel Raynal
2021-05-26  9:03     ` Miquel Raynal
2021-05-10 10:40 ` [PATCH v2 5/5] mtd: rawnand: arasan: Leverage additional GPIO CS Miquel Raynal
2021-05-10 10:40   ` Miquel Raynal
2021-05-10 16:00   ` kernel test robot
2021-05-10 16:00     ` kernel test robot
2021-05-10 16:00     ` kernel test robot
2021-05-26  9:03   ` Miquel Raynal
2021-05-26  9:03     ` Miquel Raynal

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