[PULL 0/4] tcg patch queue

[PULL 0/4] tcg patch queue

[Richard Henderson]

The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:

  Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)

are available in the Git repository at:

  https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513

for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:

  tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)

----------------------------------------------------------------
Minor gen-icount.h fix.
BSD cpu_signal_handler fix.
Add missing tcg_constant_tl symbol.

----------------------------------------------------------------
Matheus Ferst (1):
      tcg: Add tcg_constant_tl

Philippe Mathieu-Daudé (2):
      MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section
      exec/gen-icount.h: Add missing "exec/exec-all.h" include

Warner Losh (1):
      tcg: Use correct trap number for page faults on *BSD systems

 include/exec/gen-icount.h |  1 +
 include/tcg/tcg-op.h      |  2 ++
 accel/tcg/user-exec.c     | 14 ++++++++++++--
 MAINTAINERS               |  1 +
 4 files changed, 16 insertions(+), 2 deletions(-)

[PULL 1/4] MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section

[Richard Henderson]

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

As the 'Main Loop' section covers softmmu/icount.c,
add "exec/gen-icount.h" there too.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210422064128.2318616-2-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index c733c53bf7..808e4ec74e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2477,6 +2477,7 @@ F: ui/cocoa.m
 Main loop
 M: Paolo Bonzini <pbonzini@redhat.com>
 S: Maintained
+F: include/exec/gen-icount.h
 F: include/qemu/main-loop.h
 F: include/sysemu/runstate.h
 F: include/sysemu/runstate-action.h
-- 
2.25.1

[PULL 2/4] exec/gen-icount.h: Add missing "exec/exec-all.h" include

[Richard Henderson]

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

When including "exec/gen-icount.h" we get:

  include/exec/gen-icount.h: In function ‘gen_tb_start’:
  include/exec/gen-icount.h:40:9: error: implicit declaration of function ‘tb_cflags’ [-Werror=implicit-function-declaration]
     40 |     if (tb_cflags(tb) & CF_USE_ICOUNT) {
        |         ^~~~~~~~~
  include/exec/gen-icount.h:40:9: error: nested extern declaration of ‘tb_cflags’ [-Werror=nested-externs]
  include/exec/gen-icount.h:40:25: error: ‘CF_USE_ICOUNT’ undeclared (first use in this function); did you mean ‘CPU_COUNT’?
     40 |     if (tb_cflags(tb) & CF_USE_ICOUNT) {
        |                         ^~~~~~~~~~~~~
        |                         CPU_COUNT

Since tb_cflags() is declared in "exec/exec-all.h", include this
header in "exec/gen-icount.h".

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210422064128.2318616-3-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/gen-icount.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h
index 298e01eef4..467529d84c 100644
--- a/include/exec/gen-icount.h
+++ b/include/exec/gen-icount.h
@@ -1,6 +1,7 @@
 #ifndef GEN_ICOUNT_H
 #define GEN_ICOUNT_H
 
+#include "exec/exec-all.h"
 #include "qemu/timer.h"
 
 /* Helpers for instruction counting code generation.  */
-- 
2.25.1

[PULL 3/4] tcg: Use correct trap number for page faults on *BSD systems

[Richard Henderson]

From: Warner Losh <imp@bsdimp.com>

The trap number for a page fault on BSD systems is T_PAGEFLT not 0xe. 0xe is
used by Linux and represents the intel hardware trap vector. The BSD kernels,
however, translate this to T_PAGEFLT in their Xpage, Xtrap0e, Xtrap14, etc fault
handlers. This is true for i386 and x86_64, though the name of the trap hanlder
can very on the flavor of BSD. As far as I can tell, Linux doesn't provide a
define for this value. Invent a new one (PAGE_FAULT_TRAP) and use it instead to
avoid uglier ifdefs.

Signed-off-by: Mark Johnston <markj@FreeBSD.org>
Signed-off-by: Juergen Lock <nox@FreeBSD.org>
[ Rework to avoid ifdefs and expand it to i386 ]
Signed-off-by: Warner Losh <imp@bsdimp.com>
Message-Id: <20210506173826.72832-1-imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/user-exec.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index fb2d43e6a9..d2acf6e82c 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -259,6 +259,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size,
 #define TRAP_sig(context)    ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
 #define ERROR_sig(context)   ((context)->uc_mcontext.__gregs[_REG_ERR])
 #define MASK_sig(context)    ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP      T_PAGEFLT
 #elif defined(__FreeBSD__) || defined(__DragonFly__)
 #include <ucontext.h>
 
@@ -266,16 +267,19 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size,
 #define TRAP_sig(context)    ((context)->uc_mcontext.mc_trapno)
 #define ERROR_sig(context)   ((context)->uc_mcontext.mc_err)
 #define MASK_sig(context)    ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP      T_PAGEFLT
 #elif defined(__OpenBSD__)
 #define EIP_sig(context)     ((context)->sc_eip)
 #define TRAP_sig(context)    ((context)->sc_trapno)
 #define ERROR_sig(context)   ((context)->sc_err)
 #define MASK_sig(context)    ((context)->sc_mask)
+#define PAGE_FAULT_TRAP      T_PAGEFLT
 #else
 #define EIP_sig(context)     ((context)->uc_mcontext.gregs[REG_EIP])
 #define TRAP_sig(context)    ((context)->uc_mcontext.gregs[REG_TRAPNO])
 #define ERROR_sig(context)   ((context)->uc_mcontext.gregs[REG_ERR])
 #define MASK_sig(context)    ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP      0xe
 #endif
 
 int cpu_signal_handler(int host_signum, void *pinfo,
@@ -301,7 +305,8 @@ int cpu_signal_handler(int host_signum, void *pinfo,
     pc = EIP_sig(uc);
     trapno = TRAP_sig(uc);
     return handle_cpu_signal(pc, info,
-                             trapno == 0xe ? (ERROR_sig(uc) >> 1) & 1 : 0,
+                             trapno == PAGE_FAULT_TRAP ?
+                             (ERROR_sig(uc) >> 1) & 1 : 0,
                              &MASK_sig(uc));
 }
 
@@ -312,11 +317,13 @@ int cpu_signal_handler(int host_signum, void *pinfo,
 #define TRAP_sig(context)     ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
 #define ERROR_sig(context)    ((context)->uc_mcontext.__gregs[_REG_ERR])
 #define MASK_sig(context)     ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP       T_PAGEFLT
 #elif defined(__OpenBSD__)
 #define PC_sig(context)       ((context)->sc_rip)
 #define TRAP_sig(context)     ((context)->sc_trapno)
 #define ERROR_sig(context)    ((context)->sc_err)
 #define MASK_sig(context)     ((context)->sc_mask)
+#define PAGE_FAULT_TRAP       T_PAGEFLT
 #elif defined(__FreeBSD__) || defined(__DragonFly__)
 #include <ucontext.h>
 
@@ -324,11 +331,13 @@ int cpu_signal_handler(int host_signum, void *pinfo,
 #define TRAP_sig(context)     ((context)->uc_mcontext.mc_trapno)
 #define ERROR_sig(context)    ((context)->uc_mcontext.mc_err)
 #define MASK_sig(context)     ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP       T_PAGEFLT
 #else
 #define PC_sig(context)       ((context)->uc_mcontext.gregs[REG_RIP])
 #define TRAP_sig(context)     ((context)->uc_mcontext.gregs[REG_TRAPNO])
 #define ERROR_sig(context)    ((context)->uc_mcontext.gregs[REG_ERR])
 #define MASK_sig(context)     ((context)->uc_sigmask)
+#define PAGE_FAULT_TRAP       0xe
 #endif
 
 int cpu_signal_handler(int host_signum, void *pinfo,
@@ -346,7 +355,8 @@ int cpu_signal_handler(int host_signum, void *pinfo,
 
     pc = PC_sig(uc);
     return handle_cpu_signal(pc, info,
-                             TRAP_sig(uc) == 0xe ? (ERROR_sig(uc) >> 1) & 1 : 0,
+                             TRAP_sig(uc) == PAGE_FAULT_TRAP ?
+                             (ERROR_sig(uc) >> 1) & 1 : 0,
                              &MASK_sig(uc));
 }
 
-- 
2.25.1

[PULL 4/4] tcg: Add tcg_constant_tl

[Richard Henderson]

From: Matheus Ferst <matheus.ferst@eldorado.org.br>

Used in ppc D/DS/X-form load/store implementation.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20210512185441.3619828-24-matheus.ferst@eldorado.org.br>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/tcg/tcg-op.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 2cd1faf9c4..ef8a008ea7 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -1096,6 +1096,7 @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
 #define tcg_gen_sextract_tl tcg_gen_sextract_i64
 #define tcg_gen_extract2_tl tcg_gen_extract2_i64
 #define tcg_const_tl tcg_const_i64
+#define tcg_constant_tl tcg_constant_i64
 #define tcg_const_local_tl tcg_const_local_i64
 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
 #define tcg_gen_add2_tl tcg_gen_add2_i64
@@ -1209,6 +1210,7 @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
 #define tcg_gen_sextract_tl tcg_gen_sextract_i32
 #define tcg_gen_extract2_tl tcg_gen_extract2_i32
 #define tcg_const_tl tcg_const_i32
+#define tcg_constant_tl tcg_constant_i32
 #define tcg_const_local_tl tcg_const_local_i32
 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
 #define tcg_gen_add2_tl tcg_gen_add2_i32
-- 
2.25.1

Re: [PULL 0/4] tcg patch queue

[Peter Maydell]

On Thu, 13 May 2021 at 13:20, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:
>
>   Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513
>
> for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:
>
>   tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)
>
> ----------------------------------------------------------------
> Minor gen-icount.h fix.
> BSD cpu_signal_handler fix.
> Add missing tcg_constant_tl symbol.
>

Fails to build on FreeBSD and OpenBSD:


../src/accel/tcg/user-exec.c:358:46: error: use of undeclared
identifier 'T_PAGEFLT'
                             TRAP_sig(uc) == PAGE_FAULT_TRAP ?
                                             ^
../src/accel/tcg/user-exec.c:334:31: note: expanded from macro 'PAGE_FAULT_TRAP'
#define PAGE_FAULT_TRAP       T_PAGEFLT
                              ^

thanks
-- PMM

Re: [PULL 0/4] tcg patch queue

[Philippe Mathieu-Daudé]

On 5/14/21 1:03 PM, Peter Maydell wrote:
> On Thu, 13 May 2021 at 13:20, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> The following changes since commit 3e9f48bcdabe57f8f90cf19f01bbbf3c86937267:
>>
>>   Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210511' into staging (2021-05-12 17:31:52 +0100)
>>
>> are available in the Git repository at:
>>
>>   https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210513
>>
>> for you to fetch changes up to 9bcf4c52f801966b10f802e65c3ecc8bbbd8c660:
>>
>>   tcg: Add tcg_constant_tl (2021-05-13 05:42:44 -0500)
>>
>> ----------------------------------------------------------------
>> Minor gen-icount.h fix.
>> BSD cpu_signal_handler fix.
>> Add missing tcg_constant_tl symbol.
>>
> 
> Fails to build on FreeBSD and OpenBSD:
> 
> 
> ../src/accel/tcg/user-exec.c:358:46: error: use of undeclared
> identifier 'T_PAGEFLT'
>                              TRAP_sig(uc) == PAGE_FAULT_TRAP ?
>                                              ^
> ../src/accel/tcg/user-exec.c:334:31: note: expanded from macro 'PAGE_FAULT_TRAP'
> #define PAGE_FAULT_TRAP       T_PAGEFLT

Good excuse to highlight my "gitlab-ci: Allow using FreeBSD runners"
series :)
https://www.mail-archive.com/qemu-devel@nongnu.org/msg806537.html